Author: pluto                        Date: Wed May 31 13:14:04 2006 GMT
Module: SOURCES                       Tag: HEAD
---- Log message:
- http://www.lowlevel.cz/log/pivot/entry.php?id=76

---- Files affected:
SOURCES:
   mc-vhdl-syntax.patch (NONE -> 1.1)  (NEW)

---- Diffs:

================================================================
Index: SOURCES/mc-vhdl-syntax.patch
diff -u /dev/null SOURCES/mc-vhdl-syntax.patch:1.1
--- /dev/null   Wed May 31 15:14:04 2006
+++ SOURCES/mc-vhdl-syntax.patch        Wed May 31 15:13:59 2006
@@ -0,0 +1,188 @@
+diff -uNr mc-2006-05-10-21/syntax.orig/Makefile.am 
mc-2006-05-10-21/syntax/Makefile.am
+--- mc-2006-05-10-21/syntax.orig/Makefile.am   2006-05-31 15:06:50.000000000 
+0200
++++ mc-2006-05-10-21/syntax/Makefile.am        2006-05-31 15:08:18.138041000 
+0200
+@@ -43,6 +43,7 @@
+       syntax.syntax           \
+       tcl.syntax              \
+       texinfo.syntax          \
++      vhdl.syntax             \
+       unknown.syntax          \
+       xml.syntax
+ 
+diff -uNr mc-2006-05-10-21/syntax.orig/Makefile.in 
mc-2006-05-10-21/syntax/Makefile.in
+--- mc-2006-05-10-21/syntax.orig/Makefile.in   2006-05-31 15:06:50.000000000 
+0200
++++ mc-2006-05-10-21/syntax/Makefile.in        2006-05-31 15:08:30.546816500 
+0200
+@@ -278,6 +278,7 @@
+       syntax.syntax           \
+       tcl.syntax              \
+       texinfo.syntax          \
++      vhdl.syntax             \
+       unknown.syntax          \
+       xml.syntax
+ 
+diff -uNr mc-2006-05-10-21/syntax.orig/Syntax mc-2006-05-10-21/syntax/Syntax
+--- mc-2006-05-10-21/syntax.orig/Syntax        2006-05-31 15:06:51.000000000 
+0200
++++ mc-2006-05-10-21/syntax/Syntax     2006-05-31 15:10:11.465123500 +0200
+@@ -151,5 +151,8 @@
+ file users CVS\suser\slist
+ include cvs-userlist.syntax
+ 
++file ..\*\\.(hdl|vhdl|HDL|VHDL)$ VHDL\sProgram
++include vhdl.syntax
++
+ file .\* unknown
+ include unknown.syntax
+diff -uNr mc-2006-05-10-21/syntax.orig/vhdl.syntax 
mc-2006-05-10-21/syntax/vhdl.syntax
+--- mc-2006-05-10-21/syntax.orig/vhdl.syntax   1970-01-01 01:00:00.000000000 
+0100
++++ mc-2006-05-10-21/syntax/vhdl.syntax        2006-05-31 14:56:44.000000000 
+0200
+@@ -0,0 +1,150 @@
++# Adam Pribyl, based on ADA
++# missing
++# generate, disconnect, group, guarded, impure, inertial, linkage, literal, 
new, on, others, postponed, pure, register, reject, select, shared, sli, 
transport, unaffected, units
++
++
++#wholechars 
abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789_.\\[]{}
++
++#ignore case?!
++
++context default
++
++      keyword whole with      yellow
++      keyword whole use       yellow
++      keyword whole is        yellow
++      keyword whole of        yellow
++      keyword whole range     yellow
++      keyword whole abs       yellow
++      keyword whole delta     yellow
++      keyword whole return    yellow
++      keyword whole next      yellow
++      keyword whole null      yellow
++      keyword whole after     yellow
++      keyword whole array     yellow
++      keyword whole downto    yellow
++      keyword whole to        yellow
++
++# prevents - keyword from interfering with comment
++      keyword --      brown
++
++# expressions
++      keyword :=      brightgreen
++      keyword .       brightgreen
++      keyword ;       brightgreen
++      keyword ..      brightgreen
++      keyword :       brightgreen
++      keyword (       brightgreen
++      keyword )       brightgreen
++      keyword \+      brightgreen
++      keyword -       brightgreen
++      keyword /       brightgreen
++      keyword \*      brightgreen
++      keyword \*\*    brightgreen
++      keyword #       brightgreen
++      keyword =>      brightgreen
++      keyword <=      brightgreen
++      keyword >=      brightgreen
++      keyword ,       brightgreen
++      keyword '       brightgreen
++      keyword =       brightgreen
++      keyword /=      brightgreen
++
++# operators
++      keyword whole sll       green
++      keyword whole srl       green
++      keyword whole sla       green
++      keyword whole sra       green
++      keyword whole rol       green
++      keyword whole ror       green
++      keyword whole rem       green
++      keyword whole mod       green
++      keyword whole not       green
++      keyword whole and       green
++      keyword whole nand      green
++      keyword whole or        green
++      keyword whole xor       green
++      keyword whole nor       green
++      keyword whole xnor      green
++      
++# sequential statements
++      keyword whole begin     brightred
++      keyword whole end       brightred
++      keyword whole exit      brightred
++      keyword whole for       brightred
++      keyword whole while     brightred
++      keyword whole if        brightred
++      keyword whole then      brightred
++      keyword whole else      brightred
++      keyword whole case      brightred
++      keyword whole when      brightred
++      keyword whole elsif     brightred
++      keyword whole assert    brightred
++      keyword whole wait      brightred
++      keyword whole open      brightred
++      keyword whole loop      brightred
++      keyword whole until     brightred
++
++# parallel statements
++      keyword whole block     brightred
++
++# predefined types
++      keyword whole integer   cyan
++      keyword whole natural   cyan
++      keyword whole positive  cyan
++      keyword whole string    cyan
++      keyword whole character cyan
++      keyword whole boolean   cyan
++      keyword whole real      cyan
++      keyword whole bit       cyan
++      keyword whole bit_vector        cyan
++      keyword whole time      cyan
++
++# declarations
++      keyword whole type      brightcyan
++      keyword whole subtype   brightcyan
++
++      keyword whole variable  brightcyan
++      keyword whole signal    brightcyan
++      keyword whole constant  brightcyan
++      keyword whole file      brightcyan
++
++      keyword whole port      brightcyan
++      keyword whole map       brightcyan
++      keyword whole label     brightcyan
++      keyword whole record    brightcyan
++      keyword whole generic   brightcyan
++      keyword whole alias     brightcyan
++      keyword whole attribute brightcyan
++      
++
++      keyword whole in        white
++      keyword whole out       white
++      keyword whole inout     white
++      keyword whole buffer    white
++      keyword whole bus       white
++      
++# library units
++      keyword whole library   magenta
++      keyword whole entity    magenta
++      keyword whole architecture      magenta
++      keyword whole package   magenta
++      keyword whole body      magenta
++      keyword whole procedure magenta
++      keyword whole function  magenta
++      keyword whole configuration     magenta
++      keyword whole component magenta
++      keyword whole generic   magenta
++      keyword whole process   magenta
++
++# reports
++      keyword whole report    red
++      keyword whole severity  red
++      keyword whole note      red
++      keyword whole warning   red
++      keyword whole error     red
++      keyword whole failure   red
++      
++
++context exclusive -- \n       brown
++context " "   green/green
++
================================================================
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