Mike Cherba wrote: > I've got a make question I'm hoping someone can help me with. > > I have three Makefiles > > Makefile.a > Makefile.b > and Makefile > > Makefile contains all the real targets and the .a and .b files simply export > a couple of variables and include Makefile. I want to eliminate Makefile.a > and Makefile.b by performing those exports dynamically based on the chosen > target, so "make mytargeta" would replace "make -f Makefile.a mytarget" and > "make mytargetb" would replace "make -f Makefile.b mytarget" > correspondingly. I can easily mimic this with a shell script sitting in > front of the Makefile, but I'd like to do it using only make if possible. > I'm coming to the conclusion that there's no provision in make for this. > The targets are inherited and fairly complex with multiple levels of > inclusion, so just rewriting all the makefiles is out of the question. Any > suggestions? I may just have to create a "build.sh" which matches the > target given as an argument and invokes make with the correct -f option.
I'm not sure I have enough info to really help, but it sounds like target specific variables might be useful. http://www.gnu.org/software/make/manual/make.html#Target_002dspecific The make mailing list is both low traffic and helpful, so you might want to ask there. I suspect you will need to provide more details though. galen -- Galen Seitz gal...@seitzassoc.com _______________________________________________ PLUG mailing list PLUG@lists.pdxlinux.org http://lists.pdxlinux.org/mailman/listinfo/plug