Hi, If you can already access your device via /dev, you need to add a new pocl driver layer implementation (see under lib/CL/devices) that communicates with your FPGA design.
On 08.01.2016 05:11, #RAVI PRASHANT# wrote: > Hello All, > > I have installed POCL on the zedboard zynq. Currently the arm core is > getting detected as an OPENCL device but now i want to make my FPGA > detect as an opencl device. Im using xillybus architecture so my read > and write ports to the FPGA are already mapped to /dev/ but how do i > map it to POCL to make it detect when i use the OPENCL api’s. If > anyone could help me or direct me in the right way, it would be > great. -- Pekka ------------------------------------------------------------------------------ Site24x7 APM Insight: Get Deep Visibility into Application Performance APM + Mobile APM + RUM: Monitor 3 App instances at just $35/Month Monitor end-to-end web transactions and take corrective actions now Troubleshoot faster and improve end-user experience. Signup Now! http://pubads.g.doubleclick.net/gampad/clk?id=267308311&iu=/4140 _______________________________________________ pocl-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/pocl-devel
