Hello David,

my group has done some work in encapsulating FPGA boards using Jini, and
last year we used one of our Jini-encapsulated FPGA prototypes to setup a
hardware-in-the-loop simulation within Ptolemy (mainly for educational
purposes). We created an actor in Ptolemy to access a Jini federation,
obtain a proxy to the FPGA, send the FPGA configuration bitstream and
send/receive data to be processed. For further information, follow the link
(including a video of a demo with the computation in hardware of the FFT of
a voice signal captured within Ptolemy) and check the papers referenced
below (both available at the IEEE Xplore):

http://www.mes.tu-darmstadt.de/staff/lsi/stud_dipl/diegojimenez/ActorEncapsu
lation.htm


INDRUSIAK, L. S. ; LUBITZ, F. ; GLESNER, M. ; REIS, R. A. L. . Ubiquitous
Access to Reconfigurable Hardware: Application Scenarios And Implementation
Issues. In: Design Automation and Test in Europe (DATE), 2003, Munich.
Proceedings. Los Alamitos : IEEE Computer Society, 2003. p. 940-945.

JIMENEZ OROSTEGUI, D. F. ; INDRUSIAK, L. S. ; GLESNER, M. . Proxy-based
Integration of Reconfigurable Hardware within Simulation Environments:
Improving E-Learning Experience in Microelectronics. In: International
Conference on Microelectronic Systems Education, 2005, Anaheim. Proceedings.
Los Alamitos : IEEE Computer Society, 2005.



Regarding the use of JHDL and Ptolemy, we followed the guidelines provided
by Michael Wirthlin in his website
(http://www.ee.byu.edu/faculty/wirthlin/projects/ptjhdl/implementation.html)
to co-simulate a JHDL model of a WCDMA equalizer, modulation/demodulation
systems within Ptolemy and a wireless channel model in Matlab. The following
papers (also available at the IEEE Xplore) detail what we have done:


INDRUSIAK, L. S. ; PRUDENCIO, R. B. ; GLESNER, M. . Modeling and Prototyping
of Communication Systems using Java: a Case Study. In: IEEE International
Workshop on Rapid System Prototyping, 2005, Montreal. Shortening the path
from specification to prototype. Los Alamitos : IEEE Computer Society, 2005.
p. 225-231.

PRUDENCIO, R. B. ; INDRUSIAK, L. S. ; GLESNER, M. . An Efficient Hardware
Implementation of a Self-Adaptable Equalizer for WCDMA Downlink UMTS
Standard. In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI'2006),
2006, Karlsruhe. Emerging VLSI Technologies and Architectures. Los Alamitos
: IEEE Computer Society, 2006. p. 77-81.

Feel free to contact me directly if you need additional information.
Regards,
Leandro

____________________________________________________________________

Technische Universität Darmstadt - Microelectronic Systems Institute
Dr. Leandro Soares Indrusiak                  Phone: +49 6151 164535
Karlstr. 15 - D-64283 Darmstadt - Germany       Fax: +49 6151 164936
http://www.mes.tu-darmstadt.de/staff/lsi     [EMAIL PROTECTED]


-----Ursprüngliche Nachricht-----
Von: [EMAIL PROTECTED]
[mailto:[EMAIL PROTECTED] Auftrag von
Christopher Brooks
Gesendet: Mittwoch, 6. September 2006 16:52
An: [EMAIL PROTECTED]
Cc: [email protected]
Betreff: Re: Hardware in the loop Simulation in Ptolemy


Hi David,
Ptolemy II has an interface to JHDL which is a set of FPGA tools.
A summary can be found at
http://groups.yahoo.com/group/ptolemy-hackers/message/2130

Ptolemy II has two code generators, see
http://ptolemy.eecs.berkeley.edu/ptolemyII/ptIIfaq.htm#CodeGen

Currently, we are doing some work on generating C code that
is run during the model execution.  The idea is that a portion
of the model is a subsystem written in C which then executed
while the model is running.  This code is in development
and not ready for release.  I don't think we have a similar
facility for generating code for an FPGA and then running it.
This sounds interesting.

_Christopher

--------

    Hi all,

    I am doing some research in Hardware in the loop simulation based on
    FPGA platforms.

    I know that there is some Hardware Generation (or integration) in
    Ptolemy, but the question is:

    Can be the actual synthesized hardware be executed into a FPGA platform
    during a Ptolemy simulation ?

    I mean, is there any equivalent to Simulink/Xilinx System Generator in
    Ptolemy ?


    Thanks.

--------

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