Author: Alex Gaynor <[email protected]>
Branch:
Changeset: r65369:c1825a7b729a
Date: 2013-07-12 16:37 +1000
http://bitbucket.org/pypy/pypy/changeset/c1825a7b729a/
Log: Remove some code that was temporary.
diff --git a/rpython/jit/backend/arm/runner.py
b/rpython/jit/backend/arm/runner.py
--- a/rpython/jit/backend/arm/runner.py
+++ b/rpython/jit/backend/arm/runner.py
@@ -23,7 +23,6 @@
supports_longlong = False # XXX requires an implementation of
# read_timestamp that works in user mode
supports_singlefloats = not detect_hardfloat()
- can_inline_varsize_malloc = True
from rpython.jit.backend.arm.arch import JITFRAME_FIXED_SIZE
all_reg_indexes = range(len(all_regs))
diff --git a/rpython/jit/backend/llsupport/llmodel.py
b/rpython/jit/backend/llsupport/llmodel.py
--- a/rpython/jit/backend/llsupport/llmodel.py
+++ b/rpython/jit/backend/llsupport/llmodel.py
@@ -21,8 +21,6 @@
class AbstractLLCPU(AbstractCPU):
from rpython.jit.metainterp.typesystem import llhelper as ts
- can_inline_varsize_malloc = False
-
def __init__(self, rtyper, stats, opts, translate_support_code=False,
gcdescr=None):
assert type(opts) is not bool
diff --git a/rpython/jit/backend/llsupport/rewrite.py
b/rpython/jit/backend/llsupport/rewrite.py
--- a/rpython/jit/backend/llsupport/rewrite.py
+++ b/rpython/jit/backend/llsupport/rewrite.py
@@ -305,8 +305,6 @@
arraydescr, kind=FLAG_ARRAY):
""" itemsize is an int, v_length and v_result are boxes
"""
- if not self.cpu.can_inline_varsize_malloc:
- return False # temporary, kill when ARM supports it
gc_descr = self.gc_ll_descr
if (kind == FLAG_ARRAY and
(arraydescr.basesize != gc_descr.standard_array_basesize or
diff --git a/rpython/jit/backend/llsupport/test/test_rewrite.py
b/rpython/jit/backend/llsupport/test/test_rewrite.py
--- a/rpython/jit/backend/llsupport/test/test_rewrite.py
+++ b/rpython/jit/backend/llsupport/test/test_rewrite.py
@@ -109,8 +109,6 @@
class BaseFakeCPU(object):
JITFRAME_FIXED_SIZE = 0
- can_inline_varsize_malloc = True
-
def __init__(self):
self.tracker = FakeTracker()
self._cache = {}
diff --git a/rpython/jit/backend/x86/runner.py
b/rpython/jit/backend/x86/runner.py
--- a/rpython/jit/backend/x86/runner.py
+++ b/rpython/jit/backend/x86/runner.py
@@ -23,8 +23,6 @@
with_threads = False
frame_reg = regloc.ebp
- can_inline_varsize_malloc = True
-
from rpython.jit.backend.x86.arch import JITFRAME_FIXED_SIZE
all_reg_indexes = gpr_reg_mgr_cls.all_reg_indexes
gen_regs = gpr_reg_mgr_cls.all_regs
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