Author: Armin Rigo <[email protected]>
Branch: stmgc-c7
Changeset: r70110:26e595d6e017
Date: 2014-03-20 11:23 +0100
http://bitbucket.org/pypy/pypy/changeset/26e595d6e017/

Log:    sorry :-/ cond_call_stm_b, stm_set_revision_gc, and more stm_ptr_eq
        all die

diff --git a/rpython/jit/backend/llgraph/runner.py 
b/rpython/jit/backend/llgraph/runner.py
--- a/rpython/jit/backend/llgraph/runner.py
+++ b/rpython/jit/backend/llgraph/runner.py
@@ -1029,9 +1029,6 @@
     def execute_cond_call_gc_wb_array(self, descr, a, b):
         py.test.skip("cond_call_gc_wb_array not supported")
 
-    def execute_cond_call_stm_b(self, descr, a):
-        py.test.skip("cond_call_stm_b not supported")
-
     def execute_stm_transaction_break(self, _, really_wanted):
         pass
 
diff --git a/rpython/jit/backend/x86/assembler.py 
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -2374,257 +2374,7 @@
         self.mc.overwrite(jmp_location - 1, chr(offset))
 
     # ------------------- END CALL ASSEMBLER -----------------------
-    def _stm_ptr_eq_fastpath(self, mc, arglocs, result_loc):
-        assert self.cpu.gc_ll_descr.stm
-        assert self.ptr_eq_slowpath is not None
-        a_base = arglocs[0]
-        b_base = arglocs[1]
-        if isinstance(a_base, ImmedLoc):
-            # make sure there is a non-immed as the first
-            # argument to mc.CMP(). (2 immeds are caught below)
-            a_base, b_base = b_base, a_base
-        
-        #
-        # FASTPATH
-        #
-        # a == b -> SET NZ
-        if isinstance(a_base, ImmedLoc) and isinstance(b_base, ImmedLoc):
-            if a_base.getint() == b_base.getint():
-                mc.MOV_ri(X86_64_SCRATCH_REG.value, 1)
-                mc.TEST(X86_64_SCRATCH_REG, X86_64_SCRATCH_REG) # NZ flag
-                mc.JMP_l8(0)
-                j_ok1 = mc.get_relative_pos()
-            else:
-                j_ok1 = 0
-        else:
-            mc.CMP(a_base, b_base)
-            # reverse flags: if p1==p2, set NZ
-            sl = X86_64_SCRATCH_REG.lowest8bits()
-            mc.SET_ir(rx86.Conditions['Z'], sl.value)
-            mc.TEST8_rr(sl.value, sl.value)
-            mc.J_il8(rx86.Conditions['NZ'], 0)
-            j_ok1 = mc.get_relative_pos()
 
-        skip = False
-        # a == 0 || b == 0 -> SET Z
-        j_ok2 = 0
-        if isinstance(a_base, ImmedLoc):
-            if a_base.getint() == 0:
-                # set Z flag:
-                mc.XOR(X86_64_SCRATCH_REG, X86_64_SCRATCH_REG)
-                skip = True
-        else:
-            mc.CMP(a_base, imm(0))
-            mc.J_il8(rx86.Conditions['Z'], 0)
-            j_ok2 = mc.get_relative_pos()
-        #
-        j_ok3 = 0
-        if not skip:
-            if isinstance(b_base, ImmedLoc):
-                if b_base.getint() == 0:
-                    # set Z flag:
-                    mc.XOR(X86_64_SCRATCH_REG, X86_64_SCRATCH_REG)
-                    skip = True
-            else:
-                mc.CMP(b_base, imm(0))
-                mc.J_il8(rx86.Conditions['Z'], 0)
-                j_ok3 = mc.get_relative_pos()
-            # a.type != b.type
-            # XXX: todo, if it ever happens..
-
-            #
-            # SLOWPATH
-            #
-            if not skip:
-                mc.PUSH(b_base)
-                mc.PUSH(a_base)
-                func = self.ptr_eq_slowpath
-                mc.CALL(imm(func))
-                # result still on stack
-                mc.POP_r(X86_64_SCRATCH_REG.value)
-                # _Bool return type only sets lower 8 bits of return value
-                sl = X86_64_SCRATCH_REG.lowest8bits()
-                mc.TEST8_rr(sl.value, sl.value)
-            #
-            # END SLOWPATH
-            #
-        
-        # OK: flags already set
-        if j_ok1:
-            offset = mc.get_relative_pos() - j_ok1
-            assert 0 <= offset <= 127
-            mc.overwrite(j_ok1 - 1, chr(offset))
-        if j_ok2:
-            offset = mc.get_relative_pos() - j_ok2
-            assert 0 <= offset <= 127
-            mc.overwrite(j_ok2 - 1, chr(offset))
-        if j_ok3:
-            offset = mc.get_relative_pos() - j_ok3
-            assert 0 <= offset <= 127
-            mc.overwrite(j_ok3 - 1, chr(offset))
-
-    def _get_stm_private_rev_num_addr(self):
-        return self._get_stm_tl(rstm.get_adr_of_private_rev_num())
-
-    def _get_stm_read_barrier_cache_addr(self):
-        return self._get_stm_tl(rstm.get_adr_of_read_barrier_cache())
-        
-    def _stm_barrier_fastpath(self, mc, descr, arglocs, is_frame=False,
-                              align_stack=False):
-        assert self.cpu.gc_ll_descr.stm
-        if we_are_translated():
-            # tests use a a mock class, but translation needs it
-            assert isinstance(descr, STMBarrierDescr)
-        assert descr.returns_modified_object
-        loc_base = arglocs[0]
-        assert isinstance(loc_base, RegLoc)
-        
-        helper_num = 0
-        if is_frame:
-            helper_num = 4
-        elif self._regalloc is not None and self._regalloc.xrm.reg_bindings:
-            helper_num += 2
-        #
-        # FASTPATH:
-        # do slowpath IF:
-        # A2W:
-        # (obj->h_revision != stm_private_rev_num)
-        #     || (obj->h_tid & GCFLAG_WRITE_BARRIER) != 0)
-        # V2W:
-        # (obj->h_tid & GCFLAG_WRITE_BARRIER) != 0)
-        # A2V:
-        # (obj->h_revision != stm_private_rev_num)
-        # A2R:
-        # (obj->h_revision != stm_private_rev_num)
-        #     && (FXCACHE_AT(obj) != obj)))
-        # Q2R:
-        # (obj->h_tid & (GCFLAG_PUBLIC_TO_PRIVATE | GCFLAG_MOVED) != 0)
-        # A2I:
-        # (obj->h_tid & GCFLAG_STUB)
-        if IS_X86_32:   # XXX: todo
-            todo()
-        jz_location = 0
-        jz_location2 = 0
-        jnz_location = 0
-        # compare h_revision with stm_private_rev_num
-        if descr.stmcat in ['A2W', 'A2R', 'A2V']:
-            rn = self._get_stm_private_rev_num_addr()
-            if we_are_translated():
-                # during tests, _get_stm_private_rev_num_addr returns
-                # an absolute address, not a tl-offset
-                self._tl_segment_if_stm(mc)
-                mc.MOV_rj(X86_64_SCRATCH_REG.value, rn)
-            else: # testing:
-                mc.MOV(X86_64_SCRATCH_REG, heap(rn))
-
-            if loc_base == ebp:
-                mc.CMP_rb(X86_64_SCRATCH_REG.value, StmGC.H_REVISION)
-            else:
-                mc.CMP(X86_64_SCRATCH_REG, mem(loc_base, StmGC.H_REVISION))
-            #
-            if descr.stmcat in ('A2R', 'A2V'):
-                # jump to end if h_rev==priv_rev
-                mc.J_il8(rx86.Conditions['Z'], 0) # patched below
-                jz_location = mc.get_relative_pos()
-            else: # A2W
-                # jump to slowpath if h_rev!=priv_rev
-                mc.J_il8(rx86.Conditions['NZ'], 0) # patched below
-                jnz_location = mc.get_relative_pos()
-        #
-        # FXCACHE_AT(obj) != obj
-        if descr.stmcat == 'A2R':
-            # calculate: temp = obj & FX_MASK
-            assert StmGC.FX_MASK == 65535
-            assert not is_frame
-            mc.MOVZX16(X86_64_SCRATCH_REG, loc_base)
-            # calculate: rbc + temp == obj
-            rbc = self._get_stm_read_barrier_cache_addr()
-            if we_are_translated():
-                # during tests, _get_stm_rbca returns
-                # an absolute address, not a tl-offset
-                self._tl_segment_if_stm(mc)
-                mc.ADD_rj(X86_64_SCRATCH_REG.value, rbc)
-            else: # testing:
-                mc.PUSH_r(eax.value)
-                mc.MOV_ri(eax.value, rbc)
-                mc.MOV_rm(eax.value, (eax.value, 0))
-                mc.ADD(X86_64_SCRATCH_REG, eax)
-                mc.POP_r(eax.value)
-            mc.CMP_rm(loc_base.value, (X86_64_SCRATCH_REG.value, 0))
-            mc.J_il8(rx86.Conditions['Z'], 0) # patched below
-            jz_location2 = mc.get_relative_pos()
-        #
-        # check flags:
-        if descr.stmcat in ['A2W', 'V2W', 'Q2R', 'A2I']:
-            flags = 0
-            off = 0
-            if descr.stmcat in ['A2W', 'V2W']:
-                # obj->h_tid & GCFLAG_WRITE_BARRIER) != 0
-                flags = StmGC.GCFLAG_WRITE_BARRIER
-            elif descr.stmcat == 'Q2R':
-                # obj->h_tid & PUBLIC_TO_PRIVATE|MOVED
-                flags = StmGC.GCFLAG_PUBLIC_TO_PRIVATE | StmGC.GCFLAG_MOVED
-            elif descr.stmcat == 'A2I':
-                # obj->h_tid & STUB
-                flags = StmGC.GCFLAG_STUB
-
-            assert IS_X86_64
-            if (flags >> 32) > 0 and (flags >> 40) == 0:
-                flags = flags >> 32
-                off = 4
-            elif (flags >> 40) > 0 and (flags >> 48) == 0:
-                flags = flags >> 40
-                off = 5
-            #
-            if loc_base == ebp:
-                mc.TEST8_bi(StmGC.H_TID + off, flags)
-            else:
-                mc.TEST8_mi((loc_base.value, StmGC.H_TID + off), flags)
-
-            mc.J_il8(rx86.Conditions['Z'], 0) # patched below
-            jz_location = mc.get_relative_pos()
-            # if flags not set, jump to end
-        # jump target slowpath:
-        if jnz_location:
-            offset = mc.get_relative_pos() - jnz_location
-            assert 0 < offset <= 127
-            mc.overwrite(jnz_location - 1, chr(offset))
-        #
-        # SLOWPATH_START
-        #
-        if not is_frame:
-            mc.PUSH(loc_base)
-        elif is_frame and align_stack:
-            # ||retadr|
-            mc.SUB_ri(esp.value, 16 - WORD) # erase the return address
-            # ||retadr|...||
-        func = descr.get_b_slowpath(helper_num)
-        assert func != 0
-        mc.CALL(imm(func))
-        # get result:
-        if is_frame:
-            # result already written back to ebp
-            assert loc_base is ebp
-        else:
-            # result where argument was:
-            mc.POP_r(loc_base.value)
-
-        if is_frame and align_stack:
-            mc.ADD_ri(esp.value, 16 - WORD) # erase the return address
-        #
-        # SLOWPATH_END
-        #
-        # jump target end:
-        offset = mc.get_relative_pos() - jz_location
-        assert 0 < offset <= 127
-        mc.overwrite(jz_location - 1, chr(offset))
-        if descr.stmcat == 'A2R':#isinstance(descr, STMReadBarrierDescr):
-            offset = mc.get_relative_pos() - jz_location2
-            assert 0 < offset <= 127
-            mc.overwrite(jz_location2 - 1, chr(offset))
-
-
-        
     def _write_barrier_fastpath(self, mc, descr, arglocs, array=False,
                                 is_frame=False, align_stack=False):
         # Write code equivalent to write_barrier() in the GC: it checks
@@ -2750,9 +2500,6 @@
         self._write_barrier_fastpath(self.mc, op.getdescr(), arglocs,
                                      array=True)
 
-    def genop_discard_cond_call_stm_b(self, op, arglocs):
-        self._stm_barrier_fastpath(self.mc, op.getdescr(), arglocs)
-
     def not_implemented_op_discard(self, op, arglocs):
         not_implemented("not implemented operation: %s" % op.getopname())
 
@@ -3114,21 +2861,6 @@
         assert isinstance(reg, RegLoc)
         self.mc.MOV_rr(reg.value, ebp.value)
 
-    def genop_discard_stm_set_revision_gc(self, op, arglocs):
-        base_loc, ofs_loc, size_loc = arglocs
-        assert isinstance(size_loc, ImmedLoc)
-        mc = self.mc
-
-        if IS_X86_32:
-            todo()
-            
-        rn = self._get_stm_private_rev_num_addr()
-        self._tl_segment_if_stm(mc)
-        mc.MOV_rj(X86_64_SCRATCH_REG.value, rn)
-
-        dest_addr = AddressLoc(base_loc, ofs_loc)
-        mc.MOV(dest_addr, X86_64_SCRATCH_REG)
-
     def genop_guard_stm_transaction_break(self, op, guard_op, guard_token,
                                           arglocs, result_loc):
         assert self.cpu.gc_ll_descr.stm
diff --git a/rpython/jit/backend/x86/regalloc.py 
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -801,21 +801,6 @@
                    for i in range(N)]
         self.perform_discard(op, arglocs)
 
-    def consider_cond_call_stm_b(self, op):
-        assert op.result is None
-        # we force all arguments in a reg (unless they are Consts),
-        # because it will be needed anyway by the following setfield_gc
-        # or setarrayitem_gc. It avoids loading it twice from the memory.
-        arg = op.getarg(0)
-        argloc = self.rm.make_sure_var_in_reg(arg)
-        self.perform_discard(op, [argloc])
-
-        # if 'arg' is in two locations (once in argloc and once spilled
-        # on the frame), we need to ensure that both locations are
-        # updated with the possibly changed reference.
-        self.rm.update_spill_loc_if_necessary(arg, argloc)
-
-
     consider_cond_call_gc_wb_array = consider_cond_call_gc_wb
 
     def consider_cond_call(self, op):
@@ -1265,17 +1250,7 @@
                 if isinstance(loc, FrameLoc):
                     self.fm.hint_frame_pos[box] = self.fm.get_loc_index(loc)
 
-    
-    def consider_stm_set_revision_gc(self, op):
-        ofs, size, _ = unpack_fielddescr(op.getdescr())
-        ofs_loc = imm(ofs)
-        size_loc = imm(size)
-        assert isinstance(size_loc, ImmedLoc)
-        args = op.getarglist()
-        base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
-        self.perform_discard(op, [base_loc, ofs_loc, size_loc])
 
-        
     def consider_stm_transaction_break(self, op, guard_op):
         #
         # only save regs for the should_break_transaction call
diff --git a/rpython/jit/metainterp/executor.py 
b/rpython/jit/metainterp/executor.py
--- a/rpython/jit/metainterp/executor.py
+++ b/rpython/jit/metainterp/executor.py
@@ -335,7 +335,6 @@
                          rop.INCREMENT_DEBUG_COUNTER,
                          rop.COND_CALL_GC_WB,
                          rop.COND_CALL_GC_WB_ARRAY,
-                         rop.COND_CALL_STM_B,
                          rop.DEBUG_MERGE_POINT,
                          rop.JIT_DEBUG,
                          rop.SETARRAYITEM_RAW,
@@ -347,7 +346,6 @@
                          rop.CALL_MALLOC_NURSERY_VARSIZE,
                          rop.CALL_MALLOC_NURSERY_VARSIZE_FRAME,
                          rop.LABEL,
-                         rop.STM_SET_REVISION_GC,
                          ):      # list of opcodes never executed by pyjitpl
                 continue
             raise AssertionError("missing %r" % (key,))
diff --git a/rpython/jit/metainterp/resoperation.py 
b/rpython/jit/metainterp/resoperation.py
--- a/rpython/jit/metainterp/resoperation.py
+++ b/rpython/jit/metainterp/resoperation.py
@@ -499,7 +499,6 @@
     'SETFIELD_RAW/2d',
     'STRSETITEM/3',
     'UNICODESETITEM/3',
-    'COND_CALL_STM_B/1d', # objptr (write/read barrier)
     'COND_CALL_GC_WB/1d',       # [objptr] (for the write barrier)
     'COND_CALL_GC_WB_ARRAY/2d', # [objptr, arrayindex] (write barr. for array)
     'DEBUG_MERGE_POINT/*',      # debugging only
@@ -511,7 +510,6 @@
     'RECORD_KNOWN_CLASS/2',   # [objptr, clsptr]
     'KEEPALIVE/1',
     'STM_TRANSACTION_BREAK/1',
-    'STM_SET_REVISION_GC/1d', # not really GC, writes raw to the header
 
     '_CANRAISE_FIRST', # ----- start of can_raise operations -----
     '_CALL_FIRST',
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