Author: Armin Rigo <[email protected]>
Branch:
Changeset: r70123:ab65db3705bd
Date: 2014-03-20 18:20 +0100
http://bitbucket.org/pypy/pypy/changeset/ab65db3705bd/
Log: From stm: to increment debug counters, replace the three
instructions with a single one.
diff --git a/rpython/jit/backend/llsupport/assembler.py
b/rpython/jit/backend/llsupport/assembler.py
--- a/rpython/jit/backend/llsupport/assembler.py
+++ b/rpython/jit/backend/llsupport/assembler.py
@@ -15,7 +15,7 @@
DEBUG_COUNTER = lltype.Struct('DEBUG_COUNTER',
# 'b'ridge, 'l'abel or # 'e'ntry point
- ('i', lltype.Signed),
+ ('i', lltype.Signed), # first field, at offset 0
('type', lltype.Char),
('number', lltype.Signed)
)
@@ -64,7 +64,6 @@
self.cpu = cpu
self.memcpy_addr = 0
self.rtyper = cpu.rtyper
- self.debug_counter_descr = cpu.fielddescrof(DEBUG_COUNTER, 'i')
self._debug = False
def setup_once(self):
@@ -265,14 +264,8 @@
def _append_debugging_code(self, operations, tp, number, token):
counter = self._register_counter(tp, number, token)
c_adr = ConstInt(rffi.cast(lltype.Signed, counter))
- box = BoxInt()
- box2 = BoxInt()
- ops = [ResOperation(rop.GETFIELD_RAW, [c_adr],
- box, descr=self.debug_counter_descr),
- ResOperation(rop.INT_ADD, [box, ConstInt(1)], box2),
- ResOperation(rop.SETFIELD_RAW, [c_adr, box2],
- None, descr=self.debug_counter_descr)]
- operations.extend(ops)
+ operations.append(
+ ResOperation(rop.INCREMENT_DEBUG_COUNTER, [c_adr], None))
def _register_counter(self, tp, number, token):
# YYY very minor leak -- we need the counters to stay alive
diff --git a/rpython/jit/backend/test/runner_test.py
b/rpython/jit/backend/test/runner_test.py
--- a/rpython/jit/backend/test/runner_test.py
+++ b/rpython/jit/backend/test/runner_test.py
@@ -4338,3 +4338,12 @@
assert rffi.cast(lltype.Signed, a[0]) == -7654
assert rffi.cast(lltype.Signed, a[1]) == 777
lltype.free(a, flavor='raw')
+
+ def test_increment_debug_counter(self):
+ foo = lltype.malloc(rffi.CArray(lltype.Signed), 1, flavor='raw')
+ foo[0] = 1789200
+ self.execute_operation(rop.INCREMENT_DEBUG_COUNTER,
+ [ConstInt(rffi.cast(lltype.Signed, foo))],
+ 'void')
+ assert foo[0] == 1789201
+ lltype.free(foo, flavor='raw')
diff --git a/rpython/jit/backend/x86/assembler.py
b/rpython/jit/backend/x86/assembler.py
--- a/rpython/jit/backend/x86/assembler.py
+++ b/rpython/jit/backend/x86/assembler.py
@@ -1469,6 +1469,14 @@
ofs_loc)
self.load_from_mem(resloc, src_addr, fieldsize_loc, sign_loc)
+ def genop_discard_increment_debug_counter(self, op, arglocs):
+ # The argument should be an immediate address. This should
+ # generate code equivalent to a GETFIELD_RAW, an ADD(1), and a
+ # SETFIELD_RAW. Here we use the direct from-memory-to-memory
+ # increment operation of x86.
+ base_loc, = arglocs
+ self.mc.INC(mem(base_loc, 0))
+
def genop_discard_setfield_gc(self, op, arglocs):
base_loc, ofs_loc, size_loc, value_loc = arglocs
assert isinstance(size_loc, ImmedLoc)
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -1003,6 +1003,10 @@
consider_getfield_raw_pure = consider_getfield_gc
consider_getfield_gc_pure = consider_getfield_gc
+ def consider_increment_debug_counter(self, op):
+ base_loc = self.loc(op.getarg(0))
+ self.perform_discard(op, [base_loc])
+
def consider_getarrayitem_gc(self, op):
itemsize, ofs, sign = unpack_arraydescr(op.getdescr())
args = op.getarglist()
diff --git a/rpython/jit/backend/x86/regloc.py
b/rpython/jit/backend/x86/regloc.py
--- a/rpython/jit/backend/x86/regloc.py
+++ b/rpython/jit/backend/x86/regloc.py
@@ -488,12 +488,22 @@
for possible_code in unrolling_location_codes:
if code == possible_code:
val = getattr(loc, "value_" + possible_code)()
- if self.WORD == 8 and possible_code == 'i' and not
rx86.fits_in_32bits(val):
- self._load_scratch(val)
+ # Faking out of certain operations for x86_64
+ fits32 = rx86.fits_in_32bits
+ if possible_code == 'i' and not fits32(val):
+ self._load_scratch(val) # for 'PUSH(imm)'
_rx86_getattr(self, name +
"_r")(X86_64_SCRATCH_REG.value)
- else:
- methname = name + "_" + possible_code
- _rx86_getattr(self, methname)(val)
+ return
+ if possible_code == 'j' and not fits32(val):
+ val = self._addr_as_reg_offset(val)
+ _rx86_getattr(self, name + "_m")(val)
+ return
+ if possible_code == 'm' and not fits32(val[1]):
+ val = self._fix_static_offset_64_m(val)
+ if possible_code == 'a' and not fits32(val[3]):
+ val = self._fix_static_offset_64_a(val)
+ methname = name + "_" + possible_code
+ _rx86_getattr(self, methname)(val)
return func_with_new_name(INSN, "INSN_" + name)
@@ -600,6 +610,7 @@
TEST8 = _binaryop('TEST8')
BTS = _binaryop('BTS')
+ INC = _unaryop('INC')
ADD = _binaryop('ADD')
SUB = _binaryop('SUB')
IMUL = _binaryop('IMUL')
diff --git a/rpython/jit/backend/x86/rx86.py b/rpython/jit/backend/x86/rx86.py
--- a/rpython/jit/backend/x86/rx86.py
+++ b/rpython/jit/backend/x86/rx86.py
@@ -470,6 +470,9 @@
# ------------------------------ Arithmetic ------------------------------
+ INC_m = insn(rex_w, '\xFF', orbyte(0), mem_reg_plus_const(1))
+ INC_j = insn(rex_w, '\xFF', orbyte(0), abs_(1))
+
ADD_ri,ADD_rr,ADD_rb,_,_,ADD_rm,ADD_rj,_,_ = common_modes(0)
OR_ri, OR_rr, OR_rb, _,_,OR_rm, OR_rj, _,_ = common_modes(1)
AND_ri,AND_rr,AND_rb,_,_,AND_rm,AND_rj,_,_ = common_modes(4)
diff --git a/rpython/jit/backend/x86/test/test_regloc.py
b/rpython/jit/backend/x86/test/test_regloc.py
--- a/rpython/jit/backend/x86/test/test_regloc.py
+++ b/rpython/jit/backend/x86/test/test_regloc.py
@@ -373,3 +373,56 @@
'\x59'
)
assert cb.getvalue() == expected_instructions
+
+ # ------------------------------------------------------------
+
+ def test_push_immed64(self):
+ immed = 0x0123456789ABCDEF
+ cb = LocationCodeBuilder64()
+ cb.PUSH(imm(immed))
+ #
+ expected_instructions = (
+ # mov r11, 0x0123456789ABCDEF
+ '\x49\xBB\xEF\xCD\xAB\x89\x67\x45\x23\x01'
+ # push r11
+ '\x41\x53'
+ )
+ assert cb.getvalue() == expected_instructions
+
+ def test_inc_64bit_address_1(self):
+ base_addr = 0x0123456789ABCDEF
+ cb = LocationCodeBuilder64()
+ cb.INC(AddressLoc(ImmedLoc(0), ImmedLoc(0), 0, base_addr))
+ # this case is a INC_j
+ #
+ expected_instructions = (
+ # mov r11, 0x0123456789ABCDEF
+ '\x49\xBB\xEF\xCD\xAB\x89\x67\x45\x23\x01'
+ # inc [r11]
+ '\x49\xFF\x03'
+ )
+ assert cb.getvalue() == expected_instructions
+
+ def test_inc_64bit_address_2(self):
+ py.test.skip("there is no unary instruction INSN_a so far")
+ base_addr = 0x0123456789ABCDEF
+ cb = LocationCodeBuilder64()
+ cb.INC(AddressLoc(ImmedLoc(0), edx, 3, base_addr))
+ # this case would be a INC_a
+ xxx
+
+ def test_inc_64bit_address_3(self):
+ base_addr = 0x0123456789ABCDEF
+ cb = LocationCodeBuilder64()
+ cb.INC(AddressLoc(eax, ImmedLoc(0), 0, base_addr))
+ # this case is a INC_m
+ #
+ expected_instructions = (
+ # mov r11, 0x0123456789ABCDEF
+ '\x49\xBB\xEF\xCD\xAB\x89\x67\x45\x23\x01'
+ # lea r11, [rax+r11]
+ '\x4E\x8D\x1C\x18'
+ # inc [r11]
+ '\x49\xFF\x03'
+ )
+ assert cb.getvalue() == expected_instructions
diff --git a/rpython/jit/backend/x86/test/test_runner.py
b/rpython/jit/backend/x86/test/test_runner.py
--- a/rpython/jit/backend/x86/test/test_runner.py
+++ b/rpython/jit/backend/x86/test/test_runner.py
@@ -427,8 +427,8 @@
debug._log = None
#
assert ops_offset is looptoken._x86_ops_offset
- # 2*(getfield_raw/int_add/setfield_raw) + ops + None
- assert len(ops_offset) == 2*3 + len(operations) + 1
+ # 2*increment_debug_counter + ops + None
+ assert len(ops_offset) == 2 + len(operations) + 1
assert (ops_offset[operations[0]] <=
ops_offset[operations[1]] <=
ops_offset[operations[2]] <=
diff --git a/rpython/jit/metainterp/executor.py
b/rpython/jit/metainterp/executor.py
--- a/rpython/jit/metainterp/executor.py
+++ b/rpython/jit/metainterp/executor.py
@@ -332,6 +332,7 @@
continue
if value in (rop.FORCE_TOKEN,
rop.CALL_ASSEMBLER,
+ rop.INCREMENT_DEBUG_COUNTER,
rop.COND_CALL_GC_WB,
rop.COND_CALL_GC_WB_ARRAY,
rop.DEBUG_MERGE_POINT,
diff --git a/rpython/jit/metainterp/resoperation.py
b/rpython/jit/metainterp/resoperation.py
--- a/rpython/jit/metainterp/resoperation.py
+++ b/rpython/jit/metainterp/resoperation.py
@@ -494,6 +494,7 @@
# must be forced, however we need to execute it anyway
'_NOSIDEEFFECT_LAST', # ----- end of no_side_effect operations -----
+ 'INCREMENT_DEBUG_COUNTER/1',
'SETARRAYITEM_GC/3d',
'SETARRAYITEM_RAW/3d',
'SETINTERIORFIELD_GC/3d',
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