Author: Armin Rigo <ar...@tunes.org>
Branch:
Changeset: r73206:622f29ad42ab
Date: 2014-08-30 13:43 +0200
http://bitbucket.org/pypy/pypy/changeset/622f29ad42ab/
Log: While we're at it, this DMB wait instruction is only needed if EQ.
diff --git a/rpython/jit/backend/arm/callbuilder.py
b/rpython/jit/backend/arm/callbuilder.py
--- a/rpython/jit/backend/arm/callbuilder.py
+++ b/rpython/jit/backend/arm/callbuilder.py
@@ -114,7 +114,7 @@
self.mc.STREX(r.r3.value, r.ip.value, r.r6.value, c=c.EQ)
# try to claim the lock
self.mc.CMP_ri(r.r3.value, 0, cond=c.EQ) # did this succeed?
- self.mc.DMB()
+ self.mc.DMB(c=c.EQ)
# the success of the lock acquisition is defined by
# 'EQ is true', or equivalently by 'r3 == 0'.
#
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