Author: Armin Rigo <[email protected]>
Branch: arm-longlong
Changeset: r73242:a1f2e41e252b
Date: 2014-08-31 19:49 +0300
http://bitbucket.org/pypy/pypy/changeset/a1f2e41e252b/
Log: Returning a long long
diff --git a/rpython/jit/backend/arm/callbuilder.py
b/rpython/jit/backend/arm/callbuilder.py
--- a/rpython/jit/backend/arm/callbuilder.py
+++ b/rpython/jit/backend/arm/callbuilder.py
@@ -441,6 +441,9 @@
resloc = self.resloc
if self.restype == 'S':
self.mc.VMOV_sc(resloc.value, r.s0.value)
+ elif self.restype == 'L':
+ assert resloc.is_vfp_reg()
+ self.mc.FMDRR(resloc.value, r.r0.value, r.r1.value)
# ensure the result is wellformed and stored in the correct location
if resloc is not None and resloc.is_core_reg():
self._ensure_result_bit_extension(resloc,
@@ -450,7 +453,10 @@
if self.resloc is None:
return [], []
if self.resloc.is_vfp_reg():
- return [], [r.d0]
+ if self.restype == 'L': # long long
+ return [r.r0, r.r1], []
+ else:
+ return [], [r.d0]
assert self.resloc.is_core_reg()
return [r.r0], []
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