Author: Brian Kearns <bdkea...@gmail.com> Branch: Changeset: r73388:76b2985de3ea Date: 2014-09-08 19:36 -0400 http://bitbucket.org/pypy/pypy/changeset/76b2985de3ea/
Log: merge heads diff --git a/pypy/doc/release-2.4.0.rst b/pypy/doc/release-2.4.0.rst --- a/pypy/doc/release-2.4.0.rst +++ b/pypy/doc/release-2.4.0.rst @@ -62,7 +62,8 @@ bytearray handling, and a major rewrite of the GIL handling. This means that external calls are now a lot faster, especially the CFFI ones. It also means better performance in a lot of corner cases with handling strings or -bytearrays. +bytearrays. The main bugfix is handling of many socket objects in your +program which in the long run used to "leak" memory. PyPy now uses Python 2.7.8 standard library. @@ -109,8 +110,9 @@ .. _`whats-new`: http://doc.pypy.org/en/latest/whatsnew-2.3.1.html .. _resolved: https://bitbucket.org/pypy/pypy/issues?status=resolved -We have further improvements on the way: rpython file handling and -usable numpy linalg compatabiity should be merged soon. +We have further improvements on the way: rpython file handling, +numpy linalg compatability, as well +as improved GC and many smaller improvements. Please try it out and let us know what you think. We especially welcome success stories, we know you are using PyPy, please tell us about it! diff --git a/rpython/jit/backend/arm/detect.py b/rpython/jit/backend/arm/detect.py --- a/rpython/jit/backend/arm/detect.py +++ b/rpython/jit/backend/arm/detect.py @@ -38,9 +38,9 @@ try: buf = os.read(fd, 2048) if not buf: + n = 6 # we assume ARMv6 as base case debug_print("Could not detect ARM architecture " "version, assuming", "ARMv%d" % n) - n = 6 # we asume ARMv6 as base case finally: os.close(fd) # "Processor : ARMv%d-compatible processor rev 7 (v6l)" diff --git a/rpython/jit/backend/arm/opassembler.py b/rpython/jit/backend/arm/opassembler.py --- a/rpython/jit/backend/arm/opassembler.py +++ b/rpython/jit/backend/arm/opassembler.py @@ -1128,6 +1128,8 @@ self.mc.VCVT_int_to_float(res.value, r.svfp_ip.value) return fcond + # the following five instructions are only ARMv7; + # regalloc.py won't call them at all on ARMv6 emit_op_llong_add = gen_emit_float_op('llong_add', 'VADD_i64') emit_op_llong_sub = gen_emit_float_op('llong_sub', 'VSUB_i64') emit_op_llong_and = gen_emit_float_op('llong_and', 'VAND_i64') diff --git a/rpython/jit/backend/arm/regalloc.py b/rpython/jit/backend/arm/regalloc.py --- a/rpython/jit/backend/arm/regalloc.py +++ b/rpython/jit/backend/arm/regalloc.py @@ -184,7 +184,7 @@ class Regalloc(BaseRegalloc): - def __init__(self, assembler=None): + def __init__(self, assembler): self.cpu = assembler.cpu self.assembler = assembler self.frame_manager = None @@ -290,7 +290,7 @@ return self.vfprm.convert_to_imm(value) def _prepare(self, inputargs, operations, allgcrefs): - cpu = self.assembler.cpu + cpu = self.cpu self.fm = ARMFrameManager(cpu.get_baseofs_of_frame_field()) self.frame_manager = self.fm operations = cpu.gc_ll_descr.rewrite_assembler(cpu, operations, @@ -550,18 +550,19 @@ EffectInfo.OS_LLONG_AND, EffectInfo.OS_LLONG_OR, EffectInfo.OS_LLONG_XOR): - args = self._prepare_llong_binop_xx(op, fcond) - self.perform_llong(op, args, fcond) - return - if oopspecindex == EffectInfo.OS_LLONG_TO_INT: + if self.cpu.cpuinfo.arch_version >= 7: + args = self._prepare_llong_binop_xx(op, fcond) + self.perform_llong(op, args, fcond) + return + elif oopspecindex == EffectInfo.OS_LLONG_TO_INT: args = self._prepare_llong_to_int(op, fcond) self.perform_llong(op, args, fcond) return - if oopspecindex == EffectInfo.OS_MATH_SQRT: + elif oopspecindex == EffectInfo.OS_MATH_SQRT: args = self.prepare_op_math_sqrt(op, fcond) self.perform_math(op, args, fcond) return - #if oopspecindex == EffectInfo.OS_MATH_READ_TIMESTAMP: + #elif oopspecindex == EffectInfo.OS_MATH_READ_TIMESTAMP: # ... return self._prepare_call(op) @@ -590,7 +591,7 @@ # spill variables that need to be saved around calls self.vfprm.before_call(save_all_regs=save_all_regs) if not save_all_regs: - gcrootmap = self.assembler.cpu.gc_ll_descr.gcrootmap + gcrootmap = self.cpu.gc_ll_descr.gcrootmap if gcrootmap and gcrootmap.is_shadow_stack: save_all_regs = 2 self.rm.before_call(save_all_regs=save_all_regs) @@ -1082,7 +1083,7 @@ gcmap = self.get_gcmap([r.r0, r.r1]) self.possibly_free_var(t) # - gc_ll_descr = self.assembler.cpu.gc_ll_descr + gc_ll_descr = self.cpu.gc_ll_descr self.assembler.malloc_cond_varsize_frame( gc_ll_descr.get_nursery_free_addr(), gc_ll_descr.get_nursery_top_addr(), @@ -1092,7 +1093,7 @@ self.assembler._alignment_check() def prepare_op_call_malloc_nursery_varsize(self, op, fcond): - gc_ll_descr = self.assembler.cpu.gc_ll_descr + gc_ll_descr = self.cpu.gc_ll_descr if not hasattr(gc_ll_descr, 'max_size_of_young_obj'): raise Exception("unreachable code") # for boehm, this function should never be called _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit
