Author: Armin Rigo <[email protected]>
Branch: portable-threadlocal
Changeset: r74745:4c60d918693c
Date: 2014-11-27 09:15 +0100
http://bitbucket.org/pypy/pypy/changeset/4c60d918693c/
Log: fix
diff --git a/rpython/jit/backend/arm/assembler.py
b/rpython/jit/backend/arm/assembler.py
--- a/rpython/jit/backend/arm/assembler.py
+++ b/rpython/jit/backend/arm/assembler.py
@@ -1156,7 +1156,7 @@
if loc.is_core_reg():
# load a value from 'SP + n'
assert prev_loc.value <= 0xFFF # not too far
- self.load_reg(self.mc, loc.value, r.sp, prev_loc.value, cond=cond)
+ self.load_reg(self.mc, loc, r.sp, prev_loc.value, cond=cond)
else:
assert 0, 'unsupported case'
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