Author: Maciej Fijalkowski <[email protected]>
Branch: optresult-unroll
Changeset: r79486:1c7cb11eb3da
Date: 2015-09-06 21:31 +0200
http://bitbucket.org/pypy/pypy/changeset/1c7cb11eb3da/
Log: merge
diff --git a/rpython/jit/backend/arm/assembler.py
b/rpython/jit/backend/arm/assembler.py
--- a/rpython/jit/backend/arm/assembler.py
+++ b/rpython/jit/backend/arm/assembler.py
@@ -948,7 +948,7 @@
if op.is_guard():
regalloc.possibly_free_vars(op.getfailargs())
if op.type != 'v':
- regalloc.possibly_free_var(op.result)
+ regalloc.possibly_free_var(op)
regalloc.possibly_free_vars_for_op(op)
regalloc.free_temp_vars()
regalloc._check_invariants()
diff --git a/rpython/jit/backend/arm/helper/regalloc.py
b/rpython/jit/backend/arm/helper/regalloc.py
--- a/rpython/jit/backend/arm/helper/regalloc.py
+++ b/rpython/jit/backend/arm/helper/regalloc.py
@@ -43,7 +43,7 @@
l1 = self.make_sure_var_in_reg(a1, boxes)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result, boxes)
+ res = self.force_allocate_reg(op, boxes)
return [l0, l1, res]
if name:
f.__name__ = name
@@ -53,7 +53,7 @@
loc1 = self.make_sure_var_in_reg(op.getarg(0))
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [loc1, res]
def prepare_two_regs_op(self, op, fcond):
@@ -61,7 +61,7 @@
loc2 = self.make_sure_var_in_reg(op.getarg(1))
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [loc1, loc2, res]
def prepare_float_cmp(self, op, fcond):
@@ -69,7 +69,7 @@
loc2 = self.make_sure_var_in_reg(op.getarg(1))
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg_or_cc(op.result)
+ res = self.force_allocate_reg_or_cc(op)
return [loc1, loc2, res]
def prepare_op_by_helper_call(name):
@@ -85,8 +85,8 @@
self.force_spill_var(a0)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- self.after_call(op.result)
- self.possibly_free_var(op.result)
+ self.after_call(op)
+ self.possibly_free_var(op)
return []
f.__name__ = name
return f
@@ -105,7 +105,7 @@
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg_or_cc(op.result)
+ res = self.force_allocate_reg_or_cc(op)
return [l0, l1, res]
def prepare_unary_cmp(self, op, fcond):
@@ -114,5 +114,5 @@
assert isinstance(a0, Box)
reg = self.make_sure_var_in_reg(a0)
self.possibly_free_vars_for_op(op)
- res = self.force_allocate_reg_or_cc(op.result)
+ res = self.force_allocate_reg_or_cc(op)
return [reg, res]
diff --git a/rpython/jit/backend/arm/opassembler.py
b/rpython/jit/backend/arm/opassembler.py
--- a/rpython/jit/backend/arm/opassembler.py
+++ b/rpython/jit/backend/arm/opassembler.py
@@ -15,14 +15,14 @@
from rpython.jit.backend.arm.helper.regalloc import VMEM_imm_size
from rpython.jit.backend.arm.codebuilder import InstrBuilder,
OverwritingBuilder
from rpython.jit.backend.arm.jump import remap_frame_layout
-from rpython.jit.backend.arm.regalloc import TempBox
+from rpython.jit.backend.arm.regalloc import TempVar
from rpython.jit.backend.arm.locations import imm, RawSPStackLocation
from rpython.jit.backend.llsupport import symbolic
from rpython.jit.backend.llsupport.gcmap import allocate_gcmap
from rpython.jit.backend.llsupport.descr import InteriorFieldDescr
from rpython.jit.backend.llsupport.assembler import GuardToken, BaseAssembler
from rpython.jit.backend.llsupport.regalloc import get_scale
-from rpython.jit.metainterp.history import (Box, AbstractFailDescr, ConstInt,
+from rpython.jit.metainterp.history import (AbstractFailDescr, ConstInt,
INT, FLOAT, REF)
from rpython.jit.metainterp.history import TargetToken
from rpython.jit.metainterp.resoperation import rop
@@ -269,29 +269,23 @@
offset = self.cpu.vtable_offset
if offset is not None:
self.mc.LDR_ri(r.ip.value, locs[0].value, offset, cond=fcond)
- self.mc.CMP_rr(r.ip.value, locs[1].value, cond=fcond)
+ self.mc.gen_load_int(r.lr.value, locs[1].value, cond=fcond)
+ self.mc.CMP_rr(r.ip.value, r.lr.value, cond=fcond)
else:
- typeid = locs[1]
- assert typeid.is_imm()
expected_typeid = (self.cpu.gc_ll_descr
- .get_typeid_from_classptr_if_gcremovetypeptr(typeid.value))
+
.get_typeid_from_classptr_if_gcremovetypeptr(locs[1].value))
self._cmp_guard_gc_type(locs[0], expected_typeid, fcond)
def _cmp_guard_gc_type(self, loc_ptr, expected_typeid, fcond=c.AL):
# Note that the typeid half-word is at offset 0 on a little-endian
# machine; it would be at offset 2 or 4 on a big-endian machine.
assert self.cpu.supports_guard_gc_type
- assert 0 <= expected_typeid <= 0xFFFF
- self.mc.LDRH_ri(r.ip.value, loc_ptr.value, 0,
- cond=fcond)
- xxxxxx #ENCODING NOT SUPPORTED HERE?
- self.mc.SUB_ri(r.ip.value, r.ip.value, expected_typeid & 0xFF00,
- cond=fcond)
- self.mc.CMP_ri(r.ip.value, expected_typeid & 0xFF,
- cond=fcond)
+ self.mc.LDRH_ri(r.ip.value, loc_ptr.value, cond=fcond)
+ self.mc.gen_load_int(r.lr.value, expected_typeid, cond=fcond)
+ self.mc.CMP_rr(r.ip.value, r.lr.value, cond=fcond)
def emit_op_guard_gc_type(self, op, arglocs, regalloc, fcond):
- self._cmp_guard_gc_type(arglocs[0], arglocs[1].value)
+ self._cmp_guard_gc_type(arglocs[0], arglocs[1].value, fcond)
self.guard_success_cc = c.EQ
self._emit_guard(op, arglocs[2:], save_exc=False)
return fcond
@@ -299,7 +293,6 @@
def emit_op_guard_is_object(self, op, arglocs, regalloc, fcond):
assert self.cpu.supports_guard_gc_type
loc_object = arglocs[0]
- loc_base_type_info = arglocs[1]
# idea: read the typeid, fetch one byte of the field 'infobits' from
# the big typeinfo table, and check the flag 'T_IS_RPYTHON_INSTANCE'.
self.mc.LDRH_ri(r.ip.value, loc_object.value)
@@ -309,26 +302,26 @@
infobits_offset, IS_OBJECT_FLAG = (
self.cpu.gc_ll_descr.get_translated_info_for_guard_is_object())
+ self.mc.gen_load_int(r.lr.value, base_type_info + infobits_offset)
if shift_by > 0:
self.mc.LSL_ri(r.ip.value, r.ip.value, shift_by)
- self.mc.LDRB_ri(r.ip.value, loc_base_type_info, r.ip.value)
- self.mc.TST_ri(r.ip.value, imm=IS_OBJECT_FLAG)
+ self.mc.LDRB_rr(r.ip.value, r.ip.value, r.lr.value)
+ self.mc.TST_ri(r.ip.value, imm=(IS_OBJECT_FLAG & 0xff))
self.guard_success_cc = c.NE
- self._emit_guard(op, arglocs[2:], save_exc=False)
+ self._emit_guard(op, arglocs[1:], save_exc=False)
return fcond
def emit_op_guard_subclass(self, op, arglocs, regalloc, fcond):
assert self.cpu.supports_guard_gc_type
loc_object = arglocs[0]
loc_check_against_class = arglocs[1]
- loc_ofs_subclassrange_min = arglocs[2]
offset = self.cpu.vtable_offset
offset2 = self.cpu.subclassrange_min_offset
if offset is not None:
# read this field to get the vtable pointer
- self.mc.LDR_ri(r.ip.value, loc_object.value, imm=offset)
+ self.mc.LDR_ri(r.ip.value, loc_object.value, offset)
# read the vtable's subclassrange_min field
- self.mc.LDR_ri(r.ip.value, r.ip.value, imm=offset2)
+ self.mc.LDR_ri(r.ip.value, r.ip.value, offset2)
else:
# read the typeid
self.mc.LDRH_ri(r.ip.value, loc_object.value)
@@ -336,20 +329,29 @@
# step with the correct offset
base_type_info, shift_by, sizeof_ti = (
self.cpu.gc_ll_descr.get_translated_info_for_typeinfo())
+
+ self.mc.gen_load_int(r.lr.value,
+ base_type_info + sizeof_ti + offset2)
if shift_by > 0:
self.mc.LSL_ri(r.ip.value, r.ip.value, shift_by)
- self.mc.LDR_ri(r.ip.value, loc_ofs_subclassrange_min.value,
- r.ip.value)
+ self.mc.LDR_rr(r.ip.value, r.ip.value, l.lr.value)
# get the two bounds to check against
vtable_ptr = loc_check_against_class.getint()
vtable_ptr = rffi.cast(rclass.CLASSTYPE, vtable_ptr)
check_min = vtable_ptr.subclassrange_min
check_max = vtable_ptr.subclassrange_max
+ assert check_max > check_min
+ check_diff = check_max - check_min - 1
# check by doing the unsigned comparison (tmp - min) < (max - min)
- self.mc.SUB_ri(r.ip.value, r.ip.value, check_min)
- self.mc.CMP_ri(r.ip.value, check_max - check_min)
- # the guard passes if we get a result of "below"
- self.guard_success_cc = c.LO
+ self.mc.gen_load_int(r.lr.value, check_min)
+ self.mc.SUB_rr(r.ip.value, r.ip.value, r.lr.value)
+ if check_diff <= 0xff:
+ self.mc.CMP_ri(r.ip.value, check_diff)
+ else:
+ self.mc.gen_load_int(r.lr.value, check_diff)
+ self.mc.CMP_rr(r.ip.value, r.lr.value)
+ # the guard passes if we get a result of "below or equal"
+ self.guard_success_cc = c.LS
self.implement_guard(guard_token)
def emit_op_guard_not_invalidated(self, op, locs, regalloc, fcond):
@@ -664,9 +666,16 @@
self._load_from_mem(res, base_loc, ofs, imm(scale), signed, fcond)
return fcond
- emit_op_getfield_raw = emit_op_getfield_gc
- emit_op_getfield_raw_pure = emit_op_getfield_gc
- emit_op_getfield_gc_pure = emit_op_getfield_gc
+ emit_op_getfield_gc_i = _genop_getfield
+ emit_op_getfield_gc_r = _genop_getfield
+ emit_op_getfield_gc_f = _genop_getfield
+ emit_op_getfield_gc_pure_i = _genop_getfield
+ emit_op_getfield_gc_pure_r = _genop_getfield
+ emit_op_getfield_gc_pure_f = _genop_getfield
+ emit_op_getfield_raw_i = _genop_getfield
+ emit_op_getfield_raw_f = _genop_getfield
+ emit_op_getfield_raw_pure_i = _genop_getfield
+ emit_op_getfield_raw_pure_f = _genop_getfield
def emit_op_increment_debug_counter(self, op, arglocs, regalloc, fcond):
base_loc, value_loc = arglocs
@@ -675,7 +684,7 @@
self.mc.STR_ri(value_loc.value, base_loc.value, 0, cond=fcond)
return fcond
- def _genop_interiorfield(self, op, arglocs, regalloc, fcond):
+ def _genop_getinteriorfield(self, op, arglocs, regalloc, fcond):
(base_loc, index_loc, res_loc,
ofs_loc, ofs, itemsize, fieldsize) = arglocs
scale = get_scale(fieldsize.value)
@@ -932,7 +941,7 @@
base_loc = regalloc.rm.make_sure_var_in_reg(args[0], args)
ofs_loc = regalloc.rm.make_sure_var_in_reg(args[2], args)
assert args[0] is not args[1] # forbidden case of aliasing
- srcaddr_box = TempBox()
+ srcaddr_box = TempVar()
forbidden_vars = [args[1], args[3], args[4], srcaddr_box]
srcaddr_loc = regalloc.rm.force_allocate_reg(srcaddr_box,
forbidden_vars)
self._gen_address_inside_string(base_loc, ofs_loc, srcaddr_loc,
@@ -941,7 +950,7 @@
base_loc = regalloc.rm.make_sure_var_in_reg(args[1], forbidden_vars)
ofs_loc = regalloc.rm.make_sure_var_in_reg(args[3], forbidden_vars)
forbidden_vars = [args[4], srcaddr_box]
- dstaddr_box = TempBox()
+ dstaddr_box = TempVar()
dstaddr_loc = regalloc.rm.force_allocate_reg(dstaddr_box,
forbidden_vars)
self._gen_address_inside_string(base_loc, ofs_loc, dstaddr_loc,
is_unicode=is_unicode)
@@ -950,7 +959,7 @@
length_loc = regalloc.loc(length_box)
if is_unicode:
forbidden_vars = [srcaddr_box, dstaddr_box]
- bytes_box = TempBox()
+ bytes_box = TempVar()
bytes_loc = regalloc.rm.force_allocate_reg(bytes_box,
forbidden_vars)
scale = self._get_unicode_item_scale()
if not length_loc.is_core_reg():
@@ -1176,7 +1185,7 @@
return regalloc.operations[regalloc.rm.position + delta]
def emit_op_call_malloc_gc(self, op, arglocs, regalloc, fcond):
- self.emit_op_call(op, arglocs, regalloc, fcond)
+ self._emit_call(op, arglocs, fcond=fcond)
self.propagate_memoryerror_if_r0_is_null()
self._alignment_check()
return fcond
@@ -1294,7 +1303,7 @@
# address that we will pass as first argument to memset().
# It can be in the same register as either one, but not in
# args[2], because we're still needing the latter.
- dstaddr_box = TempBox()
+ dstaddr_box = TempVar()
dstaddr_loc = regalloc.rm.force_allocate_reg(dstaddr_box, [args[2]])
if startindex >= 0: # a constant
ofs = baseofs + startindex * itemsize
@@ -1350,7 +1359,7 @@
# we need a register that is different from dstaddr_loc,
# but which can be identical to length_loc (as usual,
# only if the length_box is not used by future operations)
- bytes_box = TempBox()
+ bytes_box = TempVar()
bytes_loc = regalloc.rm.force_allocate_reg(bytes_box,
[dstaddr_box])
self.mc.gen_load_int(r.ip.value, itemsize)
diff --git a/rpython/jit/backend/arm/regalloc.py
b/rpython/jit/backend/arm/regalloc.py
--- a/rpython/jit/backend/arm/regalloc.py
+++ b/rpython/jit/backend/arm/regalloc.py
@@ -224,6 +224,8 @@
return self.rm.call_result_location(v)
def after_call(self, v):
+ if v.type == 'v':
+ return
if v.type == FLOAT:
return self.vfprm.after_call(v)
else:
@@ -433,9 +435,11 @@
locs = self._prepare_op_int_add(op, fcond)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return locs + [res]
+ prepare_op_nursery_ptr_increment = prepare_op_int_add
+
def _prepare_op_int_sub(self, op, fcond):
a0, a1 = boxes = op.getarglist()
imm_a0 = check_imm_box(a0)
@@ -455,7 +459,7 @@
locs = self._prepare_op_int_sub(op, fcond)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return locs + [res]
def prepare_op_int_mul(self, op, fcond):
@@ -467,19 +471,19 @@
self.possibly_free_vars(boxes)
self.possibly_free_vars_for_op(op)
- res = self.force_allocate_reg(op.result)
- self.possibly_free_var(op.result)
+ res = self.force_allocate_reg(op)
+ self.possibly_free_var(op)
return [reg1, reg2, res]
def prepare_op_int_force_ge_zero(self, op, fcond):
argloc = self.make_sure_var_in_reg(op.getarg(0))
- resloc = self.force_allocate_reg(op.result, [op.getarg(0)])
+ resloc = self.force_allocate_reg(op, [op.getarg(0)])
return [argloc, resloc]
def prepare_op_int_signext(self, op, fcond):
argloc = self.make_sure_var_in_reg(op.getarg(0))
numbytes = op.getarg(1).getint()
- resloc = self.force_allocate_reg(op.result)
+ resloc = self.force_allocate_reg(op)
return [argloc, imm(numbytes), resloc]
prepare_op_int_floordiv = prepare_op_by_helper_call('int_floordiv')
@@ -522,7 +526,7 @@
prepare_op_int_neg = prepare_unary_op
prepare_op_int_invert = prepare_unary_op
- def prepare_op_call(self, op, fcond):
+ def _prepare_op_call(self, op, fcond):
calldescr = op.getdescr()
assert calldescr is not None
effectinfo = calldescr.get_extra_info()
@@ -553,6 +557,11 @@
# ...
return self._prepare_call(op)
+ prepare_op_call_i = _prepare_op_call
+ prepare_op_call_r = _prepare_op_call
+ prepare_op_call_f = _prepare_op_call
+ prepare_op_call_n = _prepare_op_call
+
def _prepare_call(self, op, force_store=[], save_all_regs=False,
first_arg_index=1):
args = [None] * (op.numargs() + 3)
@@ -583,9 +592,7 @@
if gcrootmap and gcrootmap.is_shadow_stack:
save_all_regs = 2
self.rm.before_call(force_store, save_all_regs=save_all_regs)
- resloc = None
- if op.result:
- resloc = self.after_call(op.result)
+ resloc = self.after_call(op)
return resloc
def prepare_op_call_malloc_gc(self, op, fcond):
@@ -597,12 +604,12 @@
loc1 = self.make_sure_var_in_reg(op.getarg(2))
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.vfprm.force_allocate_reg(op.result)
+ res = self.vfprm.force_allocate_reg(op)
return [loc0, loc1, res]
def _prepare_llong_to_int(self, op, fcond):
loc0 = self.make_sure_var_in_reg(op.getarg(1))
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [loc0, res]
def _prepare_threadlocalref_get(self, op, fcond):
@@ -610,7 +617,7 @@
calldescr = op.getdescr()
size_loc = imm(calldescr.get_result_size())
sign_loc = imm(calldescr.is_result_signed())
- res_loc = self.force_allocate_reg(op.result)
+ res_loc = self.force_allocate_reg(op)
return [ofs_loc, size_loc, sign_loc, res_loc]
def _prepare_guard(self, op, args=None):
@@ -668,7 +675,6 @@
l1 = self.make_sure_var_in_reg(a1, boxes)
else:
l1 = self.convert_to_imm(a1)
- assert op.result is None
arglocs = self._prepare_guard(op, [l0, l1])
self.possibly_free_vars(op.getarglist())
self.possibly_free_vars(op.getfailargs())
@@ -690,7 +696,7 @@
loc1 = self.get_scratch_reg(INT, boxes)
if op in self.longevity:
resloc = self.force_allocate_reg(op, boxes)
- self.possibly_free_var(op.result)
+ self.possibly_free_var(op)
else:
resloc = None
pos_exc_value = imm(self.cpu.pos_exc_value())
@@ -709,19 +715,16 @@
boxes = op.getarglist()
x = self.make_sure_var_in_reg(boxes[0], boxes)
- y_val = rffi.cast(lltype.Signed, op.getarg(1).getint())
-
- arglocs = [x, imm(y_val)]
-
- offset = self.cpu.vtable_offset
- if offset is not None:
- y = self.get_scratch_reg(INT, forbidden_vars=boxes)
- self.assembler.load(y, arglocs[1])
- arglocs[1] = y
-
- return self._prepare_guard(op, arglocs)
+ y_val = rffi.cast(lltype.Signed, boxes[1].getint())
+ return self._prepare_guard(op, [x, imm(y_val)])
prepare_op_guard_nonnull_class = prepare_op_guard_class
+ prepare_op_guard_gc_type = prepare_op_guard_class
+ prepare_op_guard_subclass = prepare_op_guard_class
+
+ def prepare_op_guard_is_object(self, op, fcond):
+ loc_object = self.make_sure_var_in_reg(op.getarg(0))
+ return self._prepare_guard(op, [loc_object])
def compute_hint_frame_locations(self, operations):
# optimization only: fill in the 'hint_frame_locations' dictionary
@@ -814,7 +817,7 @@
ofs = op.getarg(1).getint()
return self._prepare_op_setfield([a0, ConstInt(0)], ofs, WORD)
- def prepare_op_getfield_gc(self, op, fcond):
+ def _prepare_op_getfield(self, op, fcond):
a0 = op.getarg(0)
ofs, size, sign = unpack_fielddescr(op.getdescr())
base_loc = self.make_sure_var_in_reg(a0)
@@ -827,12 +830,19 @@
self.assembler.load(ofs_loc, immofs)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [base_loc, ofs_loc, res, imm(size)]
- prepare_op_getfield_raw = prepare_op_getfield_gc
- prepare_op_getfield_raw_pure = prepare_op_getfield_gc
- prepare_op_getfield_gc_pure = prepare_op_getfield_gc
+ prepare_op_getfield_gc_i = _prepare_op_getfield
+ prepare_op_getfield_gc_r = _prepare_op_getfield
+ prepare_op_getfield_gc_f = _prepare_op_getfield
+ prepare_op_getfield_raw_i = _prepare_op_getfield
+ prepare_op_getfield_raw_f = _prepare_op_getfield
+ prepare_op_getfield_raw_pure_i = _prepare_op_getfield
+ prepare_op_getfield_raw_pure_f = _prepare_op_getfield
+ prepare_op_getfield_gc_pure_i = _prepare_op_getfield
+ prepare_op_getfield_gc_pure_r = _prepare_op_getfield
+ prepare_op_getfield_gc_pure_f = _prepare_op_getfield
def prepare_op_increment_debug_counter(self, op, fcond):
boxes = op.getarglist()
@@ -842,7 +852,7 @@
self.free_temp_vars()
return [base_loc, value_loc]
- def prepare_op_getinteriorfield_gc(self, op, fcond):
+ def _prepare_op_getinteriorfield(self, op, fcond):
t = unpack_interiorfielddescr(op.getdescr())
ofs, itemsize, fieldsize, sign = t
args = op.getarglist()
@@ -857,10 +867,14 @@
self.assembler.load(ofs_loc, immofs)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- result_loc = self.force_allocate_reg(op.result)
+ result_loc = self.force_allocate_reg(op)
return [base_loc, index_loc, result_loc, ofs_loc, imm(ofs),
imm(itemsize), imm(fieldsize)]
+ prepare_op_getinteriorfield_gc_i = _prepare_op_getinteriorfield
+ prepare_op_getinteriorfield_gc_r = _prepare_op_getinteriorfield
+ prepare_op_getinteriorfield_gc_f = _prepare_op_getinteriorfield
+
def prepare_op_setinteriorfield_gc(self, op, fcond):
t = unpack_interiorfielddescr(op.getdescr())
ofs, itemsize, fieldsize, sign = t
@@ -887,7 +901,7 @@
base_loc = self.make_sure_var_in_reg(arg)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [res, base_loc, imm(ofs)]
def prepare_op_setarrayitem_gc(self, op, fcond):
@@ -902,7 +916,7 @@
prepare_op_setarrayitem_raw = prepare_op_setarrayitem_gc
prepare_op_raw_store = prepare_op_setarrayitem_gc
- def prepare_op_getarrayitem_gc(self, op, fcond):
+ def _prepare_op_getarrayitem(self, op, fcond):
boxes = op.getarglist()
size, ofs, _ = unpack_arraydescr(op.getdescr())
scale = get_scale(size)
@@ -910,14 +924,22 @@
ofs_loc = self.make_sure_var_in_reg(boxes[1], boxes)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
assert check_imm_arg(ofs)
return [res, base_loc, ofs_loc, imm(scale), imm(ofs)]
- prepare_op_getarrayitem_raw = prepare_op_getarrayitem_gc
- prepare_op_getarrayitem_raw_pure = prepare_op_getarrayitem_gc
- prepare_op_getarrayitem_gc_pure = prepare_op_getarrayitem_gc
- prepare_op_raw_load = prepare_op_getarrayitem_gc
+ prepare_op_getarrayitem_gc_i = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_gc_r = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_gc_f = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_raw_i = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_raw_f = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_raw_pure_i = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_raw_pure_f = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_gc_pure_i = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_gc_pure_r = _prepare_op_getarrayitem
+ prepare_op_getarrayitem_gc_pure_f = _prepare_op_getarrayitem
+ prepare_op_raw_load_i = _prepare_op_getarrayitem
+ prepare_op_raw_load_f = _prepare_op_getarrayitem
def prepare_op_strlen(self, op, fcond):
args = op.getarglist()
@@ -934,8 +956,8 @@
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
- self.possibly_free_var(op.result)
+ res = self.force_allocate_reg(op)
+ self.possibly_free_var(op)
return [l0, l1, res]
def prepare_op_strgetitem(self, op, fcond):
@@ -951,7 +973,7 @@
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.STR,
self.cpu.translate_support_code)
@@ -985,7 +1007,7 @@
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [l0, l1, res]
def prepare_op_unicodegetitem(self, op, fcond):
@@ -995,7 +1017,7 @@
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
basesize, itemsize, ofs_length = symbolic.get_array_token(rstr.UNICODE,
self.cpu.translate_support_code)
@@ -1014,7 +1036,7 @@
return [value_loc, base_loc, ofs_loc,
imm(scale), imm(basesize), imm(itemsize)]
- def prepare_op_same_as(self, op, fcond):
+ def _prepare_op_same_as(self, op, fcond):
arg = op.getarg(0)
imm_arg = check_imm_box(arg)
if imm_arg:
@@ -1023,18 +1045,21 @@
argloc = self.make_sure_var_in_reg(arg)
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- resloc = self.force_allocate_reg(op.result)
+ resloc = self.force_allocate_reg(op)
return [argloc, resloc]
- prepare_op_cast_ptr_to_int = prepare_op_same_as
- prepare_op_cast_int_to_ptr = prepare_op_same_as
+ prepare_op_cast_ptr_to_int = _prepare_op_same_as
+ prepare_op_cast_int_to_ptr = _prepare_op_same_as
+ prepare_op_same_as_i = _prepare_op_same_as
+ prepare_op_same_as_r = _prepare_op_same_as
+ prepare_op_same_as_f = _prepare_op_same_as
def prepare_op_call_malloc_nursery(self, op, fcond):
size_box = op.getarg(0)
assert isinstance(size_box, ConstInt)
size = size_box.getint()
- self.rm.force_allocate_reg(op.result, selected_reg=r.r0)
+ self.rm.force_allocate_reg(op, selected_reg=r.r0)
t = TempInt()
self.rm.force_allocate_reg(t, selected_reg=r.r1)
@@ -1058,7 +1083,7 @@
sizeloc = self.rm.make_sure_var_in_reg(size_box)
self.rm.possibly_free_var(size_box)
#
- self.rm.force_allocate_reg(op.result, selected_reg=r.r0)
+ self.rm.force_allocate_reg(op, selected_reg=r.r0)
#
t = TempInt()
self.rm.force_allocate_reg(t, selected_reg=r.r1)
@@ -1084,7 +1109,7 @@
length_box = op.getarg(2)
assert not isinstance(length_box, Const) # we cannot have a const here!
# the result will be in r0
- self.rm.force_allocate_reg(op.result, selected_reg=r.r0)
+ self.rm.force_allocate_reg(op, selected_reg=r.r0)
# we need r1 as a temporary
tmp_box = TempVar()
self.rm.force_allocate_reg(tmp_box, selected_reg=r.r1)
@@ -1111,7 +1136,6 @@
prepare_op_leave_portal_frame = void
def prepare_op_cond_call_gc_wb(self, op, fcond):
- assert op.result is None
# we force all arguments in a reg because it will be needed anyway by
# the following setfield_gc or setarrayitem_gc. It avoids loading it
# twice from the memory.
@@ -1127,7 +1151,6 @@
prepare_op_cond_call_gc_wb_array = prepare_op_cond_call_gc_wb
def prepare_op_cond_call(self, op, fcond):
- assert op.result is None
assert 2 <= op.numargs() <= 4 + 2
tmpreg = self.get_scratch_reg(INT, selected_reg=r.r4)
v = op.getarg(1)
@@ -1145,8 +1168,7 @@
def prepare_op_force_token(self, op, fcond):
# XXX for now we return a regular reg
- res_loc = self.force_allocate_reg(op.result)
- self.possibly_free_var(op.result)
+ res_loc = self.force_allocate_reg(op)
return [res_loc]
def prepare_op_label(self, op, fcond):
@@ -1195,18 +1217,33 @@
self.assembler.store_force_descr(op, fail_locs[1:], fail_locs[0].value)
self.possibly_free_vars(op.getfailargs())
- def prepare_op_call_may_force(self, op, fcond):
+ def _prepare_op_call_may_force(self, op, fcond):
return self._prepare_call(op, save_all_regs=True)
- def prepare_op_call_release_gil(self, op, fcond):
+ prepare_op_call_may_force_i = _prepare_op_call_may_force
+ prepare_op_call_may_force_r = _prepare_op_call_may_force
+ prepare_op_call_may_force_f = _prepare_op_call_may_force
+ prepare_op_call_may_force_n = _prepare_op_call_may_force
+
+ def _prepare_op_call_release_gil(self, op, fcond):
return self._prepare_call(op, save_all_regs=True, first_arg_index=2)
- def prepare_op_call_assembler(self, op, fcond):
+ prepare_op_call_release_gil_i = _prepare_op_call_release_gil
+ prepare_op_call_release_gil_r = _prepare_op_call_release_gil
+ prepare_op_call_release_gil_f = _prepare_op_call_release_gil
+ prepare_op_call_release_gil_n = _prepare_op_call_release_gil
+
+ def _prepare_op_call_assembler(self, op, fcond):
locs = self.locs_for_call_assembler(op)
tmploc = self.get_scratch_reg(INT, selected_reg=r.r0)
resloc = self._call(op, locs + [tmploc], save_all_regs=True)
return locs + [resloc, tmploc]
+ prepare_op_call_assembler_i = _prepare_op_call_assembler
+ prepare_op_call_assembler_r = _prepare_op_call_assembler
+ prepare_op_call_assembler_f = _prepare_op_call_assembler
+ prepare_op_call_assembler_n = _prepare_op_call_assembler
+
def _prepare_args_for_new_op(self, new_args):
gc_ll_descr = self.cpu.gc_ll_descr
args = gc_ll_descr.args_for_new(new_args)
@@ -1236,18 +1273,17 @@
loc = self.make_sure_var_in_reg(op.getarg(1))
self.possibly_free_vars_for_op(op)
self.free_temp_vars()
- res = self.vfprm.force_allocate_reg(op.result)
- self.possibly_free_var(op.result)
+ res = self.vfprm.force_allocate_reg(op)
return [loc, res]
def prepare_op_cast_float_to_int(self, op, fcond):
loc1 = self.make_sure_var_in_reg(op.getarg(0))
- res = self.rm.force_allocate_reg(op.result)
+ res = self.rm.force_allocate_reg(op)
return [loc1, res]
def prepare_op_cast_int_to_float(self, op, fcond):
loc1 = self.make_sure_var_in_reg(op.getarg(0))
- res = self.vfprm.force_allocate_reg(op.result)
+ res = self.vfprm.force_allocate_reg(op)
return [loc1, res]
def prepare_force_spill(self, op, fcond):
@@ -1259,17 +1295,17 @@
#def prepare_op_read_timestamp(self, op, fcond):
# loc = self.get_scratch_reg(INT)
- # res = self.vfprm.force_allocate_reg(op.result)
+ # res = self.vfprm.force_allocate_reg(op)
# return [loc, res]
def prepare_op_cast_float_to_singlefloat(self, op, fcond):
loc1 = self.make_sure_var_in_reg(op.getarg(0))
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [loc1, res]
def prepare_op_cast_singlefloat_to_float(self, op, fcond):
loc1 = self.make_sure_var_in_reg(op.getarg(0))
- res = self.force_allocate_reg(op.result)
+ res = self.force_allocate_reg(op)
return [loc1, res]
diff --git a/rpython/jit/backend/arm/test/test_runner.py
b/rpython/jit/backend/arm/test/test_runner.py
--- a/rpython/jit/backend/arm/test/test_runner.py
+++ b/rpython/jit/backend/arm/test/test_runner.py
@@ -56,7 +56,7 @@
looptoken = JitCellToken()
targettoken = TargetToken()
operations = [
- ResOperation(rop.LABEL, inp, None, descr=targettoken),
+ ResOperation(rop.LABEL, inp, descr=targettoken),
ResOperation(rop.INT_ADD, [inp[0], inp[1]]),
ResOperation(rop.INT_ADD, [inp[2], inp[3]]),
ResOperation(rop.INT_ADD, [inp[4], inp[5]]),
@@ -103,7 +103,7 @@
lt2.outermost_jitdriver_sd = FakeJitDriverSD()
loop1 = parse('''
[i0]
- i1 = call_assembler(i0, descr=lt2)
+ i1 = call_assembler_i(i0, descr=lt2)
guard_not_forced()[]
finish(i1)
''', namespace=locals())
@@ -180,19 +180,19 @@
def test_float_field(self):
if not self.cpu.supports_floats:
py.test.skip('requires floats')
+ t_box, T_box, _ = self.alloc_instance(self.TFloat)
floatdescr = self.cpu.fielddescrof(self.SFloat, 'float')
- t_box, T_box = self.alloc_instance(self.TFloat)
self.execute_operation(rop.SETFIELD_GC, [t_box, boxfloat(3.4)],
'void', descr=floatdescr)
- res = self.execute_operation(rop.GETFIELD_GC, [t_box],
+ res = self.execute_operation(rop.GETFIELD_GC_F, [t_box],
'float', descr=floatdescr)
- assert res.getfloat() == 3.4
+ assert longlong.getrealfloat(res) == 3.4
#
self.execute_operation(rop.SETFIELD_GC, [t_box, constfloat(-3.6)],
'void', descr=floatdescr)
- res = self.execute_operation(rop.GETFIELD_GC, [t_box],
+ res = self.execute_operation(rop.GETFIELD_GC_F, [t_box],
'float', descr=floatdescr)
- assert res.getfloat() == -3.6
+ assert longlong.getrealfloat(res) == -3.6
def test_compile_loop_many_int_args(self):
for numargs in range(2, 30):
@@ -268,13 +268,13 @@
targettoken = TargetToken()
ops = """
[i0, f3]
- i2 = same_as(i0) # but forced to be in a register
+ i2 = same_as_i(i0) # but forced to be in a register
force_spill(i2)
force_spill(f3)
f4 = float_add(f3, 5.0)
label(f3, f4, descr=targettoken)
force_spill(f3)
- f5 = same_as(f3) # but forced to be in a register
+ f5 = same_as_f(f3) # but forced to be in a register
finish(f5)
"""
faildescr = BasicFailDescr(2)
@@ -283,8 +283,8 @@
info = self.cpu.compile_loop(loop.inputargs, loop.operations,
looptoken)
ops2 = """
[i0, f1]
- i1 = same_as(i0)
- f2 = same_as(f1)
+ i1 = same_as_i(i0)
+ f2 = same_as_f(f1)
f3 = float_add(f1, 10.0)
force_spill(f3)
force_spill(i1)
diff --git a/rpython/jit/backend/x86/regalloc.py
b/rpython/jit/backend/x86/regalloc.py
--- a/rpython/jit/backend/x86/regalloc.py
+++ b/rpython/jit/backend/x86/regalloc.py
@@ -1063,7 +1063,7 @@
consider_setarrayitem_raw = consider_setarrayitem_gc
consider_raw_store = consider_setarrayitem_gc
- def _consider_getfield_gc(self, op):
+ def _consider_getfield(self, op):
ofs, size, sign = unpack_fielddescr(op.getdescr())
ofs_loc = imm(ofs)
size_loc = imm(size)
@@ -1076,22 +1076,22 @@
sign_loc = imm0
self.perform(op, [base_loc, ofs_loc, size_loc, sign_loc], result_loc)
- consider_getfield_gc_i = _consider_getfield_gc
- consider_getfield_gc_r = _consider_getfield_gc
- consider_getfield_gc_f = _consider_getfield_gc
- consider_getfield_raw_i = _consider_getfield_gc
- consider_getfield_raw_f = _consider_getfield_gc
- consider_getfield_raw_pure_i = _consider_getfield_gc
- consider_getfield_raw_pure_f = _consider_getfield_gc
- consider_getfield_gc_pure_i = _consider_getfield_gc
- consider_getfield_gc_pure_r = _consider_getfield_gc
- consider_getfield_gc_pure_f = _consider_getfield_gc
+ consider_getfield_gc_i = _consider_getfield
+ consider_getfield_gc_r = _consider_getfield
+ consider_getfield_gc_f = _consider_getfield
+ consider_getfield_raw_i = _consider_getfield
+ consider_getfield_raw_f = _consider_getfield
+ consider_getfield_raw_pure_i = _consider_getfield
+ consider_getfield_raw_pure_f = _consider_getfield
+ consider_getfield_gc_pure_i = _consider_getfield
+ consider_getfield_gc_pure_r = _consider_getfield
+ consider_getfield_gc_pure_f = _consider_getfield
def consider_increment_debug_counter(self, op):
base_loc = self.loc(op.getarg(0))
self.perform_discard(op, [base_loc])
- def _consider_getarrayitem_gc(self, op):
+ def _consider_getarrayitem(self, op):
itemsize, ofs, sign = unpack_arraydescr(op.getdescr())
args = op.getarglist()
base_loc = self.rm.make_sure_var_in_reg(op.getarg(0), args)
@@ -1104,20 +1104,20 @@
self.perform(op, [base_loc, ofs_loc, imm(itemsize), imm(ofs),
sign_loc], result_loc)
- consider_getarrayitem_gc_i = _consider_getarrayitem_gc
- consider_getarrayitem_gc_r = _consider_getarrayitem_gc
- consider_getarrayitem_gc_f = _consider_getarrayitem_gc
- consider_getarrayitem_raw_i = _consider_getarrayitem_gc
- consider_getarrayitem_raw_f = _consider_getarrayitem_gc
- consider_getarrayitem_gc_pure_i = _consider_getarrayitem_gc
- consider_getarrayitem_gc_pure_r = _consider_getarrayitem_gc
- consider_getarrayitem_gc_pure_f = _consider_getarrayitem_gc
- consider_getarrayitem_raw_pure_i = _consider_getarrayitem_gc
- consider_getarrayitem_raw_pure_f = _consider_getarrayitem_gc
- consider_raw_load_i = _consider_getarrayitem_gc
- consider_raw_load_f = _consider_getarrayitem_gc
+ consider_getarrayitem_gc_i = _consider_getarrayitem
+ consider_getarrayitem_gc_r = _consider_getarrayitem
+ consider_getarrayitem_gc_f = _consider_getarrayitem
+ consider_getarrayitem_raw_i = _consider_getarrayitem
+ consider_getarrayitem_raw_f = _consider_getarrayitem
+ consider_getarrayitem_gc_pure_i = _consider_getarrayitem
+ consider_getarrayitem_gc_pure_r = _consider_getarrayitem
+ consider_getarrayitem_gc_pure_f = _consider_getarrayitem
+ consider_getarrayitem_raw_pure_i = _consider_getarrayitem
+ consider_getarrayitem_raw_pure_f = _consider_getarrayitem
+ consider_raw_load_i = _consider_getarrayitem
+ consider_raw_load_f = _consider_getarrayitem
- def _consider_getinteriorfield_gc(self, op):
+ def _consider_getinteriorfield(self, op):
t = unpack_interiorfielddescr(op.getdescr())
ofs, itemsize, fieldsize, sign = imm(t[0]), imm(t[1]), imm(t[2]), t[3]
if sign:
@@ -1145,9 +1145,9 @@
self.perform(op, [base_loc, ofs, itemsize, fieldsize,
index_loc, temp_loc, sign_loc], result_loc)
- consider_getinteriorfield_gc_i = _consider_getinteriorfield_gc
- consider_getinteriorfield_gc_r = _consider_getinteriorfield_gc
- consider_getinteriorfield_gc_f = _consider_getinteriorfield_gc
+ consider_getinteriorfield_gc_i = _consider_getinteriorfield
+ consider_getinteriorfield_gc_r = _consider_getinteriorfield
+ consider_getinteriorfield_gc_f = _consider_getinteriorfield
def consider_int_is_true(self, op):
# doesn't need arg to be in a register
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