Author: Richard Plangger <planri...@gmail.com> Branch: vecopt-merge Changeset: r79665:63c213404528 Date: 2015-09-17 12:35 +0200 http://bitbucket.org/pypy/pypy/changeset/63c213404528/
Log: reanimating the assembler with the new method names diff --git a/rpython/jit/backend/llgraph/runner.py b/rpython/jit/backend/llgraph/runner.py --- a/rpython/jit/backend/llgraph/runner.py +++ b/rpython/jit/backend/llgraph/runner.py @@ -212,7 +212,6 @@ kind == 'int' or \ kind == '' - def is_always_pure(self): return self._is_pure diff --git a/rpython/jit/backend/llsupport/assembler.py b/rpython/jit/backend/llsupport/assembler.py --- a/rpython/jit/backend/llsupport/assembler.py +++ b/rpython/jit/backend/llsupport/assembler.py @@ -3,7 +3,7 @@ from rpython.jit.backend.llsupport.symbolic import WORD from rpython.jit.backend.llsupport.codemap import CodemapBuilder from rpython.jit.metainterp.history import (INT, REF, FLOAT, VECTOR, - JitCellToken, ConstInt, BoxInt, AbstractFailDescr, BoxVector) + JitCellToken, ConstInt, AbstractFailDescr) from rpython.jit.metainterp.resoperation import ResOperation, rop from rpython.rlib import rgc from rpython.rlib.debug import (debug_start, debug_stop, have_debug_prints_for, diff --git a/rpython/jit/backend/x86/assembler.py b/rpython/jit/backend/x86/assembler.py --- a/rpython/jit/backend/x86/assembler.py +++ b/rpython/jit/backend/x86/assembler.py @@ -7,8 +7,7 @@ DEBUG_COUNTER, debug_bridge) from rpython.jit.backend.llsupport.asmmemmgr import MachineDataBlockWrapper from rpython.jit.backend.llsupport.gcmap import allocate_gcmap -from rpython.jit.metainterp.history import (Const, Box, VOID, - BoxVector, ConstInt) +from rpython.jit.metainterp.history import (Const, VOID, ConstInt) from rpython.jit.metainterp.history import AbstractFailDescr, INT, REF, FLOAT from rpython.jit.metainterp.compile import ResumeGuardDescr from rpython.rtyper.lltypesystem import lltype, rffi, rstr, llmemory @@ -1105,7 +1104,7 @@ def genop_cmp_float(self, op, arglocs, result_loc): if need_direct_p: direct_case = not isinstance(arglocs[1], RegLoc) - else: + else: direct_case = isinstance(arglocs[0], RegLoc) if direct_case: self.mc.UCOMISD(arglocs[0], arglocs[1]) @@ -1777,7 +1776,7 @@ # Note that the typeid half-word is at offset 0 on a little-endian # machine; it would be at offset 2 or 4 on a big-endian machine. assert self.cpu.supports_guard_gc_type - if IS_X86_32: + if IS_X86_32: self.mc.CMP16(mem(loc_ptr, 0), loc_expected_typeid) else: assert isinstance(loc_expected_typeid, ImmedLoc) @@ -2092,7 +2091,7 @@ self.guard_success_cc = rx86.Conditions['E'] self.implement_guard(guard_token) - def _genop_guard_call_may_force(self, op, guard_op, guard_token, + def _genop_call_may_force(self, op, guard_op, guard_token, arglocs, result_loc): self._store_force_index(guard_op) self._genop_call(op, arglocs, result_loc) diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py --- a/rpython/jit/backend/x86/regalloc.py +++ b/rpython/jit/backend/x86/regalloc.py @@ -22,9 +22,8 @@ from rpython.jit.backend.x86.vector_ext import VectorRegallocMixin from rpython.jit.codewriter import longlong from rpython.jit.codewriter.effectinfo import EffectInfo -from rpython.jit.metainterp.history import (Box, Const, ConstInt, ConstPtr, - ConstFloat, BoxInt, BoxFloat, BoxVector, INT, REF, - FLOAT, VECTOR, TargetToken) +from rpython.jit.metainterp.history import (Const, ConstInt, ConstPtr, + ConstFloat, INT, REF, FLOAT, VECTOR, TargetToken) from rpython.jit.metainterp.resoperation import rop, ResOperation from rpython.jit.metainterp.compile import ResumeGuardDescr from rpython.jit.metainterp.resume import AccumInfo @@ -1168,7 +1167,7 @@ consider_raw_load_i = _consider_getarrayitem consider_raw_load_f = _consider_getarrayitem - def _consider_getinteriorfield_gc(self, op): + def _consider_getinteriorfield(self, op): t = unpack_interiorfielddescr(op.getdescr()) ofs, itemsize, fieldsize, sign = imm(t[0]), imm(t[1]), imm(t[2]), t[3] if sign: @@ -1205,7 +1204,7 @@ argloc = self.loc(op.getarg(0)) self.rm.possibly_free_var(op.getarg(0)) resloc = self.force_allocate_reg_or_cc(op) - self.perform(op, [argloc], resloc) + self.perform(op, [argloc], resloc) consider_int_is_zero = consider_int_is_true diff --git a/rpython/jit/backend/x86/test/test_x86vector.py b/rpython/jit/backend/x86/test/test_x86vector.py --- a/rpython/jit/backend/x86/test/test_x86vector.py +++ b/rpython/jit/backend/x86/test/test_x86vector.py @@ -5,13 +5,13 @@ (TestRegallocPushPop as BaseTestAssembler) from rpython.jit.backend.detect_cpu import getcpuclass from rpython.jit.metainterp.history import ConstFloat -from rpython.jit.metainterp.test import support, test_metavec +from rpython.jit.metainterp.test import support, test_vector from rpython.jit.metainterp.warmspot import ll_meta_interp from rpython.rlib.jit import JitDriver from rpython.rtyper.lltypesystem import lltype -class TestBasic(test_metavec.VectorizeLLtypeTests, test_basic.Jit386Mixin): +class TestBasic(test_vector.VectorizeLLtypeTests, test_basic.Jit386Mixin): # for the individual tests see # ====> ../../../metainterp/test/test_basic.py enable_opts = 'intbounds:rewrite:virtualize:string:earlyforce:pure:heap:unroll' diff --git a/rpython/jit/backend/x86/vector_ext.py b/rpython/jit/backend/x86/vector_ext.py --- a/rpython/jit/backend/x86/vector_ext.py +++ b/rpython/jit/backend/x86/vector_ext.py @@ -1,7 +1,6 @@ import py from rpython.jit.metainterp.compile import ResumeGuardDescr -from rpython.jit.metainterp.history import (Box, Const, ConstInt, ConstPtr, - ConstFloat, BoxInt, BoxFloat, BoxVector, INT, REF, +from rpython.jit.metainterp.history import (ConstInt, INT, REF, FLOAT, VECTOR, TargetToken) from rpython.jit.backend.llsupport.descr import (ArrayDescr, CallDescr, unpack_arraydescr, unpack_fielddescr, unpack_interiorfielddescr) @@ -131,22 +130,29 @@ not_implemented("reduce sum for %s not impl." % arg) - def genop_vec_getarrayitem_raw(self, op, arglocs, resloc): + def _genop_vec_getarrayitem(self, op, arglocs, resloc): # considers item scale (raw_load does not) base_loc, ofs_loc, size_loc, ofs, integer_loc, aligned_loc = arglocs scale = get_scale(size_loc.value) src_addr = addr_add(base_loc, ofs_loc, ofs.value, scale) self._vec_load(resloc, src_addr, integer_loc.value, size_loc.value, aligned_loc.value) + + genop_vec_getarrayitem_raw_i = _genop_vec_getarrayitem + genop_vec_getarrayitem_raw_f = _genop_vec_getarrayitem + + genop_vec_getarrayitem_gc_i = _genop_vec_getarrayitem + genop_vec_getarrayitem_gc_f = _genop_vec_getarrayitem - genop_vec_getarrayitem_gc = genop_vec_getarrayitem_raw - - def genop_vec_raw_load(self, op, arglocs, resloc): + def _genop_vec_raw_load(self, op, arglocs, resloc): base_loc, ofs_loc, size_loc, ofs, integer_loc, aligned_loc = arglocs src_addr = addr_add(base_loc, ofs_loc, ofs.value, 0) self._vec_load(resloc, src_addr, integer_loc.value, size_loc.value, aligned_loc.value) + genop_vec_raw_load_i = _genop_vec_raw_load + genop_vec_raw_load_f = _genop_vec_raw_load + def _vec_load(self, resloc, src_addr, integer, itemsize, aligned): if integer: if aligned: @@ -159,7 +165,7 @@ elif itemsize == 8: self.mc.MOVUPD(resloc, src_addr) - def genop_discard_vec_setarrayitem_raw(self, op, arglocs): + def _genop_discard_vec_setarrayitem(self, op, arglocs): # considers item scale (raw_store does not) base_loc, ofs_loc, value_loc, size_loc, baseofs, integer_loc, aligned_loc = arglocs scale = get_scale(size_loc.value) @@ -167,7 +173,8 @@ self._vec_store(dest_loc, value_loc, integer_loc.value, size_loc.value, aligned_loc.value) - genop_discard_vec_setarrayitem_gc = genop_discard_vec_setarrayitem_raw + genop_discard_vec_setarrayitem_raw = _genop_discard_vec_setarrayitem + genop_discard_vec_setarrayitem_gc = _genop_discard_vec_setarrayitem def genop_discard_vec_raw_store(self, op, arglocs): base_loc, ofs_loc, value_loc, size_loc, baseofs, integer_loc, aligned_loc = arglocs @@ -385,7 +392,7 @@ msg = "vec int signext (%d->%d)" % (size, tosize) not_implemented(msg) - def genop_vec_float_expand(self, op, arglocs, resloc): + def genop_vec_expand_f(self, op, arglocs, resloc): srcloc, sizeloc = arglocs size = sizeloc.value if isinstance(srcloc, ConstFloatLoc): @@ -401,7 +408,7 @@ else: raise AssertionError("float of size %d not supported" % (size,)) - def genop_vec_int_expand(self, op, arglocs, resloc): + def genop_vec_expand_i(self, op, arglocs, resloc): srcloc, sizeloc = arglocs if not isinstance(srcloc, RegLoc): self.mov(srcloc, X86_64_SCRATCH_REG) @@ -425,7 +432,7 @@ else: raise AssertionError("cannot handle size %d (int expand)" % (size,)) - def genop_vec_int_pack(self, op, arglocs, resloc): + def genop_vec_pack_i(self, op, arglocs, resloc): resultloc, sourceloc, residxloc, srcidxloc, countloc, sizeloc = arglocs assert isinstance(resultloc, RegLoc) assert isinstance(sourceloc, RegLoc) @@ -477,9 +484,9 @@ ri += 1 k -= 1 - genop_vec_int_unpack = genop_vec_int_pack + genop_vec_unpack_i = genop_vec_pack_i - def genop_vec_float_pack(self, op, arglocs, resultloc): + def genop_vec_pack_f(self, op, arglocs, resultloc): resloc, srcloc, residxloc, srcidxloc, countloc, sizeloc = arglocs assert isinstance(resloc, RegLoc) assert isinstance(srcloc, RegLoc) @@ -533,7 +540,7 @@ self.mc.UNPCKHPD(resloc, srcloc) # if they are equal nothing is to be done - genop_vec_float_unpack = genop_vec_float_pack + genop_vec_unpack_f = genop_vec_pack_f def genop_vec_cast_float_to_singlefloat(self, op, arglocs, resloc): self.mc.CVTPD2PS(resloc, arglocs[0]) @@ -550,7 +557,7 @@ class VectorRegallocMixin(object): _mixin_ = True - def consider_vec_getarrayitem_raw(self, op): + def _consider_vec_getarrayitem(self, op): descr = op.getdescr() assert isinstance(descr, ArrayDescr) assert not descr.is_array_of_pointers() and \ @@ -565,10 +572,14 @@ self.perform(op, [base_loc, ofs_loc, imm(itemsize), imm(ofs), imm(integer), imm(aligned)], result_loc) - consider_vec_getarrayitem_gc = consider_vec_getarrayitem_raw - consider_vec_raw_load = consider_vec_getarrayitem_raw + consider_vec_getarrayitem_raw_i = _consider_vec_getarrayitem + consider_vec_getarrayitem_raw_f = _consider_vec_getarrayitem + consider_vec_getarrayitem_gc_i = _consider_vec_getarrayitem + consider_vec_getarrayitem_gc_f = _consider_vec_getarrayitem + consider_vec_raw_load_i = _consider_vec_getarrayitem + consider_vec_raw_load_f = _consider_vec_getarrayitem - def consider_vec_setarrayitem_raw(self, op): + def _consider_vec_setarrayitem(self, op): descr = op.getdescr() assert isinstance(descr, ArrayDescr) assert not descr.is_array_of_pointers() and \ @@ -584,8 +595,9 @@ self.perform_discard(op, [base_loc, ofs_loc, value_loc, imm(itemsize), imm(ofs), imm(integer), imm(aligned)]) - consider_vec_setarrayitem_gc = consider_vec_setarrayitem_raw - consider_vec_raw_store = consider_vec_setarrayitem_raw + consider_vec_setarrayitem_raw = _consider_vec_setarrayitem + consider_vec_setarrayitem_gc = _consider_vec_setarrayitem + consider_vec_raw_store = _consider_vec_setarrayitem def consider_vec_arith(self, op): lhs = op.getarg(0) @@ -647,8 +659,8 @@ consider_vec_int_xor = consider_vec_logic del consider_vec_logic - def consider_vec_int_pack(self, op): - # new_res = vec_int_pack(res, src, index, count) + def consider_vec_pack_i(self, op): + # new_res = vec_pack_i(res, src, index, count) arg = op.getarg(1) index = op.getarg(2) count = op.getarg(3) @@ -664,9 +676,9 @@ arglocs = [resloc, srcloc, imm(residx), imm(srcidx), imm(count.value), imm(size)] self.perform(op, arglocs, resloc) - consider_vec_float_pack = consider_vec_int_pack + consider_vec_pack_f = consider_vec_pack_i - def consider_vec_int_unpack(self, op): + def consider_vec_unpack_i(self, op): index = op.getarg(1) count = op.getarg(2) assert isinstance(index, ConstInt) @@ -688,14 +700,14 @@ arglocs = [resloc, srcloc, imm(residx), imm(index.value), imm(count.value), imm(size)] self.perform(op, arglocs, resloc) - consider_vec_float_unpack = consider_vec_int_unpack + consider_vec_unpack_f = consider_vec_unpack_i - def consider_vec_float_expand(self, op): + def consider_vec_expand_f(self, op): result = op.result assert isinstance(result, BoxVector) arg = op.getarg(0) args = op.getarglist() - if isinstance(arg, Const): + if arg.is_constant(): resloc = self.xrm.force_allocate_reg(result) srcloc = self.xrm.expand_float(result.getsize(), arg) else: @@ -705,10 +717,10 @@ size = op.result.getsize() self.perform(op, [srcloc, imm(size)], resloc) - def consider_vec_int_expand(self, op): + def consider_vec_expand_i(self, op): arg = op.getarg(0) args = op.getarglist() - if isinstance(arg, Const): + if arg.is_constant(): srcloc = self.rm.convert_to_imm(arg) else: srcloc = self.make_sure_var_in_reg(arg, args) @@ -739,9 +751,12 @@ else: self.perform(op, [resloc,imm(size)], None) - def consider_vec_box(self, op): + def _consider_vec(self, op): # pseudo instruction, needed to create a new variable self.xrm.force_allocate_reg(op.result) + + consider_vec_i = _consider_vec + consider_vec_f = _consider_vec def consider_guard_early_exit(self, op): pass _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit