Author: Armin Rigo <ar...@tunes.org> Branch: Changeset: r79680:3d4cfb56c6d1 Date: 2015-09-17 20:09 +0200 http://bitbucket.org/pypy/pypy/changeset/3d4cfb56c6d1/
Log: Fix the bug by removing possibly_free_vars() before force_allocate_reg_or_cc(), which doesn't change anything in the common case where force_allocate_reg_or_cc() would allocate the cc diff --git a/rpython/jit/backend/x86/regalloc.py b/rpython/jit/backend/x86/regalloc.py --- a/rpython/jit/backend/x86/regalloc.py +++ b/rpython/jit/backend/x86/regalloc.py @@ -567,7 +567,6 @@ pass else: arglocs[0] = self.rm.make_sure_var_in_reg(vx) - self.possibly_free_vars(args) loc = self.force_allocate_reg_or_cc(op) self.perform(op, arglocs, loc) @@ -605,7 +604,6 @@ arglocs[1] = self.xrm.make_sure_var_in_reg(vy) else: arglocs[0] = self.xrm.make_sure_var_in_reg(vx) - self.possibly_free_vars(op.getarglist()) loc = self.force_allocate_reg_or_cc(op) self.perform(op, arglocs, loc) @@ -1154,7 +1152,6 @@ def consider_int_is_true(self, op): # doesn't need arg to be in a register argloc = self.loc(op.getarg(0)) - self.rm.possibly_free_var(op.getarg(0)) resloc = self.force_allocate_reg_or_cc(op) self.perform(op, [argloc], resloc) _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit