Author: Richard Plangger <planri...@gmail.com> Branch: s390x-backend Changeset: r81762:b3a326be8820 Date: 2016-01-14 16:44 +0100 http://bitbucket.org/pypy/pypy/changeset/b3a326be8820/
Log: translation issue in guard_subclass, fixed autoencoding tests (had too generic argtype annotations) diff --git a/rpython/jit/backend/zarch/helper/regalloc.py b/rpython/jit/backend/zarch/helper/regalloc.py --- a/rpython/jit/backend/zarch/helper/regalloc.py +++ b/rpython/jit/backend/zarch/helper/regalloc.py @@ -1,4 +1,4 @@ -from rpython.jit.metainterp.history import ConstInt, FLOAT, Const +from rpython.jit.metainterp.history import AbstractValue, ConstInt, FLOAT, Const from rpython.jit.backend.zarch.locations import imm, addr from rpython.jit.backend.llsupport.regalloc import TempVar import rpython.jit.backend.zarch.registers as r diff --git a/rpython/jit/backend/zarch/instruction_builder.py b/rpython/jit/backend/zarch/instruction_builder.py --- a/rpython/jit/backend/zarch/instruction_builder.py +++ b/rpython/jit/backend/zarch/instruction_builder.py @@ -269,8 +269,8 @@ encode_base_displace(self, len_base_disp) return encode_ssf -def build_rs(mnemonic, (opcode,)): - @builder.arguments('r,r,bd') +def build_rs(mnemonic, (opcode,), argtypes='r,r,bd'): + @builder.arguments(argtypes) def encode_rs(self, reg1, reg3, base_displace): self.writechar(opcode) self.writechar(chr((reg1 & BIT_MASK_4) << 4 | reg3 & BIT_MASK_4)) diff --git a/rpython/jit/backend/zarch/instructions.py b/rpython/jit/backend/zarch/instructions.py --- a/rpython/jit/backend/zarch/instructions.py +++ b/rpython/jit/backend/zarch/instructions.py @@ -25,7 +25,7 @@ 'MSGR': ('rre', ['\xB9','\x0C']), 'MSG': ('rxy', ['\xE3','\x0C']), 'MSGFI': ('ril', ['\xC2','\x00']), - 'MLGR': ('rre', ['\xB9','\x86']), + 'MLGR': ('rre', ['\xB9','\x86'], 'eo,r'), # div/mod 'DSGR': ('rre', ['\xB9','\x0D'], 'eo,r'), 'DSG': ('rxy', ['\xE3','\x0D'], 'eo,bidl'), @@ -114,8 +114,8 @@ 'XI': ('si', ['\x97']), 'XIY': ('siy', ['\xEB','\x57']), - 'XILF': ('ril', ['\xC0','\x06']), - 'XIHF': ('ril', ['\xC0','\x07']), + 'XILF': ('ril', ['\xC0','\x07'], 'r/m,u32'), + 'XIHF': ('ril', ['\xC0','\x06'], 'r/m,u32'), # OR immediate 'OIHH': ('ri_u', ['\xA5', '\x08']), @@ -130,7 +130,7 @@ 'LAY': ('rxy', ['\xE3','\x71']), # move - 'MVCLE': ('rs', ['\xA8']), + 'MVCLE': ('rs', ['\xA8'], 'eo,eo,bd'), # load memory diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py --- a/rpython/jit/backend/zarch/opassembler.py +++ b/rpython/jit/backend/zarch/opassembler.py @@ -755,7 +755,7 @@ # read this field to get the vtable pointer self.mc.LG(r.SCRATCH2, l.addr(offset, loc_object)) # read the vtable's subclassrange_min field - assert check_imm(offset2) + assert check_imm_value(offset2) self.mc.load(r.SCRATCH2, r.SCRATCH2, offset2) else: # read the typeid _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit