Author: Richard Plangger <planri...@gmail.com> Branch: s390x-backend Changeset: r81848:8b6b10912648 Date: 2016-01-19 10:26 +0100 http://bitbucket.org/pypy/pypy/changeset/8b6b10912648/
Log: ensure the index arg of gc_load_indexed to be in a register (assembler assumed this), adding offset to _rewrite_changeable_constptrs diff --git a/rpython/jit/backend/llsupport/gc.py b/rpython/jit/backend/llsupport/gc.py --- a/rpython/jit/backend/llsupport/gc.py +++ b/rpython/jit/backend/llsupport/gc.py @@ -165,11 +165,11 @@ size, offset, _ = unpack_arraydescr(moving_obj_tracker.ptr_array_descr) factor = size - array_index = array_index * factor + array_index = array_index * factor + offset args = [moving_obj_tracker.const_ptr_gcref_array, ConstInt(array_index), ConstInt(1), # already multiplied to array_index - ConstInt(offset), + ConstInt(0), # already added ConstInt(size)] load_op = ResOperation(rop.GC_LOAD_INDEXED_R, args) newops.append(load_op) diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py --- a/rpython/jit/backend/zarch/opassembler.py +++ b/rpython/jit/backend/zarch/opassembler.py @@ -903,7 +903,7 @@ emit_gc_load_r = _emit_gc_load def _emit_gc_load_indexed(self, op, arglocs, regalloc): - result_loc, base_loc, index_loc, offset_loc, size_loc, sign_loc =arglocs + result_loc, base_loc, index_loc, offset_loc, size_loc, sign_loc=arglocs assert not result_loc.is_in_pool() assert not base_loc.is_in_pool() assert not index_loc.is_in_pool() diff --git a/rpython/jit/backend/zarch/regalloc.py b/rpython/jit/backend/zarch/regalloc.py --- a/rpython/jit/backend/zarch/regalloc.py +++ b/rpython/jit/backend/zarch/regalloc.py @@ -813,7 +813,7 @@ def _prepare_gc_load_indexed(self, op): base_loc = self.ensure_reg(op.getarg(0), force_in_reg=True) - index_loc = self.ensure_reg_or_any_imm(op.getarg(1)) + index_loc = self.ensure_reg(op.getarg(1), force_in_reg=True) scale_box = op.getarg(2) offset_box = op.getarg(3) size_box = op.getarg(4) @@ -979,11 +979,11 @@ return locs def prepare_cond_call_gc_wb(self, op): - arglocs = [self.ensure_reg(op.getarg(0))] + arglocs = [self.ensure_reg(op.getarg(0), force_in_reg=True)] return arglocs def prepare_cond_call_gc_wb_array(self, op): - arglocs = [self.ensure_reg(op.getarg(0)), + arglocs = [self.ensure_reg(op.getarg(0), force_in_reg=True), self.ensure_reg_or_16bit_imm(op.getarg(1)), None] if arglocs[1].is_reg(): _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit