Author: Richard Plangger <planri...@gmail.com>
Branch: s390x-backend
Changeset: r82062:38a946dc43e3
Date: 2016-02-03 18:49 +0100
http://bitbucket.org/pypy/pypy/changeset/38a946dc43e3/
Log: give the saved registers r10,r11,r12,r2,f0 some space on the stack.
this prevents overwriting of values if they are set in the calling
function
diff --git a/rpython/jit/backend/zarch/assembler.py
b/rpython/jit/backend/zarch/assembler.py
--- a/rpython/jit/backend/zarch/assembler.py
+++ b/rpython/jit/backend/zarch/assembler.py
@@ -182,9 +182,8 @@
RCS2 = r.r10
RCS3 = r.r12
- LOCAL_VARS_OFFSET = 0
- extra_stack_size = LOCAL_VARS_OFFSET + 4 * WORD + 8
- extra_stack_size = (extra_stack_size + 15) & ~15
+ # r10,r11,r12,r2,f0 -> makes exactly 4 words + 8 byte
+ extra_stack_size = 4 * WORD + 8
if for_frame:
# NOTE: don't save registers on the jitframe here! It might
# override already-saved values that will be restored
@@ -199,9 +198,10 @@
# the RPython exception that occurred in the CALL, if any).
#
off = STD_FRAME_SIZE_IN_BYTES
- mc.STMG(r.r10, r.r12, l.addr(off+10*WORD, r.SP))
- mc.STG(r.r2, l.addr(off+2*WORD, r.SP))
- mc.STD(r.f0, l.addr(off+16*WORD, r.SP))
+ mc.LAY(r.SP, l.addr(-extra_stack_size, r.SP))
+ mc.STMG(r.r10, r.r12, l.addr(off, r.SP))
+ mc.STG(r.r2, l.addr(off+3*WORD, r.SP))
+ mc.STD(r.f0, l.addr(off+4*WORD, r.SP))
saved_regs = None
saved_fp_regs = None
else:
@@ -250,9 +250,10 @@
if for_frame:
off = STD_FRAME_SIZE_IN_BYTES
- mc.LMG(r.r10, r.r12, l.addr(off+10*WORD, r.SP))
- mc.LG(r.r2, l.addr(off+2*WORD, r.SP))
- mc.LD(r.f0, l.addr(off+16*WORD, r.SP))
+ mc.LMG(r.r10, r.r12, l.addr(off, r.SP))
+ mc.LG(r.r2, l.addr(off+3*WORD, r.SP))
+ mc.LD(r.f0, l.addr(off+4*WORD, r.SP))
+ mc.LAY(r.SP, l.addr(extra_stack_size, r.SP))
else:
self._pop_core_regs_from_jitframe(mc, saved_regs)
self._pop_fp_regs_from_jitframe(mc, saved_fp_regs)
@@ -1259,15 +1260,15 @@
mc.load_imm(r.r1, nursery_free_adr)
mc.load(r.RES, r.r1, 0) # load nursery_free
- mc.load(r.r14, r.r1, diff) # load nursery_top
+ mc.load(r.r0, r.r1, diff) # load nursery_top
if check_imm_value(size):
- mc.AGHI(r.RSZ, l.imm(size))
+ mc.AGHIK(r.RSZ, r.RES, l.imm(size))
else:
mc.load_imm(r.RSZ, size)
mc.AGRK(r.RSZ, r.RES, r.RSZ)
- mc.cmp_op(r.RSZ, r.r14, signed=False)
+ mc.cmp_op(r.RSZ, r.r0, signed=False)
fast_jmp_pos = mc.currpos()
mc.reserve_cond_jump(short=True) # conditional jump, patched later
diff --git a/rpython/jit/backend/zarch/instructions.py
b/rpython/jit/backend/zarch/instructions.py
--- a/rpython/jit/backend/zarch/instructions.py
+++ b/rpython/jit/backend/zarch/instructions.py
@@ -175,6 +175,7 @@
'STG': ('rxy', ['\xE3','\x24']),
'STY': ('rxy', ['\xE3','\x50']),
'STHY': ('rxy', ['\xE3','\x70']),
+ 'STC': ('rx', ['\x42']),
'STCY': ('rxy', ['\xE3','\x72']),
# store float
diff --git a/rpython/jit/backend/zarch/opassembler.py
b/rpython/jit/backend/zarch/opassembler.py
--- a/rpython/jit/backend/zarch/opassembler.py
+++ b/rpython/jit/backend/zarch/opassembler.py
@@ -567,9 +567,9 @@
#mc.XIHF(tmp_loc, l.imm(0xffffFFFF))
#mc.XILF(tmp_loc, l.imm(0xffffFFFF))
- # set SCRATCH to 1 << r1
+ # set SCRATCH2 to 1 << r1
mc.LGHI(r.SCRATCH2, l.imm(1))
- mc.SLAG(r.SCRATCH, r.SCRATCH2, l.addr(0,r.SCRATCH))
+ mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH))
# set this bit inside the byte of interest
addr = l.addr(0, loc_base, tmp_loc)
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