Author: Richard Plangger <planri...@gmail.com> Branch: s390x-backend Changeset: r82068:ba08e7241de3 Date: 2016-02-04 09:25 +0100 http://bitbucket.org/pypy/pypy/changeset/ba08e7241de3/
Log: added two more tests to be sure the assembler behaves correctly diff --git a/rpython/jit/backend/zarch/opassembler.py b/rpython/jit/backend/zarch/opassembler.py --- a/rpython/jit/backend/zarch/opassembler.py +++ b/rpython/jit/backend/zarch/opassembler.py @@ -561,25 +561,22 @@ tmp_loc = arglocs[2] n = descr.jit_wb_card_page_shift - assert tmp_loc is not r.SCRATCH - assert tmp_loc is not r.SCRATCH2 + assert tmp_loc is not loc_index # compute in tmp_loc the byte offset: - # ~(index >> (card_page_shift + 3)) + # tmp_loc = ~(index >> (card_page_shift + 3)) mc.SRAG(tmp_loc, loc_index, l.addr(n+3)) + # invert the bits of tmp_loc + mc.XG(tmp_loc, l.pool(self.pool.constant_64_ones)) # compute in SCRATCH the index of the bit inside the byte: - # (index >> card_page_shift) & 7 + # scratch = (index >> card_page_shift) & 7 # 0x80 sets zero flag. will store 0 into all not selected bits mc.RISBGN(r.SCRATCH, loc_index, l.imm(61), l.imm(0x80 | 63), l.imm(64-n)) #mc.SRAG(r.SCRATCH, loc_index, l.addr(n)) #mc.NILL(r.SCRATCH, l.imm(0x7)) # set SCRATCH2 to 1 << r1 - # invert the bits of tmp_loc - #mc.XIHF(tmp_loc, l.imm(0xffffFFFF)) - #mc.XILF(tmp_loc, l.imm(0xffffFFFF)) - mc.XG(tmp_loc, l.pool(self.pool.constant_64_ones)) mc.LGHI(r.SCRATCH2, l.imm(1)) mc.SLAG(r.SCRATCH2, r.SCRATCH2, l.addr(0,r.SCRATCH)) diff --git a/rpython/jit/backend/zarch/test/test_assembler.py b/rpython/jit/backend/zarch/test/test_assembler.py --- a/rpython/jit/backend/zarch/test/test_assembler.py +++ b/rpython/jit/backend/zarch/test/test_assembler.py @@ -210,6 +210,23 @@ self.a.mc.BCR(con.ANY, r.r14) assert run_asm(self.a) == -1 + def test_and_7_with_risbgn(self): + n = 13 + l = loc + self.a.mc.load_imm(r.r2, 7<<n) + self.a.mc.RISBGN(r.r2, r.r2, l.imm(61), l.imm(0x80 | 63), l.imm(64-n)) + self.a.mc.BCR(con.ANY, r.r14) + assert run_asm(self.a) == 7 + + def test_risbgn(self): + n = 16 + l = loc + self.a.mc.load_imm(r.r2, 0xffFFffFF) + self.a.mc.RISBGN(r.r2, r.r2, l.imm(60), l.imm(0x80 | 63), l.imm(64-n)) + self.a.mc.BCR(con.ANY, r.r14) + assert run_asm(self.a) == 15 + + def test_load_small_int_to_reg(self): self.a.mc.LGHI(r.r2, loc.imm(123)) self.a.jmpto(r.r14) _______________________________________________ pypy-commit mailing list pypy-commit@python.org https://mail.python.org/mailman/listinfo/pypy-commit