Author: Richard Plangger <planri...@gmail.com>
Branch: ppc-vsx-support
Changeset: r85767:15cafdc0f60b
Date: 2016-07-18 17:51 +0200
http://bitbucket.org/pypy/pypy/changeset/15cafdc0f60b/
Log: defer vector_ext init to a point where release gil is possible
diff --git a/rpython/jit/backend/llsupport/vector_ext.py
b/rpython/jit/backend/llsupport/vector_ext.py
--- a/rpython/jit/backend/llsupport/vector_ext.py
+++ b/rpython/jit/backend/llsupport/vector_ext.py
@@ -195,6 +195,13 @@
self._enabled = False
self.register_size = 0 # in bytes
self.horizontal_operations = False
+ self._setup = False
+
+ def is_setup(self):
+ return self._setup
+
+ def setup_once(self):
+ raise NotImplementedError
def enable(self, vec_size, accum=False):
self._enabled = vec_size != 0
diff --git a/rpython/jit/backend/ppc/runner.py
b/rpython/jit/backend/ppc/runner.py
--- a/rpython/jit/backend/ppc/runner.py
+++ b/rpython/jit/backend/ppc/runner.py
@@ -45,9 +45,6 @@
@rgc.no_release_gil
def setup_once(self):
self.assembler.setup_once()
- if detect_vsx():
- self.vector_ext.enable(16, accum=True)
- self.assembler.setup_once_vector()
@rgc.no_release_gil
def finish_once(self):
diff --git a/rpython/jit/backend/ppc/vector_ext.py
b/rpython/jit/backend/ppc/vector_ext.py
--- a/rpython/jit/backend/ppc/vector_ext.py
+++ b/rpython/jit/backend/ppc/vector_ext.py
@@ -20,6 +20,7 @@
from rpython.jit.backend.llsupport.asmmemmgr import MachineDataBlockWrapper
from rpython.rtyper.lltypesystem import lltype, rffi
from rpython.jit.codewriter import longlong
+from rpython.jit.backend.ppc.detect_feature import detect_vsx
def not_implemented(msg):
msg = '[ppc/vector_ext] %s\n' % msg
@@ -64,7 +65,11 @@
asm.mc.vsel(resval, zeros, ones, resval)
class AltiVectorExt(VectorExt):
- pass
+ def setup_once(self, asm):
+ if detect_vsx():
+ self.vector_ext.enable(16, accum=True)
+ asm.setup_once_vector()
+ self._setup = True
class VectorAssembler(object):
_mixin_ = True
diff --git a/rpython/jit/metainterp/optimizeopt/__init__.py
b/rpython/jit/metainterp/optimizeopt/__init__.py
--- a/rpython/jit/metainterp/optimizeopt/__init__.py
+++ b/rpython/jit/metainterp/optimizeopt/__init__.py
@@ -46,6 +46,10 @@
or 'heap' not in enable_opts or 'pure' not in enable_opts):
optimizations.append(OptSimplify(unroll))
+ cpu = metainterp_sd.cpu
+ if not cpu.vector_ext.is_setup():
+ cpu.vector_ext.setup_once()
+
return optimizations, unroll
def optimize_trace(metainterp_sd, jitdriver_sd, compile_data, memo=None):
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