[pypy-commit] pypy arm64: (arigo)

[fijal]

Author: Maciej Fijalkowski <fij...@gmail.com>
Branch: arm64
Changeset: r96930:c13e72242f19
Date: 2019-07-03 07:58 +0000
http://bitbucket.org/pypy/pypy/changeset/c13e72242f19/

Log:    (arigo)

        Add the newer synchronization instructions to use

diff --git a/rpython/jit/backend/aarch64/codebuilder.py 
b/rpython/jit/backend/aarch64/codebuilder.py
--- a/rpython/jit/backend/aarch64/codebuilder.py
+++ b/rpython/jit/backend/aarch64/codebuilder.py
@@ -411,11 +411,25 @@
         base = 0b11101010000
         self.write32((base << 21) | (rm << 16) | (shift << 10) | (rn << 5) | 
0b11111)
 
+    def STLR(self, rt, rn):
+        base = 0b11001000100
+        self.write32((base << 21) | (0b11111 << 16) | (0b111111 << 10) | (rn 
<< 5) | rt)
+
+    def LDXR(self, rt, rn):
+        base = 0b1100100001011111011111
+        self.write32((base << 10) | (rn << 5) | rt)
+
+    def STXR(self, rs, rt, rn):
+        base = 0b11001000000
+        self.write32((base << 21) | (rs << 16) | (0b011111 << 10) | (rn << 5) 
| rt)
+
     def LDAXR(self, rt, rn):
+        # XXX DON'T USE
         base = 0b1100100001011111111111
         self.write32((base << 10) | (rn << 5) | rt)
 
     def STLXR(self, rt, rn, rs):
+        # XXX DON'T USE
         base = 0b11001000000
         self.write32((base << 21) | (rs << 16) | (0b111111 << 10) | (rn << 5) 
| rt)
 
@@ -463,6 +477,7 @@
         self.write32(0b11010100001 << 21)
 
     def DMB(self):
+        # XXX DON'T USE
         self.write32(0b11010101000000110011111110111111)
 
     def gen_load_int_full(self, r, value):
diff --git a/rpython/jit/backend/aarch64/test/test_instr_builder.py 
b/rpython/jit/backend/aarch64/test/test_instr_builder.py
--- a/rpython/jit/backend/aarch64/test/test_instr_builder.py
+++ b/rpython/jit/backend/aarch64/test/test_instr_builder.py
@@ -157,3 +157,18 @@
         cb = CodeBuilder()
         cb.BRK()
         assert cb.hexdump() == assemble("BRK 0")
+
+    def test_STLR(self):
+        cb = CodeBuilder()
+        cb.STLR(r.x11.value, r.x22.value)
+        assert cb.hexdump() == assemble("STLR x11, [x22]")
+
+    def test_LDXR(self):
+        cb = CodeBuilder()
+        cb.LDXR(r.x11.value, r.x22.value)
+        assert cb.hexdump() == assemble("LDXR x11, [x22]")
+
+    def test_STXR(self):
+        cb = CodeBuilder()
+        cb.STXR(r.x6.value, r.x11.value, r.x22.value)
+        assert cb.hexdump() == assemble("STXR w6, x11, [x22]")
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