Meador Inge <mead...@gmail.com> added the comment:
>> At a guess, BITS.M should therefore look like <Field type=c_int,
>> ofs=0:17, bits=1> instead.
>
> Refined guess: it should be <Field type=c_short, ofs=2:1, bits=1>.
This refined guess seems reasonable. Although, bitfield allocation order for
GCC is dependent on the target ABI. What you have above is at least consistent
with the System V i386 [1] and x86-64 [2] psABIs. Not sure about others (other
targets and MSVC++ related ones).
I tested the original test case plus the cases listed in the i386 psABI, all
which seem to work. I did notice that this doesn't seem to be right for
big-endian machines:
>>> from ctypes import *
>>> class S(BigEndianStructure):
... _fields_ = [("A", c_int, 17), ("B", c_short, 1)]
...
>>> class T(LittleEndianStructure):
... _fields_ = [("A", c_int, 17), ("B", c_short, 1)]
...
>>> s = S()
>>> s.B = 1
>>> s.B
-1
>>> t = T()
>>> t.B = 1
>>> t.B
0
The current implementation got the expected answer of -1 for 't.B' (although
that is actually incorrect anyway because bitfields should never be treated as
signed).
So some big-endian tests and some tests that check the values stored in the
fields will be useful.
Finally, I think proposed allocation seems correct, but I must admit I am not
clever enough to follow why the following part works :-)
+ /* Adjust current bit offset if necessary so that the next field
+ doesn't straddle a multiple of 8*dict->size. */
+ if (*pbitofs && (
+ (*pbitofs + bitsize - 1) % (8*dict->size) !=
+ bitsize + (*pbitofs - 1) % (8*dict->size)))
+ *pbitofs += (8*dict->size) - 1 - (*pbitofs - 1) % (8*dict->size);
[1] http://www.uclibc.org/docs/psABI-i386.pdf
[2] http://www.x86-64.org/documentation/abi.pdf
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<http://bugs.python.org/issue15119>
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