On Tue Jun 13, 2023 at 11:33 PM AEST, Philippe Mathieu-Daudé wrote: > Since we *might* have user emulation with softmmu, > replace the system emulation check by !user emulation one. > > Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org> > Reviewed-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Nicholas Piggin <npig...@gmail.com> > --- > target/ppc/cpu_init.c | 20 ++++++++++---------- > target/ppc/helper_regs.c | 6 ++---- > 2 files changed, 12 insertions(+), 14 deletions(-) > > diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c > index 9f97222655..7bce421a7c 100644 > --- a/target/ppc/cpu_init.c > +++ b/target/ppc/cpu_init.c > @@ -5841,7 +5841,7 @@ POWERPC_FAMILY(970)(ObjectClass *oc, void *data) > (1ull << MSR_PMM) | > (1ull << MSR_RI); > pcc->mmu_model = POWERPC_MMU_64B; > -#if defined(CONFIG_SOFTMMU) > +#if !defined(CONFIG_USER_ONLY) > pcc->hash64_opts = &ppc_hash64_opts_basic; > #endif > pcc->excp_model = POWERPC_EXCP_970; > @@ -5920,7 +5920,7 @@ POWERPC_FAMILY(POWER5P)(ObjectClass *oc, void *data) > pcc->lpcr_mask = LPCR_RMLS | LPCR_ILE | LPCR_LPES0 | LPCR_LPES1 | > LPCR_RMI | LPCR_HDICE; > pcc->mmu_model = POWERPC_MMU_2_03; > -#if defined(CONFIG_SOFTMMU) > +#if !defined(CONFIG_USER_ONLY) > pcc->hash64_opts = &ppc_hash64_opts_basic; > pcc->lrg_decr_bits = 32; > #endif > @@ -6037,7 +6037,7 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) > LPCR_LPES0 | LPCR_LPES1 | LPCR_HDICE; > pcc->lpcr_pm = LPCR_P7_PECE0 | LPCR_P7_PECE1 | LPCR_P7_PECE2; > pcc->mmu_model = POWERPC_MMU_2_06; > -#if defined(CONFIG_SOFTMMU) > +#if !defined(CONFIG_USER_ONLY) > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > #endif > @@ -6181,7 +6181,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > pcc->lpcr_pm = LPCR_P8_PECE0 | LPCR_P8_PECE1 | LPCR_P8_PECE2 | > LPCR_P8_PECE3 | LPCR_P8_PECE4; > pcc->mmu_model = POWERPC_MMU_2_07; > -#if defined(CONFIG_SOFTMMU) > +#if !defined(CONFIG_USER_ONLY) > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->lrg_decr_bits = 32; > pcc->n_host_threads = 8; > @@ -6197,7 +6197,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > pcc->l1_icache_size = 0x8000; > } > > -#ifdef CONFIG_SOFTMMU > +#ifndef CONFIG_USER_ONLY > /* > * Radix pg sizes and AP encodings for dt node > ibm,processor-radix-AP-encodings > * Encoded as array of int_32s in the form: > @@ -6214,7 +6214,7 @@ static struct ppc_radix_page_info > POWER9_radix_page_info = { > 0x4000001e /* 1G - enc: 0x2 */ > } > }; > -#endif /* CONFIG_SOFTMMU */ > +#endif /* CONFIG_USER_ONLY */ > > static void init_proc_POWER9(CPUPPCState *env) > { > @@ -6371,7 +6371,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) > LPCR_HEIC | LPCR_LPES0 | LPCR_HVICE | LPCR_HDICE; > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > -#if defined(CONFIG_SOFTMMU) > +#if !defined(CONFIG_USER_ONLY) > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER9_radix_page_info; > @@ -6389,7 +6389,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) > pcc->l1_icache_size = 0x8000; > } > > -#ifdef CONFIG_SOFTMMU > +#ifndef CONFIG_USER_ONLY > /* > * Radix pg sizes and AP encodings for dt node > ibm,processor-radix-AP-encodings > * Encoded as array of int_32s in the form: > @@ -6406,7 +6406,7 @@ static struct ppc_radix_page_info > POWER10_radix_page_info = { > 0x4000001e /* 1G - enc: 0x2 */ > } > }; > -#endif /* CONFIG_SOFTMMU */ > +#endif /* !CONFIG_USER_ONLY */ > > static void init_proc_POWER10(CPUPPCState *env) > { > @@ -6547,7 +6547,7 @@ POWERPC_FAMILY(POWER10)(ObjectClass *oc, void *data) > > pcc->lpcr_pm = LPCR_PDEE | LPCR_HDEE | LPCR_EEE | LPCR_DEE | LPCR_OEE; > pcc->mmu_model = POWERPC_MMU_3_00; > -#if defined(CONFIG_SOFTMMU) > +#if !defined(CONFIG_USER_ONLY) > /* segment page size remain the same */ > pcc->hash64_opts = &ppc_hash64_opts_POWER7; > pcc->radix_page_info = &POWER10_radix_page_info; > diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c > index bc7e9d7eda..e27f4a75a4 100644 > --- a/target/ppc/helper_regs.c > +++ b/target/ppc/helper_regs.c > @@ -310,7 +310,7 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, > int alter_hv) > return excp; > } > > -#ifdef CONFIG_SOFTMMU > +#ifndef CONFIG_USER_ONLY > void store_40x_sler(CPUPPCState *env, uint32_t val) > { > /* XXX: TO BE FIXED */ > @@ -320,9 +320,7 @@ void store_40x_sler(CPUPPCState *env, uint32_t val) > } > env->spr[SPR_405_SLER] = val; > } > -#endif /* CONFIG_SOFTMMU */ > > -#ifndef CONFIG_USER_ONLY > void check_tlb_flush(CPUPPCState *env, bool global) > { > CPUState *cs = env_cpu(env); > @@ -341,7 +339,7 @@ void check_tlb_flush(CPUPPCState *env, bool global) > tlb_flush(cs); > } > } > -#endif > +#endif /* !CONFIG_USER_ONLY */ > > /** > * _spr_register > -- > 2.38.1