On Jan 29 10:15, Klaus Jensen wrote:
> From: Klaus Jensen <k.jen...@samsung.com>
>
> Add support for TP 4065a ("Simple Copy Command"), v2020.05.04
> ("Ratified").
>
> The implementation uses a bounce buffer to first read in the source
> logical blocks, then issue a write of that bounce buffer. The default
> maximum number of source logical blocks is 128, translating to 512 KiB
> for 4k logical blocks which aligns with the default value of MDTS.
>
> Signed-off-by: Klaus Jensen <k.jen...@samsung.com>
> ---
> hw/block/nvme-ns.h | 4 +
> hw/block/nvme.h | 1 +
> hw/block/nvme-ns.c | 8 ++
> hw/block/nvme.c | 253 +++++++++++++++++++++++++++++++++++++++++-
> hw/block/trace-events | 7 ++
> 5 files changed, 272 insertions(+), 1 deletion(-)
>
> diff --git a/hw/block/trace-events b/hw/block/trace-events
> index c083000b8c1f..b26866ba4338 100644
> --- a/hw/block/trace-events
> +++ b/hw/block/trace-events
> @@ -43,12 +43,18 @@ pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t
> opcode, const char *opna
> pci_nvme_read(uint16_t cid, uint32_t nsid, uint32_t nlb, uint64_t count,
> uint64_t lba) "cid %"PRIu16" nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba
> 0x%"PRIx64""
> pci_nvme_write(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb,
> uint64_t count, uint64_t lba) "cid %"PRIu16" opname '%s' nsid %"PRIu32" nlb
> %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
> pci_nvme_rw_cb(uint16_t cid, const char *blkname) "cid %"PRIu16" blk '%s'"
> +pci_nvme_copy(uint16_t cid, uint32_t nsid, uint16_t nr, uint8_t format) "cid
> %"PRIu16" nsid %"PRIu32" nr %"PRIu16" format 0x%"PRIx8""
> +pci_nvme_copy_source_range(uint64_t slba, uint32_t nlb) "slba 0x%"PRIx64"
> nlb %"PRIu32""
> +pci_nvme_copy_in_complete(uint16_t cid) "cid %"PRIu16""
> +pci_nvme_copy_cb(uint16_t cid) "cid %"PRIu16""
> +pci_nvme_write_zeroes(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t
> nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""Woops. An old trace event ended up in there when rebasing.
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