On Sat, Mar 6, 2021 at 1:02 AM Bin Meng <bmeng...@gmail.com> wrote: > > From: Bin Meng <bin.m...@windriver.com> > > Per SST25VF016B datasheet [1], SST flash requires a dummy byte after > the address bytes. Note only SPI mode is supported by SST flashes. > > [1] http://ww1.microchip.com/downloads/en/devicedoc/s71271_04.pdf > > Signed-off-by: Bin Meng <bin.m...@windriver.com> > Acked-by: Alistair Francis <alistair.fran...@wdc.com>
Thanks! Applied to riscv-to-apply.next Alistair > > --- > > Changes in v2: > - rebase on qemu/master > > hw/block/m25p80.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c > index 5f9471d83c..183d3f44c2 100644 > --- a/hw/block/m25p80.c > +++ b/hw/block/m25p80.c > @@ -895,6 +895,9 @@ static void decode_fast_read_cmd(Flash *s) > s->needed_bytes = get_addr_length(s); > switch (get_man(s)) { > /* Dummy cycles - modeled with bytes writes instead of bits */ > + case MAN_SST: > + s->needed_bytes += 1; > + break; > case MAN_WINBOND: > s->needed_bytes += 8; > break; > -- > 2.25.1 > >