On Fri, Jul 29, 2022 at 03:25:55PM +0200, Cédric Le Goater wrote: > Hello Iris, > > On 7/29/22 01:23, Iris Chen wrote: > > Currently, most of our vboot platforms using a SPI-based TPM use the Linux > > SPI-GPIO driver to "bit-bang" the SPI protocol. This is because the Aspeed > > SPI controller (modeled in QEMU under hw/ssi/aspeed_smc.c) has an > > implementation > > deficiency that prevents bi-directional operations. > aspeed_smc models the Aspeed FMC/SPI controllers which have a well defined > HW interface. Your model proposal adds support for a new SPI controller > using bitbang GPIOs. These are really two differents models. I don't see > how you could reuse aspeed_smc for this purpose.
(I don't think there was anything here that proposed reusing the QEMU aspeed_smc model, but it might have been poorly worded). > or you mean that Linux is using the SPI-GPIO driver because the Linux > Aspeed SMC driver doesn't match the need ? It is true that the Linux > driver is not generic, it deals with flash devices only. But that's > another problem. We actually mean that the _hardware_ has a deficiency, not any of the code for it. The Aspeed SPI controller has a single byte FIFO in its implementation, which can only read or write in a single operation. It is *impossible* to perform bi-directional access with it (ie. you cannot write the MOSI and read the MISO in the same transaction). This is broken for many SPI protocols, other than flash devices, including the one used for TPMs. In order to connect to SPI-based TPMs on an Aspeed chip, you have to use the SPI-GPIO method. -- Patrick Williams
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