Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: a46c1244a0d65d5f37fc12e4d42f2479eac87b52
https://github.com/qemu/qemu/commit/a46c1244a0d65d5f37fc12e4d42f2479eac87b52
Author: Richard Henderson <richard.hender...@linaro.org>
Date: 2017-09-05 (Tue, 05 Sep 2017)
Changed paths:
M MAINTAINERS
M configure
M disas.c
M disas/Makefile.objs
R disas/ia64.c
R tcg/ia64/tcg-target.h
R tcg/ia64/tcg-target.inc.c
Log Message:
-----------
tcg: Remove support for ia64 as host
We threatened to remove ia64 as host in v2.9.0. Its time has now come.
There are still some usages of defined(__ia64__) throughout the source
code that would be triggered if one were to enable TCI on an ia64 host.
Leave those alone for now.
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 71650df7b0ee0600308810a267a123b971b3d533
https://github.com/qemu/qemu/commit/71650df7b0ee0600308810a267a123b971b3d533
Author: Pranith Kumar <bobby.pr...@gmail.com>
Date: 2017-09-05 (Tue, 05 Sep 2017)
Changed paths:
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/sparc/tcg-target.h
Log Message:
-----------
tcg: Add tcg target default memory ordering
Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com>
Message-Id: <20170829063313.10237-3-bobby.pr...@gmail.com>
[rth: Dropped ia64 hunk]
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: b32dc3370a666e237b2099c22166b15e58cb6df8
https://github.com/qemu/qemu/commit/b32dc3370a666e237b2099c22166b15e58cb6df8
Author: Pranith Kumar <bobby.pr...@gmail.com>
Date: 2017-09-05 (Tue, 05 Sep 2017)
Changed paths:
M tcg/tcg-op.c
Log Message:
-----------
tcg: Implement implicit ordering semantics
Currently, we cannot use mttcg for running strong memory model guests
on weak memory model hosts due to missing ordering semantics.
We implicitly generate fence instructions for stronger guests if an
ordering mismatch is detected. We generate fences only for the orders
for which fence instructions are necessary, for example a fence is not
necessary between a store and a subsequent load on x86 since its
absence in the guest binary tells that ordering need not be
ensured. Also note that if we find multiple subsequent fence
instructions in the generated IR, we combine them in the TCG
optimization pass.
This patch allows us to boot an x86 guest on ARM64 hosts using mttcg.
Signed-off-by: Pranith Kumar <bobby.pr...@gmail.com>
Message-Id: <20170829063313.10237-4-bobby.pr...@gmail.com>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Commit: 980edf4b694ed7a4f0b66cbfdbdc61be1b5c8738
https://github.com/qemu/qemu/commit/980edf4b694ed7a4f0b66cbfdbdc61be1b5c8738
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M disas/i386.c
Log Message:
-----------
disas/i386: Fix disassembly of two-byte vex prefixes
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: a17d3be6fb9bc1a0c310826b5ab0c24bb1635d97
https://github.com/qemu/qemu/commit/a17d3be6fb9bc1a0c310826b5ab0c24bb1635d97
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M disas/i386.c
Log Message:
-----------
disas/i386: Add disassembly of vex.0f38.f5
Which includes pext, pdep and bzhi.
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: bbde936a20ba4101eb7069b9266db09e17e61f3a
https://github.com/qemu/qemu/commit/bbde936a20ba4101eb7069b9266db09e17e61f3a
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M disas/i386.c
Log Message:
-----------
disas/i386: Add disassembly of rorx
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: 9b5500b697b61460f433f0e3a30619ace2c32ca6
https://github.com/qemu/qemu/commit/9b5500b697b61460f433f0e3a30619ace2c32ca6
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Fully convert tcg_target_op_def
Use a switch instead of searching a table.
Acked-by: Cornelia Huck <coh...@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: 07952d9570add4c78594b46605825408d956b2ad
https://github.com/qemu/qemu/commit/07952d9570add4c78594b46605825408d956b2ad
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Merge cmpi facilities check to tcg_target_op_def
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: a8f0269e9edde143d831b4a016b1e86c1f175123
https://github.com/qemu/qemu/commit/a8f0269e9edde143d831b4a016b1e86c1f175123
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Merge muli facilities check to tcg_target_op_def
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: ba18b07dc689a21caa31feee922c165e90b4c28b
https://github.com/qemu/qemu/commit/ba18b07dc689a21caa31feee922c165e90b4c28b
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Merge add2i facilities check to tcg_target_op_def
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: e42349cbd6afd1f6838e719184e3d07190c02de7
https://github.com/qemu/qemu/commit/e42349cbd6afd1f6838e719184e3d07190c02de7
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Merge ori+xori facilities check to tcg_target_op_def
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: c2097136ad6e3f476fd177fc3d2e48fa6bffacfd
https://github.com/qemu/qemu/commit/c2097136ad6e3f476fd177fc3d2e48fa6bffacfd
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.h
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Use distinct-operands facility
This allows using a 3-operand insn form for some arithmetic,
logicals and shifts.
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: 7af525af01b9615c4f4df5da2e8a50f2fe00b023
https://github.com/qemu/qemu/commit/7af525af01b9615c4f4df5da2e8a50f2fe00b023
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.h
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Use load-on-condition-2 facility
This allows LOAD HALFWORD IMMEDIATE ON CONDITION,
eliminating one insn in some common cases.
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: 4609190b5f7f68a5e2a8738029594f45a062d4c9
https://github.com/qemu/qemu/commit/4609190b5f7f68a5e2a8738029594f45a062d4c9
Author: Richard Henderson <r...@twiddle.net>
Date: 2017-09-06 (Wed, 06 Sep 2017)
Changed paths:
M tcg/s390/tcg-target.inc.c
Log Message:
-----------
tcg/s390: Use slbgr for setcond le and leu
Acked-by: Cornelia Huck <coh...@redhat.com>
Signed-off-by: Richard Henderson <r...@twiddle.net>
Commit: e6533b57d7d17a365bfc5e517bd096b7d405b5b5
https://github.com/qemu/qemu/commit/e6533b57d7d17a365bfc5e517bd096b7d405b5b5
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2017-09-07 (Thu, 07 Sep 2017)
Changed paths:
M MAINTAINERS
M configure
M disas.c
M disas/Makefile.objs
M disas/i386.c
R disas/ia64.c
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.h
R tcg/ia64/tcg-target.h
R tcg/ia64/tcg-target.inc.c
M tcg/mips/tcg-target.h
M tcg/ppc/tcg-target.h
M tcg/s390/tcg-target.h
M tcg/s390/tcg-target.inc.c
M tcg/sparc/tcg-target.h
M tcg/tcg-op.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170906' into staging
Queued tcg patches
# gpg: Signature made Wed 06 Sep 2017 15:27:16 BST
# gpg: using RSA key 0xAD1270CC4DD0279B
# gpg: Good signature from "Richard Henderson <rth7...@gmail.com>"
# gpg: aka "Richard Henderson <r...@twiddle.net>"
# Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B
* remotes/rth/tags/pull-tcg-20170906:
tcg/s390: Use slbgr for setcond le and leu
tcg/s390: Use load-on-condition-2 facility
tcg/s390: Use distinct-operands facility
tcg/s390: Merge ori+xori facilities check to tcg_target_op_def
tcg/s390: Merge add2i facilities check to tcg_target_op_def
tcg/s390: Merge muli facilities check to tcg_target_op_def
tcg/s390: Merge cmpi facilities check to tcg_target_op_def
tcg/s390: Fully convert tcg_target_op_def
disas/i386: Add disassembly of rorx
disas/i386: Add disassembly of vex.0f38.f5
disas/i386: Fix disassembly of two-byte vex prefixes
tcg: Implement implicit ordering semantics
tcg: Add tcg target default memory ordering
tcg: Remove support for ia64 as host
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Compare: https://github.com/qemu/qemu/compare/8ee5f9b3ecc9...e6533b57d7d1
