Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: d3434d9f785ddaf40e0fd521ded400643ac4be09
https://github.com/qemu/qemu/commit/d3434d9f785ddaf40e0fd521ded400643ac4be09
Author: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M target/mips/translate.c
Log Message:
-----------
target/mips: Add emulation of MMI instruction PCPYH
Add emulation of MMI instruction PCPYH. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arik...@wavecomp.com>
Message-Id: <1551712405-2530-2-git-send-email-mateja.marjano...@rt-rk.com>
Commit: b87eef31f2f8047077d79c3180e9c8e762d2a50f
https://github.com/qemu/qemu/commit/b87eef31f2f8047077d79c3180e9c8e762d2a50f
Author: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M target/mips/translate.c
Log Message:
-----------
target/mips: Add emulation of MMI instruction PCPYLD
Add emulation of MMI instruction PCPYLD. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arik...@wavecomp.com>
Message-Id: <1551712405-2530-3-git-send-email-mateja.marjano...@rt-rk.com>
Commit: fd487f83ea92d790559813c5a0a719c30ca9ecde
https://github.com/qemu/qemu/commit/fd487f83ea92d790559813c5a0a719c30ca9ecde
Author: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M target/mips/translate.c
Log Message:
-----------
target/mips: Add emulation of MMI instruction PCPYUD
Add emulation of MMI instruction PCPYUD. The emulation is implemented
using TCG front end operations directly to achieve better performance.
Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arik...@wavecomp.com>
Message-Id: <1551712405-2530-4-git-send-email-mateja.marjano...@rt-rk.com>
Commit: 750541c492018e01bad5f34b087397ee6a0b835b
https://github.com/qemu/qemu/commit/750541c492018e01bad5f34b087397ee6a0b835b
Author: Aleksandar Markovic <amarko...@wavecomp.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M tests/tcg/mips/include/test_utils_128.h
M tests/tcg/mips/include/wrappers_msa.h
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_w.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_b.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_d.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_h.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_w.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_b.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_d.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_h.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_w.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_s_d.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_s_h.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_s_w.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_u_d.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_u_h.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_u_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_w.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_b.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_d.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_h.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_w.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_b.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_d.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_h.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_w.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mul_q_h.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mul_q_w.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulr_q_h.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulr_q_w.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_b.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_d.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_h.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_b.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_b.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_s_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_s_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_s_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_u_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_u_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_u_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_w.c
M tests/tcg/mips/user/ase/msa/interleave/test_msa_ilvev_b.c
M tests/tcg/mips/user/ase/msa/interleave/test_msa_ilvev_d.c
M tests/tcg/mips/user/ase/msa/interleave/test_msa_ilvev_h.c
Log Message:
-----------
target/mips: Amend and cleanup MSA TCG tests
Add missing bits and peaces of the tests of the emulation of certain
MSA (non-immediate variants): some tests were missing two last cases;
some instructions were missing wrappers; some test included wrong
headers; some tests were missing altogether; updated some copywright
preambles; do several other minor cleanups.
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Reviewed-by: Aleksandar Rikalo <arik...@wavecomp.com>
Message-Id: <1555699081-24577-4-git-send-email-aleksandar.marko...@rt-rk.com>
Commit: 1d336c87a3c7e4ce9cf50895b7811928e0fe8b49
https://github.com/qemu/qemu/commit/1d336c87a3c7e4ce9cf50895b7811928e0fe8b49
Author: Aleksandar Markovic <amarko...@wavecomp.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_b.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_d.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_h.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_w.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_b.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_d.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_h.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_w.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_b.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_d.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_h.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_w.c
Log Message:
-----------
tests/tcg: target/mips: Add tests for MSA bit set instructions
Add tests for MSA bit set instructions. This includes following
instructions:
* BCLR.B - clear bit (bytes)
* BCLR.H - clear bit (halfwords)
* BCLR.W - clear bit (words)
* BCLR.D - clear bit (doublewords)
* BNEG.B - negate bit (bytes)
* BNEG.H - negate bit (halfwords)
* BNEG.W - negate bit (words)
* BNEG.D - negate bit (doublewords)
* BSET.B - set bit (bytes)
* BSET.H - set bit (halfwords)
* BSET.W - set bit (words)
* BSET.D - set bit (doublewords)
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arik...@wavecomp.com>
Message-Id: <1555699081-24577-5-git-send-email-aleksandar.marko...@rt-rk.com>
Commit: f49ab2e1e6ca4f218cc970c937f91f9c69c95dd3
https://github.com/qemu/qemu/commit/f49ab2e1e6ca4f218cc970c937f91f9c69c95dd3
Author: Aleksandar Markovic <amarko...@wavecomp.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M target/mips/dsp_helper.c
Log Message:
-----------
target/mips: Clean up dsp_helper.c
Remove several minor checkpatch warnings and errors.
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <phi...@redhat.com>
Message-Id: <1556018982-3715-6-git-send-email-aleksandar.marko...@rt-rk.com>
Commit: baf50011157bf5747c623f171f93f9e3d9dff615
https://github.com/qemu/qemu/commit/baf50011157bf5747c623f171f93f9e3d9dff615
Author: Aleksandar Markovic <amarko...@wavecomp.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M target/mips/lmi_helper.c
Log Message:
-----------
target/mips: Clean up lmi_helper.c
Remove several minor checkpatch warnings and errors.
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <phi...@redhat.com>
Message-Id: <1556018982-3715-7-git-send-email-aleksandar.marko...@rt-rk.com>
Commit: 0df911fd7f482b796c9f10aa8e086fb3fb9f0f18
https://github.com/qemu/qemu/commit/0df911fd7f482b796c9f10aa8e086fb3fb9f0f18
Author: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Date: 2019-06-01 (Sat, 01 Jun 2019)
Changed paths:
M target/mips/msa_helper.c
Log Message:
-----------
target/mips: Improve performance of certain MSA instructions
Eliminate loops for better performance.
Following MSA instructions from "UNOP" group are affected:
- NLZC.<B|H|W|D>
- NLOC.<B|H|W|D>
- PCNT.<B|H|W|D>
Following MSA instructions from "BINOP" group are affected:
- ADD_A.<B|H|W|D>
- ADDS_A.<B|H|W|D>
- ADDS_S.<B|H|W|D>
- ADDS_U.<B|H|W|D>
- ADDV.<B|H|W|D>
- ASUB_S.<B|H|W|D>
- ASUB_U.<B|H|W|D>
- AVE_S.<B|H|W|D>
- AVE_U.<B|H|W|D>
- AVER_S.<B|H|W|D>
- AVER_U.<B|H|W|D>
- BCLR.<B|H|W|D>
- BNEG.<B|H|W|D>
- BSET.<B|H|W|D>
- CEQ.<B|H|W|D>
- CLE_S.<B|H|W|D>
- CLE_U.<B|H|W|D>
- CLT_S.<B|H|W|D>
- CLT_U.<B|H|W|D>
- DIV_S.<B|H|W|D>
- DIV_U.<B|H|W|D>
- DOTP_S.<B|H|W|D>
- DOTP_U.<B|H|W|D>
- HADD_S.<B|H|W|D>
- HADD_U.<B|H|W|D>
- HSUB_S.<B|H|W|D>
- HSUB_U.<B|H|W|D>
- MAX_A.<B|H|W|D>
- MAX_S.<B|H|W|D>
- MAX_U.<B|H|W|D>
- MIN_A.<B|H|W|D>
- MIN_S.<B|H|W|D>
- MIN_U.<B|H|W|D>
- MOD_S.<B|H|W|D>
- MOD_U.<B|H|W|D>
- MUL_Q.<B|H|W|D>
- MULR_Q.<B|H|W|D>
- MULV.<B|H|W|D>
- SLL.<B|H|W|D>
- SRA.<B|H|W|D>
- SRAR.<B|H|W|D>
- SRL.<B|H|W|D>
- SRLR.<B|H|W|D>
- SUBS_S.<B|H|W|D>
- SUBS_U.<B|H|W|D>
- SUBSUS_U.<B|H|W|D>
- SUBSUU_S.<B|H|W|D>
- SUBV.<B|H|W|D>
Following MSA instructions from "TEROP" group are affected:
- BINSL.<B|H|W|D>
- BINSR.<B|H|W|D>
- DPADD_S.<B|H|W|D>
- DPADD_U.<B|H|W|D>
- DPSUB_S.<B|H|W|D>
- DPSUB_U.<B|H|W|D>
- MADD_Q.<B|H|W|D>
- MADDR_Q.<B|H|W|D>
- MADDV.<B|H|W|D>
- MSUB_Q.<B|H|W|D>
- MSUBR_Q.<B|H|W|D>
- MSUBV.<B|H|W|D>
Additionally, following MSA instructionas are also affected:
- ILVL.<B|H|W|D>
- ILVR.<B|H|W|D>
- ILVEV.<B|H|W|D>
- ILVOD.<B|H|W|D>
- PCKEV.<B|H|W|D>
- PCKOD.<B|H|W|D>
Signed-off-by: Mateja Marjanovic <mateja.marjano...@rt-rk.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Reviewed-by: Aleksandar Markovic <amarko...@wavecomp.com>
Message-Id: <1551718283-4487-2-git-send-email-mateja.marjano...@rt-rk.com>
Commit: ad88e4252f09c2956b99c90de39e95bab2e8e7af
https://github.com/qemu/qemu/commit/ad88e4252f09c2956b99c90de39e95bab2e8e7af
Author: Peter Maydell <peter.mayd...@linaro.org>
Date: 2019-06-03 (Mon, 03 Jun 2019)
Changed paths:
M target/mips/dsp_helper.c
M target/mips/lmi_helper.c
M target/mips/msa_helper.c
M target/mips/translate.c
M tests/tcg/mips/include/test_utils_128.h
M tests/tcg/mips/include/wrappers_msa.h
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_b.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_d.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_h.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bclr_w.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_b.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_d.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_h.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bneg_w.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_b.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_d.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_h.c
A tests/tcg/mips/user/ase/msa/bit-set/test_msa_bset_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_add_a_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_a_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_s_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_adds_u_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_b.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_addv_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_s_w.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_d.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_h.c
M tests/tcg/mips/user/ase/msa/int-add/test_msa_hadd_u_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_s_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_ave_u_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_s_w.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_b.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_d.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_h.c
M tests/tcg/mips/user/ase/msa/int-average/test_msa_aver_u_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_ceq_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_s_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_cle_u_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_s_w.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_b.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_d.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_h.c
M tests/tcg/mips/user/ase/msa/int-compare/test_msa_clt_u_w.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_b.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_d.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_h.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_s_w.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_b.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_d.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_h.c
M tests/tcg/mips/user/ase/msa/int-divide/test_msa_div_u_w.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_s_d.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_s_h.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_s_w.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_u_d.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_u_h.c
M tests/tcg/mips/user/ase/msa/int-dot-product/test_msa_dotp_u_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_a_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_s_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_max_u_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_a_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_s_w.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_b.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_d.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_h.c
M tests/tcg/mips/user/ase/msa/int-max-min/test_msa_min_u_w.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_b.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_d.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_h.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_s_w.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_b.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_d.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_h.c
A tests/tcg/mips/user/ase/msa/int-modulo/test_msa_mod_u_w.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mul_q_h.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mul_q_w.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulr_q_h.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulr_q_w.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_b.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_d.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_h.c
M tests/tcg/mips/user/ase/msa/int-multiply/test_msa_mulv_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_b.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_s_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_b.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_asub_u_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_s_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_s_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_s_w.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_u_d.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_u_h.c
A tests/tcg/mips/user/ase/msa/int-subtract/test_msa_hsub_u_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_s_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subs_u_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsus_u_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subsuu_s_w.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_b.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_d.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_h.c
M tests/tcg/mips/user/ase/msa/int-subtract/test_msa_subv_w.c
M tests/tcg/mips/user/ase/msa/interleave/test_msa_ilvev_b.c
M tests/tcg/mips/user/ase/msa/interleave/test_msa_ilvev_d.c
M tests/tcg/mips/user/ase/msa/interleave/test_msa_ilvev_h.c
Log Message:
-----------
Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-1-2019'
into staging
MIPS queue for June 1st, 2019
# gpg: Signature made Sat 01 Jun 2019 19:20:47 BST
# gpg: using RSA key D4972A8967F75A65
# gpg: Good signature from "Aleksandar Markovic <amarko...@wavecomp.com>"
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65
* remotes/amarkovic/tags/mips-queue-jun-1-2019:
target/mips: Improve performance of certain MSA instructions
target/mips: Clean up lmi_helper.c
target/mips: Clean up dsp_helper.c
tests/tcg: target/mips: Add tests for MSA bit set instructions
target/mips: Amend and cleanup MSA TCG tests
target/mips: Add emulation of MMI instruction PCPYUD
target/mips: Add emulation of MMI instruction PCPYLD
target/mips: Add emulation of MMI instruction PCPYH
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
Compare: https://github.com/qemu/qemu/compare/60905286cb51...ad88e4252f09
