Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: ce32a9e9912fd091d5ca7d604ae367b9d705eb87
https://github.com/qemu/qemu/commit/ce32a9e9912fd091d5ca7d604ae367b9d705eb87
Author: Helge Deller <[email protected]>
Date: 2023-10-14 (Sat, 14 Oct 2023)
Changed paths:
M pc-bios/hppa-firmware.img
M roms/seabios-hppa
Log Message:
-----------
target/hppa: Update to SeaBIOS-hppa version 10
Enhancements:
- Initial support for 64-bit CPUs with Astro/Elroy (e.g. C3700
workstation)
- USB support (OHCI)
- better PCI support
- esp-scsi fixes from Mark Cave-Ayland <[email protected]>
Signed-off-by: Helge Deller <[email protected]>
Commit: a536f564d3281014478ef100a0cd1204a47eb9e1
https://github.com/qemu/qemu/commit/a536f564d3281014478ef100a0cd1204a47eb9e1
Author: Helge Deller <[email protected]>
Date: 2023-10-17 (Tue, 17 Oct 2023)
Changed paths:
M hw/hppa/machine.c
Log Message:
-----------
hw/hppa: Require at least SeaBIOS-hppa version 10
The new SeaBIOS-hppa version 10 includes initial support
for PA2.0 CPUs.
Additionally update copyright and drop commented-out code.
Signed-off-by: Helge Deller <[email protected]>
Commit: 2e90154eea04c25bd30042ba4d6a9056e781437f
https://github.com/qemu/qemu/commit/2e90154eea04c25bd30042ba4d6a9056e781437f
Author: Helge Deller <[email protected]>
Date: 2023-10-17 (Tue, 17 Oct 2023)
Changed paths:
M hw/net/tulip.c
M include/hw/pci/pci_ids.h
Log Message:
-----------
pci_ids/tulip: Add PCI vendor ID for HP and use it in tulip
Signed-off-by: Helge Deller <[email protected]>
Commit: a1e6a5c46219bada2c7b932748527553b36559ae
https://github.com/qemu/qemu/commit/a1e6a5c46219bada2c7b932748527553b36559ae
Author: Helge Deller <[email protected]>
Date: 2023-10-17 (Tue, 17 Oct 2023)
Changed paths:
M hw/input/lasips2.c
Log Message:
-----------
lasips2: LASI PS/2 devices are not user-createable
Those PS/2 ports are created with the LASI controller when
a 32-bit PA-RISC machine is created.
Mark them not user-createable to avoid showing them in
the qemu device list.
Signed-off-by: Helge Deller <[email protected]>
Cc: [email protected]
Commit: a6c5d159ce8e2f8e4cf5a0cd58de12167dd72311
https://github.com/qemu/qemu/commit/a6c5d159ce8e2f8e4cf5a0cd58de12167dd72311
Author: John Snow <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M scripts/qapi/gen.py
M scripts/qapi/parser.py
Log Message:
-----------
qapi: re-establish linting baseline
Some very minor housekeeping to make the linters happy once more.
Signed-off-by: John Snow <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Markus Armbruster <[email protected]>
Commit: 0a59c02b0c4fd4591b010410bdfd423b9e259b03
https://github.com/qemu/qemu/commit/0a59c02b0c4fd4591b010410bdfd423b9e259b03
Author: Markus Armbruster <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M qapi/compat.json
Log Message:
-----------
qapi: Belatedly update CompatPolicy documentation for unstable
Commit 57df0dff1a1 (qapi: Extend -compat to set policy for unstable
interfaces) neglected to update the "Limitation" paragraph to mention
feature 'unstable' in addition to feature 'deprecated'. Do that now.
Signed-off-by: Markus Armbruster <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Commit: e307a8174bb876ba0ac91cf1c2ced01ec4374af9
https://github.com/qemu/qemu/commit/e307a8174bb876ba0ac91cf1c2ced01ec4374af9
Author: Daniel P. Berrangé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M scripts/qapi/schema.py
Log Message:
-----------
qapi: provide a friendly string representation of QAPI classes
If printing a QAPI schema object for debugging we get the classname and
a hex value for the instance:
<qapi.schema.QAPISchemaEnumType object at 0x7f0ab4c2dad0>
<qapi.schema.QAPISchemaObjectType object at 0x7f0ab4c2dd90>
<qapi.schema.QAPISchemaArrayType object at 0x7f0ab4c2df90>
With this change we instead get the classname and the human friendly
name of the QAPI type instance:
<QAPISchemaEnumType:CpuS390State at 0x7f0ab4c2dad0>
<QAPISchemaObjectType:CpuInfoS390 at 0x7f0ab4c2dd90>
<QAPISchemaArrayType:CpuInfoFastList at 0x7f0ab4c2df90>
Signed-off-by: Daniel P. Berrangé <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Markus Armbruster <[email protected]>
[Conditional swapped to avoid negation]
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
[Tweaked to mollify pylint]
Signed-off-by: Markus Armbruster <[email protected]>
Commit: 29ecf2de024b386acc72b53b9eb0c3559883d1b6
https://github.com/qemu/qemu/commit/29ecf2de024b386acc72b53b9eb0c3559883d1b6
Author: Thomas Huth <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/misc/bcm2835_property.c
A include/hw/arm/raspberrypi-fw-defs.h
R include/hw/misc/raspberrypi-fw-defs.h
Log Message:
-----------
hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder
The file is obviously related to the raspberrypi machine, so
it should reside in hw/arm/ instead of hw/misc/. And while we're
at it, also adjust the wildcard in MAINTAINERS so that it covers
this file, too.
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Acked-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 85c90d45f6bd0d931af5ff7cc37a8a34ab285489
https://github.com/qemu/qemu/commit/85c90d45f6bd0d931af5ff7cc37a8a34ab285489
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M include/hw/arm/exynos4210.h
M target/arm/cpu-qom.h
Log Message:
-----------
hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot.h'
struct arm_boot_info is declared in "hw/arm/boot.h".
By including the correct header we don't need to declare
it again in "target/arm/cpu-qom.h".
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 213bf5c1613e924f905f2cf9499dcf909db54e3e
https://github.com/qemu/qemu/commit/213bf5c1613e924f905f2cf9499dcf909db54e3e
Author: Tong Ho <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/nvram/xlnx-bbram.c
Log Message:
-----------
xlnx-bbram: hw/nvram: Remove deprecated device reset
This change implements the ResettableClass interface for the device.
Signed-off-by: Tong Ho <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 7667b51524c58c73f4fa3ed891bfdfeb870d05be
https://github.com/qemu/qemu/commit/7667b51524c58c73f4fa3ed891bfdfeb870d05be
Author: Tong Ho <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/nvram/xlnx-zynqmp-efuse.c
Log Message:
-----------
xlnx-zynqmp-efuse: hw/nvram: Remove deprecated device reset
This change implements the ResettableClass interface for the device.
Signed-off-by: Tong Ho <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 51244b5911483d12a4cde26b1facd19c8600751d
https://github.com/qemu/qemu/commit/51244b5911483d12a4cde26b1facd19c8600751d
Author: Tong Ho <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/nvram/xlnx-versal-efuse-ctrl.c
Log Message:
-----------
xlnx-versal-efuse: hw/nvram: Remove deprecated device reset
This change implements the ResettableClass interface for the device.
Signed-off-by: Tong Ho <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: b65b4b7ae3c873dc2f8f4ce65ea5cedc45be3938
https://github.com/qemu/qemu/commit/b65b4b7ae3c873dc2f8f4ce65ea5cedc45be3938
Author: Tong Ho <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M include/hw/nvram/xlnx-bbram.h
Log Message:
-----------
xlnx-bbram: hw/nvram: Use dot in device type name
This replaces the comma (,) to dot (.) in the device type name
so the name can be used with the 'driver=' command line option.
Signed-off-by: Tong Ho <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 8b01683e857a80425ea67dc44505b4983fc11a8e
https://github.com/qemu/qemu/commit/8b01683e857a80425ea67dc44505b4983fc11a8e
Author: Viktor Prutyanov <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M contrib/elf2dmp/main.c
Log Message:
-----------
elf2dmp: limit print length for sign_rsds
String sign_rsds isn't terminated, so the print length must be limited.
Fixes: Coverity CID 1521598
Signed-off-by: Viktor Prutyanov <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 9d9c06b144da340b9a937ed01d45a936810715be
https://github.com/qemu/qemu/commit/9d9c06b144da340b9a937ed01d45a936810715be
Author: Viktor Prutyanov <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M contrib/elf2dmp/pdb.c
Log Message:
-----------
elf2dmp: check array bounds in pdb_get_file_size
Index in file_size array must be checked against num_files, because the
entries we are looking for may be absent in the PDB.
Fixes: Coverity CID 1521597
Signed-off-by: Viktor Prutyanov <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: d01448c79d89cfdc86228081b1dd1dfaf85fb4c3
https://github.com/qemu/qemu/commit/d01448c79d89cfdc86228081b1dd1dfaf85fb4c3
Author: Michal Orzel <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0
On an attempt to access CNTPCT_EL0 from EL0 using a guest running on top
of Xen, a trap from EL2 was observed which is something not reproducible
on HW (also, Xen does not trap accesses to physical counter).
This is because gt_counter_access() checks for an incorrect bit (1
instead of 0) of CNTHCTL_EL2 if HCR_EL2.E2H is 0 and access is made to
physical counter. Refer ARM ARM DDI 0487J.a, D19.12.2:
When HCR_EL2.E2H is 0:
- EL1PCTEN, bit [0]: refers to physical counter
- EL1PCEN, bit [1]: refers to physical timer registers
Drop entire block "if (hcr & HCR_E2H) {...} else {...}" from EL0 case
and fall through to EL1 case, given that after fixing checking for the
correct bit, the handling is the same.
Fixes: 5bc8437136fb ("target/arm: Update timer access for VHE")
Signed-off-by: Michal Orzel <[email protected]>
Tested-by: Oleksandr Tyshchenko <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 9036e917f8357f4e5965ebfecdab5964d40e6a40
https://github.com/qemu/qemu/commit/9036e917f8357f4e5965ebfecdab5964d40e6a40
Author: Leif Lindholm <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M include/hw/arm/virt.h
Log Message:
-----------
{include/}hw/arm: refactor virt PPI logic
GIC Private Peripheral Interrupts (PPI) are defined as GIC INTID 16-31.
As in, PPI0 is INTID16 .. PPI15 is INTID31.
Arm's Base System Architecture specification (BSA) lists the mandated and
recommended private interrupt IDs by INTID, not by PPI index. But current
definitions in virt define them by PPI index, complicating cross
referencing.
Meanwhile, the PPI(x) macro counterintuitively adds 16 to the input value,
converting a PPI index to an INTID.
Resolve this by redefining the BSA-allocated PPIs by their INTIDs,
and replacing the PPI(x) macro with an INTID_TO_PPI(x) one where required.
Signed-off-by: Leif Lindholm <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 2419ce83fce2300e61b5e6df256caddaa07a2ae0
https://github.com/qemu/qemu/commit/2419ce83fce2300e61b5e6df256caddaa07a2ae0
Author: Leif Lindholm <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
A include/hw/arm/bsa.h
M include/hw/arm/virt.h
Log Message:
-----------
include/hw/arm: move BSA definitions to bsa.h
virt.h defines a number of IRQs that are ultimately described by Arm's
Base System Architecture specification. Move these to a dedicated header
so that they can be reused by other platforms that do the same.
Include that header from virt.h to minimise churn.
While we're moving the definitions, sort them into numerical order,
and add the ARCH_TIMER_NS_EL2_VIRT_IRQ definition used by sbsa-ref
and which will eventually be needed by virt also.
Signed-off-by: Leif Lindholm <[email protected]>
Message-id: [email protected]
[PMM: Remove unused PPI_TO_INTID macro; sort numerically;
add ARCH_TIMER_NS_EL2_VIRT_IRQ]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: d40ab068c07d924af5001ba4670651696ec9664e
https://github.com/qemu/qemu/commit/d40ab068c07d924af5001ba4670651696ec9664e
Author: Leif Lindholm <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/sbsa-ref.c
Log Message:
-----------
hw/arm/sbsa-ref: use bsa.h for PPI definitions
Use the private peripheral interrupt definitions from bsa.h instead of
defining them locally. Refactor to use the INTIDs defined there instead
of the PPI# used previously.
Signed-off-by: Leif Lindholm <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 6c8b9a74bf76f4fc98246671de9acfdfa2c227c4
https://github.com/qemu/qemu/commit/6c8b9a74bf76f4fc98246671de9acfdfa2c227c4
Author: Cornelia Huck <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M target/arm/kvm.c
M target/arm/kvm64.c
Log Message:
-----------
arm/kvm: convert to kvm_set_one_reg
We can neaten the code by switching to the kvm_set_one_reg function.
Reviewed-by: Gavin Shan <[email protected]>
Signed-off-by: Cornelia Huck <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 40d45b85e045501a3d3d3301f8554ff30adef3ee
https://github.com/qemu/qemu/commit/40d45b85e045501a3d3d3301f8554ff30adef3ee
Author: Cornelia Huck <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M target/arm/kvm.c
M target/arm/kvm64.c
Log Message:
-----------
arm/kvm: convert to kvm_get_one_reg
We can neaten the code by switching the callers that work on a
CPUstate to the kvm_get_one_reg function.
Reviewed-by: Gavin Shan <[email protected]>
Signed-off-by: Cornelia Huck <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: a530e470ea4f70d1207ef62273e43a7d178f53ac
https://github.com/qemu/qemu/commit/a530e470ea4f70d1207ef62273e43a7d178f53ac
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M target/arm/tcg/translate.c
Log Message:
-----------
target/arm: Permit T32 LDM with single register
For the Thumb T32 encoding of LDM, if only a single register is
specified in the register list this instruction is UNPREDICTABLE,
with the following choices:
* instruction UNDEFs
* instruction is a NOP
* instruction loads a single register
* instruction loads an unspecified set of registers
Currently we choose to UNDEF (a behaviour chosen in commit
4b222545dbf30 in 2019; previously we treated it as "load the
specified single register").
Unfortunately there is real world code out there (which shipped in at
least Android 11, 12 and 13) which incorrectly uses this
UNPREDICTABLE insn on the assumption that it does a single register
load, which is (presumably) what it happens to do on real hardware,
and is also what it does on the equivalent A32 encoding.
Revert to the pre-4b222545dbf30 behaviour of not UNDEFing
for this T32 encoding.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1799
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: cbaf9404f031a39342dee4d3183488a763f149e4
https://github.com/qemu/qemu/commit/cbaf9404f031a39342dee4d3183488a763f149e4
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/smmuv3-internal.h
Log Message:
-----------
hw/arm/smmuv3: Update ID register bit field definitions
Update the SMMUv3 ID register bit field definitions to the
set in the most recent specification (IHI0700 F.a).
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Mostafa Saleh <[email protected]>
Reviewed-by: Eric Auger <[email protected]>
Message-id: [email protected]
Commit: 27fd85d35b7bb05a7b939bf36de33b6aa68005f6
https://github.com/qemu/qemu/commit/27fd85d35b7bb05a7b939bf36de33b6aa68005f6
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/smmuv3.c
Log Message:
-----------
hw/arm/smmuv3: Sort ID register setting into field order
In smmuv3_init_regs() when we set the various bits in the ID
registers, we do this almost in order of the fields in the
registers, but not quite. Move the initialization of
SMMU_IDR3.RIL and SMMU_IDR5.OAS into their correct places.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Mostafa Saleh <[email protected]>
Reviewed-by: Eric Auger <[email protected]>
Message-id: [email protected]
Commit: 4cdd146d8bb72117b10ff22afe3a730dc4df4913
https://github.com/qemu/qemu/commit/4cdd146d8bb72117b10ff22afe3a730dc4df4913
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/smmuv3.c
Log Message:
-----------
hw/arm/smmuv3: Advertise SMMUv3.1-XNX feature
The SMMUv3.1-XNX feature is mandatory for an SMMUv3.1 if S2P is
supported, so we should theoretically have implemented it as part of
the recent S2P work. Fortunately, for us the implementation is a
no-op.
This feature is about interpretation of the stage 2 page table
descriptor XN bits, which control execute permissions.
For QEMU, the permission bits passed to an IOMMU (via MemTxAttrs and
IOMMUAccessFlags) only indicate read and write; we do not distinguish
data reads from instruction reads outside the CPU proper. In the
SMMU architecture's terms, our interconnect between the client device
and the SMMU doesn't have the ability to convey the INST attribute,
and we therefore use the default value of "data" for this attribute.
We also do not support the bits in the Stream Table Entry that can
override the on-the-bus transaction attribute permissions (we do not
set SMMU_IDR1.ATTR_PERMS_OVR=1).
These two things together mean that for our implementation, it never
has to deal with transactions with the INST attribute, and so it can
correctly ignore the XN bits entirely. So we already implement
FEAT_XNX's "XN field is now 2 bits, not 1" behaviour to the extent
that we need to.
Advertise the presence of the feature in SMMU_IDR3.XNX.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Mostafa Saleh <[email protected]>
Reviewed-by: Eric Auger <[email protected]>
Message-id: [email protected]
Commit: 3d80bbf1f619ad1a0db85bb385ce4f5f74e4b0a3
https://github.com/qemu/qemu/commit/3d80bbf1f619ad1a0db85bb385ce4f5f74e4b0a3
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M docs/system/arm/emulation.rst
M target/arm/helper.c
M target/arm/tcg/cpu32.c
M target/arm/tcg/cpu64.c
Log Message:
-----------
target/arm: Implement FEAT_HPMN0
FEAT_HPMN0 is a small feature which defines that it is valid for
MDCR_EL2.HPMN to be set to 0, meaning "no PMU event counters provided
to an EL1 guest" (previously this setting was reserved). QEMU's
implementation almost gets HPMN == 0 right, but we need to fix
one check in pmevcntr_is_64_bit(). That is enough for us to
advertise the feature in the 'max' CPU.
(We don't need to make the behaviour conditional on feature
presence, because the FEAT_HPMN0 behaviour is within the range
of permitted UNPREDICTABLE behaviour for a non-FEAT_HPMN0
implementation.)
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: 4fd79a96ea9149a7ea8fba5c0ea74ff5f9f02139
https://github.com/qemu/qemu/commit/4fd79a96ea9149a7ea8fba5c0ea74ff5f9f02139
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M target/arm/kvm64.c
Log Message:
-----------
target/arm/kvm64.c: Remove unused include
The include of hw/arm/virt.h in kvm64.c is unnecessary and also a
layering violation since the generic KVM code shouldn't need to know
anything about board-specifics. The include line is an accidental
leftover from commit 15613357ba53a4763, where we cleaned up the code
to not depend on virt board internals but forgot to also remove the
now-redundant include line.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Gavin Shan <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: 30722e0445908d3cf2d366d7bee69d0ae57401be
https://github.com/qemu/qemu/commit/30722e0445908d3cf2d366d7bee69d0ae57401be
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M target/arm/common-semi-target.h
Log Message:
-----------
target/arm/common-semi-target.h: Remove unnecessary boot.h include
The hw/arm/boot.h include in common-semi-target.h is not actually
needed, and it's a bit odd because it pulls a hw/arm header into a
target/arm file.
This include was originally needed because the semihosting code used
the arm_boot_info struct to get the base address of the RAM in system
emulation, to use in a (bad) heuristic for the return values for the
SYS_HEAPINFO semihosting call. We've since overhauled how we
calculate the HEAPINFO values in system emulation, and the code no
longer uses the arm_boot_info struct.
Remove the now-redundant include line, and instead directly include
the cpu-qom.h header that we were previously getting via boot.h.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: 3a45f4f5376cad9489e1608f2e4960fd34805546
https://github.com/qemu/qemu/commit/3a45f4f5376cad9489e1608f2e4960fd34805546
Author: Peter Maydell <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/boot.c
M target/arm/arm-powerctl.c
M target/arm/cpu.c
M target/arm/cpu.h
Log Message:
-----------
target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL
The code for powering on a CPU in arm-powerctl.c has two separate
use cases:
* emulation of a real hardware power controller
* emulation of firmware interfaces (primarily PSCI) with
CPU on/off APIs
For the first case, we only need to reset the CPU and set its
starting PC and X0. For the second case, because we're emulating the
firmware we need to ensure that it's in the state that the firmware
provides. In particular, when we reset to a lower EL than the
highest one we are emulating, we need to put the CPU into a state
that permits correct running at that lower EL. We already do a
little of this in arm-powerctl.c (for instance we set SCR_HCE to
enable the HVC insn) but we don't do enough of it. This means that
in the case where we are emulating EL3 but also providing emulated
PSCI the guest will crash when a secondary core tries to use a
feature that needs an SCR_EL3 bit to be set, such as MTE or PAuth.
The hw/arm/boot.c code also has to support this "start guest code in
an EL that's lower than the highest emulated EL" case in order to do
direct guest kernel booting; it has all the necessary initialization
code to set the SCR_EL3 bits. Pull the relevant boot.c code out into
a separate function so we can share it between there and
arm-powerctl.c.
This refactoring has a few code changes that look like they
might be behaviour changes but aren't:
* if info->secure_boot is false and info->secure_board_setup is
true, then the old code would start the first CPU in Hyp
mode but without changing SCR.NS and NSACR.{CP11,CP10}.
This was wrong behaviour because there's no such thing
as Secure Hyp mode. The new code will leave the CPU in SVC.
(There is no board which sets secure_boot to false and
secure_board_setup to true, so this isn't a behaviour
change for any of our boards.)
* we don't explicitly clear SCR.NS when arm-powerctl.c
does a CPU-on to EL3. This was a no-op because CPU reset
will reset to NS == 0.
And some real behaviour changes:
* we no longer set HCR_EL2.RW when booting into EL2: the guest
can and should do that themselves before dropping into their
EL1 code. (arm-powerctl and boot did this differently; I
opted to use the logic from arm-powerctl, which only sets
HCR_EL2.RW when it's directly starting the guest in EL1,
because it's more correct, and I don't expect guests to be
accidentally depending on our having set the RW bit for them.)
* if we are booting a CPU into AArch32 Secure SVC then we won't
set SCR.HCE any more. This affects only the vexpress-a15 and
raspi2b machine types. Guests booting in this case will either:
- be able to set SCR.HCE themselves as part of moving from
Secure SVC into NS Hyp mode
- will move from Secure SVC to NS SVC, and won't care about
behaviour of the HVC insn
- will stay in Secure SVC, and won't care about HVC
* on an arm-powerctl CPU-on we will now set the SCR bits for
pauth/mte/sve/sme/hcx/fgt features
The first two of these are very minor and I don't expect guest
code to trip over them, so I didn't judge it worth convoluting
the code in an attempt to keep exactly the same boot.c behaviour.
The third change fixes issue 1899.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1899
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: 9ef2629712680e70cbf39d8b6cb1ec0e0e2e72fa
https://github.com/qemu/qemu/commit/9ef2629712680e70cbf39d8b6cb1ec0e0e2e72fa
Author: Chris Rauer <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/timer/npcm7xx_timer.c
Log Message:
-----------
hw/timer/npcm7xx_timer: Prevent timer from counting down past zero
The counter register is only 24-bits and counts down. If the timer is
running but the qtimer to reset it hasn't fired off yet, there is a chance
the regster read can return an invalid result.
Signed-off-by: Chris Rauer <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 2a052b4ee01b3c413cef2ef49cb780cde17d4ba1
https://github.com/qemu/qemu/commit/2a052b4ee01b3c413cef2ef49cb780cde17d4ba1
Author: Suraj Shirvankar <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M contrib/elf2dmp/addrspace.c
M contrib/elf2dmp/main.c
M contrib/elf2dmp/pdb.c
M contrib/elf2dmp/qemu_elf.c
Log Message:
-----------
contrib/elf2dmp: Use g_malloc(), g_new() and g_free()
QEMU coding style uses the glib memory allocation APIs, not
the raw libc malloc/free. Switch the allocation and free
calls in elf2dmp to use these functions (dropping the now-unneeded
checks for failure).
Signed-off-by: Suraj Shirvankar <[email protected]>
Message-id: [email protected]
[PMM: also remove NULL checks from g_malloc() calls;
beef up commit message]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: deb1ef950bace69c204a9e9de3893fcff0e37fee
https://github.com/qemu/qemu/commit/deb1ef950bace69c204a9e9de3893fcff0e37fee
Author: Luc Michel <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M .mailmap
Log Message:
-----------
mailmap: update email addresses for Luc Michel
Map my old and now invalid work email addresses to my personal one.
Signed-off-by: Luc Michel <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 28900f9b2c23870915f8a5df90ae23af6a663965
https://github.com/qemu/qemu/commit/28900f9b2c23870915f8a5df90ae23af6a663965
Author: BALATON Zoltan <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Split vt82c686 out of fuloong2e
The VIA south bridges are now mostly used by other machines not just
fuloong2e so split off into a separate section and take maintainership.
Signed-off-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 8db0760354eb0bab5005dd0d9115cc6650033326
https://github.com/qemu/qemu/commit/8db0760354eb0bab5005dd0d9115cc6650033326
Author: Thomas Huth <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add hw/input/lasips2.c to the HPPA machine section
hw/input/lasips2.c and the corresponding header include/hw/input/lasips2.h
are only used by the HPPA machine, so add them to the corresponding section
in the MAINTAINERS file.
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: b5b47424b4676cbbc6c1bd8dbe8409c4c0124a8e
https://github.com/qemu/qemu/commit/b5b47424b4676cbbc6c1bd8dbe8409c4c0124a8e
Author: Thomas Huth <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add include/hw/intc/loongson_liointc.h to the Loongson-3 virt
section
The corresponding .c file is already listed here, so we should
mention the header here, too.
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Acked-by: Song Gao <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: e257b8ca49388a0ad1728b4dfcd04803d694db77
https://github.com/qemu/qemu/commit/e257b8ca49388a0ad1728b4dfcd04803d694db77
Author: Thomas Huth <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add include/hw/openrisc/ to the OpenRISC section
hw/openrisc/ is already listed here, so we should mention
the folder for the headers here, too.
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: dfd3bb0a99ae9627b4cc9b310ecef1b214188f71
https://github.com/qemu/qemu/commit/dfd3bb0a99ae9627b4cc9b310ecef1b214188f71
Author: Akihiko Odaki <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M util/cutils.c
Log Message:
-----------
cutils: Fix get_relocated_path on Windows
get_relocated_path() did not have error handling for PathCchSkipRoot()
because a path given to get_relocated_path() was expected to be a valid
path containing a drive letter or UNC server/share path elements on
Windows, but sometimes it turned out otherwise.
The paths passed to get_relocated_path() are defined by macros generated
by Meson. Meson in turn uses a prefix given by the configure script to
generate them. For Windows, the script passes /qemu as a prefix to
Meson by default.
As documented in docs/about/build-platforms.rst, typically MSYS2 is used
for the build system, but it is also possible to use Linux as well. When
MSYS2 is used, its Bash variant recognizes /qemu as a MSYS2 path, and
converts it to a Windows path, adding the MSYS2 prefix including a drive
letter or UNC server/share path elements. Such a conversion does not
happen on a shell on Linux however, and /qemu will be passed as is in
the case.
Implement a proper error handling of PathCchSkipRoot() in
get_relocated_path() so that it can handle a path without a drive letter
or UNC server/share path elements.
Reported-by: Stefan Weil <[email protected]>
Signed-off-by: Akihiko Odaki <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: da6f5544ce0ba351ffaeeac1c0c900d808774ad5
https://github.com/qemu/qemu/commit/da6f5544ce0ba351ffaeeac1c0c900d808774ad5
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M meson.build
Log Message:
-----------
buildsys: Only display Objective-C information when Objective-C is used
When configuring with '--disable-cocoa --disable-coreaudio'
on Darwin, we get:
meson.build:4081:58: ERROR: Tried to access compiler for language "objc", not
specified for host machine.
meson.build:4097:47: ERROR: Tried to access unknown option 'objc_args'.
Instead of unconditionally display Objective-C informations
on Darwin, display them when Objective-C is discovered.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Message-Id: <[email protected]>
Commit: 47538e44d6e7a3aa04873d84cf620345fd29a366
https://github.com/qemu/qemu/commit/47538e44d6e7a3aa04873d84cf620345fd29a366
Author: Marc-André Lureau <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M system/memory_mapping.c
Log Message:
-----------
memory: drop needless argument
The argument is unused since commit bdc44640c ("cpu: Use QTAILQ for CPU list").
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: David Hildenbrand <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 8a5b974b981725019c31faa156c36d8141517e15
https://github.com/qemu/qemu/commit/8a5b974b981725019c31faa156c36d8141517e15
Author: Marc-André Lureau <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/core/cpu-sysemu.c
M include/hw/core/cpu.h
M include/hw/core/sysemu-cpu-ops.h
M include/sysemu/memory_mapping.h
M system/memory_mapping.c
M target/i386/arch_memory_mapping.c
M target/i386/cpu.h
Log Message:
-----------
memory: follow Error API guidelines
Return true/false on success/failure.
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: David Hildenbrand <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 946df4d500888c8ddad580b28fa72b138f106823
https://github.com/qemu/qemu/commit/946df4d500888c8ddad580b28fa72b138f106823
Author: Lu Gao <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/sd/sdhci.c
Log Message:
-----------
hw/sd/sdhci: Block Size Register bits [14:12] is lost
Block Size Register bits [14:12] is SDMA Buffer Boundary, it is missed
in register write, but it is needed in SDMA transfer. e.g. it will be
used in sdhci_sdma_transfer_multi_blocks to calculate boundary_ variables.
Missing this field will cause wrong operation for different SDMA Buffer
Boundary settings.
Fixes: d7dfca0807 ("hw/sdhci: introduce standard SD host controller")
Fixes: dfba99f17f ("hw/sdhci: Fix DMA Transfer Block Size field")
Signed-off-by: Lu Gao <[email protected]>
Signed-off-by: Jianxian Wen <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 9ce8c6ddd302d23df503e89e03544c5e832b4dc3
https://github.com/qemu/qemu/commit/9ce8c6ddd302d23df503e89e03544c5e832b4dc3
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/mips/malta.c
Log Message:
-----------
hw/mips/malta: Use sdram_type enum from 'hw/i2c/smbus_eeprom.h'
Since commit 93198b6cad ("i2c: Split smbus into parts") the SDRAM
types are enumerated as sdram_type in "hw/i2c/smbus_eeprom.h".
Using the enum removes this global shadow warning:
hw/mips/malta.c:209:12: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
enum { SDR = 0x4, DDR2 = 0x8 } type;
^
include/hw/i2c/smbus_eeprom.h:33:19: note: previous declaration is here
enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 };
^
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 30a8d3a14216e31f2539b00ff4e5df7f3a08ce89
https://github.com/qemu/qemu/commit/30a8d3a14216e31f2539b00ff4e5df7f3a08ce89
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/mips/cps.c
M hw/mips/fuloong2e.c
M hw/mips/jazz.c
M hw/mips/loongson3_virt.c
M hw/mips/malta.c
M hw/mips/mips_int.c
M hw/mips/mipssim.c
R include/hw/mips/cpudevs.h
M target/mips/cpu.h
M target/mips/sysemu/cp0_timer.c
M target/mips/tcg/sysemu/tlb_helper.c
Log Message:
-----------
hw/mips: Merge 'hw/mips/cpudevs.h' with 'target/mips/cpu.h'
"hw/mips/cpudevs.h" contains declarations which are specific
to the MIPS architecture; it doesn't make sense for these to
be called from a non-MIPS architecture. Move the declarations
to "target/mips/cpu.h".
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: db646e830e58f611a112210972332711f9c28af9
https://github.com/qemu/qemu/commit/db646e830e58f611a112210972332711f9c28af9
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M include/hw/misc/mips_itu.h
M target/mips/cpu.h
M target/mips/tcg/sysemu/cp0_helper.c
Log Message:
-----------
hw/misc/mips_itu: Declare itc_reconfigure() in 'hw/misc/mips_itu.h'
We already provide "hw/misc/mips_itu.h" to declare prototype
related to MIPSITUState. Move itc_reconfigure() declaration
there.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 53af33a5b4e799d92e6687984349a098c3d37732
https://github.com/qemu/qemu/commit/53af33a5b4e799d92e6687984349a098c3d37732
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/misc/mips_itu.c
M include/hw/misc/mips_itu.h
Log Message:
-----------
hw/misc/mips_itu: Make MIPSITUState target agnostic
When prototyping a heterogenous machine including the ITU,
we get:
include/hw/misc/mips_itu.h:76:5: error: unknown type name 'MIPSCPU'
MIPSCPU *cpu0;
^
MIPSCPU is declared in the target specific "cpu.h" header,
but we don't want to include it, because "cpu.h" is target
specific and its inclusion taints all files including
"mips_itu.h", which become target specific too. We can
however use the 'ArchCPU *' type in the public header.
By keeping the TYPE_MIPS_CPU QOM type check in the link
property declaration, QOM core code will still check the
property is a correct MIPS CPU.
TYPE_MIPS_ITU is still built per-(MIPS)target, but its header
can now be included by other targets.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: bf9e5c1f22f6b4995672b72dd96bb363317fe574
https://github.com/qemu/qemu/commit/bf9e5c1f22f6b4995672b72dd96bb363317fe574
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/pci-host/sh_pci.c
Log Message:
-----------
hw/pci-host/sh_pcic: Declare CPU QOM types using DEFINE_TYPES() macro
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Yoshinori Sato <[email protected]>
Message-Id: <[email protected]>
Commit: 6db7f62b34150162b76be5b9f54caa89af0f6c7d
https://github.com/qemu/qemu/commit/6db7f62b34150162b76be5b9f54caa89af0f6c7d
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/pci-host/sh_pci.c
Log Message:
-----------
hw/pci-host/sh_pcic: Correct PCI host / devfn#0 function names
Host bridge device and PCI function #0 are inverted.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Yoshinori Sato <[email protected]>
Message-Id: <[email protected]>
Commit: f158d3befe25bef38a2ff364318076466c47a114
https://github.com/qemu/qemu/commit/f158d3befe25bef38a2ff364318076466c47a114
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/pci-host/sh_pci.c
Log Message:
-----------
hw/pci-host/sh_pcic: Replace magic value by proper definition
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Yoshinori Sato <[email protected]>
Message-Id: <[email protected]>
Commit: 4aa07e864911b77dc7fb4704554bb041776b8ec7
https://github.com/qemu/qemu/commit/4aa07e864911b77dc7fb4704554bb041776b8ec7
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/sparc64/sun4u.c
Log Message:
-----------
hw/sparc64/ebus: Access memory regions via pci_address_space_io()
PCI functions are plugged on a PCI bus. They can only access
external memory regions via the bus.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: 305ab2b9716551e486cbdcff111610a2cf8da095
https://github.com/qemu/qemu/commit/305ab2b9716551e486cbdcff111610a2cf8da095
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/acpi/pcihp.c
M include/hw/acpi/pcihp.h
Log Message:
-----------
hw/acpi/pcihp: Clean up global variable shadowing in acpi_pcihp_init()
Fix:
hw/acpi/pcihp.c:499:36: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
include/exec/address-spaces.h:35:21: note: previous declaration is here
extern AddressSpace address_space_io;
^
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Ani Sinha <[email protected]>
Acked-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 49909a0d0336fa682049544f284bbeda6f02c4ac
https://github.com/qemu/qemu/commit/49909a0d0336fa682049544f284bbeda6f02c4ac
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/pci/pci.c
M include/hw/pci/pci.h
Log Message:
-----------
hw/pci: Clean up global variable shadowing of address_space_io variable
Fix:
hw/pci/pci.c:504:54: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
hw/pci/pci.c:533:38: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
hw/pci/pci.c:543:40: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
hw/pci/pci.c:590:45: error: declaration shadows a variable in the global
scope [-Werror,-Wshadow]
MemoryRegion *address_space_io,
^
include/exec/address-spaces.h:35:21: note: previous declaration is here
extern AddressSpace address_space_io;
^
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Acked-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: b2b5b09045e61798d5454f6b32721172d736c828
https://github.com/qemu/qemu/commit/b2b5b09045e61798d5454f6b32721172d736c828
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/s390x/sclpquiesce.c
Log Message:
-----------
hw/s390x: Clean up global variable shadowing in quiesce_powerdown_req()
Fix:
hw/s390x/sclpquiesce.c:90:22: error: declaration shadows a variable in the
global scope [-Werror,-Wshadow]
QuiesceNotifier *qn = container_of(n, QuiesceNotifier, notifier);
^
hw/s390x/sclpquiesce.c:86:3: note: previous declaration is here
} qn;
^
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: David Hildenbrand <[email protected]>
Message-Id: <[email protected]>
Commit: 0459c141f8d9dc99274ca3cffe632a37a0575c9e
https://github.com/qemu/qemu/commit/0459c141f8d9dc99274ca3cffe632a37a0575c9e
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/intc/apic_common.c
Log Message:
-----------
hw/intc/apic: Use ERRP_GUARD() in apic_common_realize()
APICCommonClass::realize() is a DeviceRealize() handler which
take an Error** parameter and can fail. Do not proceed further
on failure.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Peter Xu <[email protected]>
Message-Id: <[email protected]>
Commit: 880e26074c271e88235b453107fdfd40b0940f7f
https://github.com/qemu/qemu/commit/880e26074c271e88235b453107fdfd40b0940f7f
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/ppc/spapr_vio.c
Log Message:
-----------
hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing it
qbus_new() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 90ac3862ff59a31563f81915dcc709d1eec52cdb
https://github.com/qemu/qemu/commit/90ac3862ff59a31563f81915dcc709d1eec52cdb
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/ppc/pnv.c
M hw/ppc/pnv_xscom.c
M include/hw/ppc/pnv_xscom.h
Log Message:
-----------
hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init()
pnv_xscom_realize() is not used to *realize* QDev object, rename
it as pnv_xscom_init(). The Error** argument is unused: remove it.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Message-Id: <[email protected]>
Commit: 326f7acb81fd75eb7cb5aaa49139b1586a94c624
https://github.com/qemu/qemu/commit/326f7acb81fd75eb7cb5aaa49139b1586a94c624
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/ppc/pnv.c
M hw/ppc/pnv_xscom.c
M include/hw/ppc/pnv_xscom.h
Log Message:
-----------
hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init()
In order to make the next commit trivial, move sysbus_init_mmio()
calls just before the corresponding sysbus_mmio_map() calls.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Message-Id: <[email protected]>
Commit: bddb677544986abed53fe9a538d207dbef8aff88
https://github.com/qemu/qemu/commit/bddb677544986abed53fe9a538d207dbef8aff88
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/ppc/pnv_xscom.c
Log Message:
-----------
hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Message-Id: <[email protected]>
Commit: bf3b9754b7cd8ae493b186e8da2ab8d6d7145c77
https://github.com/qemu/qemu/commit/bf3b9754b7cd8ae493b186e8da2ab8d6d7145c77
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/ppc/pnv.c
Log Message:
-----------
hw/ppc/pnv: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Message-Id: <[email protected]>
Commit: e061eed80263a3de929871098f01bd28fb758dfb
https://github.com/qemu/qemu/commit/e061eed80263a3de929871098f01bd28fb758dfb
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/intc/spapr_xive.c
Log Message:
-----------
hw/intc/spapr_xive: Move sysbus_init_mmio() calls around
In order to make the next commit trivial, move sysbus_init_mmio()
calls just before the corresponding sysbus_mmio_map() calls.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Message-Id: <[email protected]>
Commit: 6c9dcd8760092e455f86f6afb05d87ea827da8f3
https://github.com/qemu/qemu/commit/6c9dcd8760092e455f86f6afb05d87ea827da8f3
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/intc/spapr_xive.c
Log Message:
-----------
hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Message-Id: <[email protected]>
Commit: 40f8214fcde40bab3ef6d1ab0b2353c7f8bc62aa
https://github.com/qemu/qemu/commit/40f8214fcde40bab3ef6d1ab0b2353c7f8bc62aa
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/i386/pc.c
M hw/isa/i82378.c
M hw/mips/jazz.c
M include/hw/audio/pcspk.h
Log Message:
-----------
hw/audio/pcspk: Inline pcspk_init()
pcspk_init() is a legacy init function, inline and remove it.
Since the device is realized using &error_fatal, use the same
error for setting the "pit" link.
Reviewed-by: Mark Cave-Ayland <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <[email protected]>
Commit: 544f07f6394ab940021f3b512d8bb1b34380dcd6
https://github.com/qemu/qemu/commit/544f07f6394ab940021f3b512d8bb1b34380dcd6
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: a540087f608f1996e3581ddb39456be23db577a8
https://github.com/qemu/qemu/commit/a540087f608f1996e3581ddb39456be23db577a8
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/i386/intel_iommu.c
Log Message:
-----------
hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: d71af7c83eb4a6adbaf3ce0afba1d3dfbf4a6e2c
https://github.com/qemu/qemu/commit/d71af7c83eb4a6adbaf3ce0afba1d3dfbf4a6e2c
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/misc/allwinner-r40-dramc.c
Log Message:
-----------
hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize
In order to make the next commit trivial, move the sysbus_init_mmio()
call in allwinner_r40_dramc_init() just before the corresponding
sysbus_mmio_map_overlap() call in allwinner_r40_dramc_realize().
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: faef398291598e39a4484947d44bb177b4596120
https://github.com/qemu/qemu/commit/faef398291598e39a4484947d44bb177b4596120
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/misc/allwinner-r40-dramc.c
Log Message:
-----------
hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(),
+ addr, subregion);
@@
expression priority;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map_overlap(sbdev, index, addr, priority);
+ memory_region_add_subregion_overlap(get_system_memory(),
+ addr,
+ subregion, priority);
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 0493aafb1abbe6256522c32b5686418b5b192e7e
https://github.com/qemu/qemu/commit/0493aafb1abbe6256522c32b5686418b5b192e7e
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/pci-host/bonito.c
Log Message:
-----------
hw/pci-host/bonito: Do not use SysBus API to map local MMIO region
There is no point in exposing an internal MMIO region via
SysBus and directly mapping it in the very same device.
Just map it without using the SysBus API.
Transformation done using the following coccinelle script:
@@
expression sbdev;
expression index;
expression addr;
expression subregion;
@@
- sysbus_init_mmio(sbdev, subregion);
... when != sbdev
- sysbus_mmio_map(sbdev, index, addr);
+ memory_region_add_subregion(get_system_memory(), addr, subregion);
and manually adding the local 'host_mem' variable to
avoid multiple calls to get_system_memory().
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <[email protected]>
Commit: bec4be77ea18feb9d50a6c2ee42b6c3ffe4ae78b
https://github.com/qemu/qemu/commit/bec4be77ea18feb9d50a6c2ee42b6c3ffe4ae78b
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/virt.c
M hw/i386/microvm.c
M hw/loongarch/virt.c
Log Message:
-----------
hw/acpi: Realize ACPI_GED sysbus device before accessing it
sysbus_mmio_map() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 8a89bb060765e26e0f0d55a495caf3c0fd8615ba
https://github.com/qemu/qemu/commit/8a89bb060765e26e0f0d55a495caf3c0fd8615ba
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/arm/virt.c
Log Message:
-----------
hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it
sysbus_mmio_map() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 675d717b9ee2d8dea9cfdca9aa69ed97d8bc54d3
https://github.com/qemu/qemu/commit/675d717b9ee2d8dea9cfdca9aa69ed97d8bc54d3
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/isa/isa-bus.c
Log Message:
-----------
hw/isa: Realize ISA bridge device before accessing it
qbus_new() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 840b4495ef5c2d90d75f3f0d00d9018146f27d8e
https://github.com/qemu/qemu/commit/840b4495ef5c2d90d75f3f0d00d9018146f27d8e
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/s390x/css-bridge.c
Log Message:
-----------
hw/s390x/css-bridge: Realize sysbus device before accessing it
qbus_new() should not be called on unrealized device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 5960f254dbb46f0c7a9f5f44bf4d27c19c34cb97
https://github.com/qemu/qemu/commit/5960f254dbb46f0c7a9f5f44bf4d27c19c34cb97
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/virtio/virtio-pmem.c
Log Message:
-----------
hw/virtio/virtio-pmem: Replace impossible check by assertion
The get_memory_region() handler is used when (un)plugging the
device, which can only occur *after* it is realized.
virtio_pmem_realize() ensure the instance can not be realized
without 'memdev'. Remove the superfluous check, replacing it
by an assertion.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Message-Id: <[email protected]>
Commit: 11591b586620ae62155d6bc36650283e7c05efa9
https://github.com/qemu/qemu/commit/11591b586620ae62155d6bc36650283e7c05efa9
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/block/vhost-user-blk.c
Log Message:
-----------
hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros
Access QOM parent with the proper QOM [VIRTIO_]DEVICE() macros.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: 3daccfff75dd536117abde15169bede707646977
https://github.com/qemu/qemu/commit/3daccfff75dd536117abde15169bede707646977
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/display/virtio-gpu.c
Log Message:
-----------
hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro
Access QOM parent with the proper QOM VIRTIO_DEVICE() macro.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: 7794fc9799afb32436d9927900a63f7f73d2ebce
https://github.com/qemu/qemu/commit/7794fc9799afb32436d9927900a63f7f73d2ebce
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/scsi/virtio-scsi.c
Log Message:
-----------
hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro
Access QOM parent with the proper QOM VIRTIO_SCSI_COMMON() macro.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: 1f9d714e9a92d382f5f7c054de647d3dde4ba803
https://github.com/qemu/qemu/commit/1f9d714e9a92d382f5f7c054de647d3dde4ba803
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/dma/xilinx_axidma.c
M hw/dma/xlnx-zdma.c
M hw/dma/xlnx_csu_dma.c
Log Message:
-----------
hw/dma: Declare link using static DEFINE_PROP_LINK() macro
Declare link statically using DEFINE_PROP_LINK().
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: 08d45942972ada0e4d051799fb8ba1b47225a6b3
https://github.com/qemu/qemu/commit/08d45942972ada0e4d051799fb8ba1b47225a6b3
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M hw/net/cadence_gem.c
Log Message:
-----------
hw/net: Declare link using static DEFINE_PROP_LINK() macro
Declare link statically using DEFINE_PROP_LINK().
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: b1be65f6436f53618408d9c6fc6959054f5afed6
https://github.com/qemu/qemu/commit/b1be65f6436f53618408d9c6fc6959054f5afed6
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2023-10-19 (Thu, 19 Oct 2023)
Changed paths:
M chardev/msmouse.c
M chardev/wctablet.c
M hw/char/escc.c
M hw/display/xenfb.c
M hw/input/adb-kbd.c
M hw/input/hid.c
M hw/input/ps2.c
M hw/input/virtio-input-hid.c
M include/hw/virtio/virtio-input.h
M include/ui/input.h
M ui/input-legacy.c
M ui/input.c
M ui/vdagent.c
Log Message:
-----------
ui/input: Constify QemuInputHandler structure
Access to QemuInputHandlerState::handler are read-only.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Marc-André Lureau <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Message-Id: <[email protected]>
Commit: e029bb00a79bea226477749f9b10a2ff9e7930ef
https://github.com/qemu/qemu/commit/e029bb00a79bea226477749f9b10a2ff9e7930ef
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
A hw/pci-host/astro.c
M hw/pci-host/trace-events
A include/hw/pci-host/astro.h
Log Message:
-----------
hw/pci-host: Add Astro system bus adapter found on PA-RISC machines
The 64-bit PA-RISC machines use a Astro system bus adapter (SBA)
with Elroy PCI host chips.
Later generation Astro chips were named Pluto, Ike and REO.
Signed-off-by: Helge Deller <[email protected]>
Commit: 1a960c8915ff3d8827d09a4afacf15b1f12c5e04
https://github.com/qemu/qemu/commit/1a960c8915ff3d8827d09a4afacf15b1f12c5e04
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/hppa/Kconfig
M hw/pci-host/Kconfig
M hw/pci-host/meson.build
Log Message:
-----------
pci-host: Wire up new Astro/Elroy PCI bridge
Allow the Astro source to be built.
Signed-off-by: Helge Deller <[email protected]>
Commit: ae759c96c3174ccbc1438b2b9ee265bee6a167a5
https://github.com/qemu/qemu/commit/ae759c96c3174ccbc1438b2b9ee265bee6a167a5
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Update HP-PARISC entries
Add the new HP C3700 machine, the new Astro PCI host and
add the missing entry for the seabios-hppa directory.
Signed-off-by: Helge Deller <[email protected]>
Commit: bcd4dd4c22f2df17def72668c75cdf01fb47b6ff
https://github.com/qemu/qemu/commit/bcd4dd4c22f2df17def72668c75cdf01fb47b6ff
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/hppa/machine.c
Log Message:
-----------
hw/hppa: Export machine name, BTLBs, power-button address via fw_cfg
Provide necessary info to SeaBIOS-hppa.
Signed-off-by: Helge Deller <[email protected]>
Commit: e2c41ee557f4389d577ad54b1c131d2e0b558558
https://github.com/qemu/qemu/commit/e2c41ee557f4389d577ad54b1c131d2e0b558558
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/hppa/hppa_hardware.h
M hw/hppa/machine.c
Log Message:
-----------
hw/hppa: Provide RTC and DebugOutputPort on CPU #0
For SeaBIOS-hppa, the RTC and DebugOutputPort were in the I/O area of
the LASI chip of the emulated B160L machine.
Since we will add other machines without a LASI chip, move the emulated
devices into the I/O area of CPU#0 instead.
Signed-off-by: Helge Deller <[email protected]>
Commit: 7df6f7511769af63c209d2fdcd6c7638f680e35a
https://github.com/qemu/qemu/commit/7df6f7511769af63c209d2fdcd6c7638f680e35a
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/hppa/machine.c
Log Message:
-----------
hw/hppa: Split out machine creation
This is a preparation patch to allow the creation of additional
hppa machine.
It splits out the creation of the machine into a
- machine_HP_common_init_cpus(), and a
- machine_HP_common_init_tail()
function.
This will allow to reuse the basic functions which are common to
all parisc machines.
Signed-off-by: Helge Deller <[email protected]>
Commit: 2ed4faa03fa92e3ab9160c09f3eb866fbdd60ecc
https://github.com/qemu/qemu/commit/2ed4faa03fa92e3ab9160c09f3eb866fbdd60ecc
Author: Helge Deller <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/hppa/machine.c
Log Message:
-----------
hw/hppa: Add new HP C3700 machine
Add code to create an emulated C3700 machine.
It includes the following components:
- HP Powerbar SP2 Diva BMC card (serial port only)
- PCI 4x serial card (for serial ports #1-#4)
- USB OHCI controller with USB keyboard and USB mouse
Signed-off-by: Helge Deller <[email protected]>
Commit: 3da4aef81ca61c82c67b86af369ccd251607622e
https://github.com/qemu/qemu/commit/3da4aef81ca61c82c67b86af369ccd251607622e
Author: Nina Schoetterl-Glausch <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M qapi/machine.json
Log Message:
-----------
qapi: machine.json: change docs regarding CPU topology
Clarify roles of different architectures.
Also change things a bit in anticipation of additional members being
added.
Suggested-by: Markus Armbruster <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
[thuth: Updated some comments according to suggestions from Markus]
Signed-off-by: Thomas Huth <[email protected]>
Commit: 5de1aff2555275ef182197eddcadb276364ace38
https://github.com/qemu/qemu/commit/5de1aff2555275ef182197eddcadb276364ace38
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/core/machine-smp.c
M hw/core/machine.c
M hw/core/qdev-properties-system.c
M hw/s390x/s390-virtio-ccw.c
M include/hw/boards.h
M include/hw/qdev-properties-system.h
A qapi/machine-common.json
M qapi/machine.json
M qapi/meson.build
M qapi/qapi-schema.json
M qemu-options.hx
M system/vl.c
M target/s390x/cpu.c
M target/s390x/cpu.h
Log Message:
-----------
CPU topology: extend with s390 specifics
S390 adds two new SMP levels, drawers and books to the CPU
topology.
S390 CPUs have specific topology features like dedication and
entitlement. These indicate to the guest information on host
vCPU scheduling and help the guest make better scheduling decisions.
Add the new levels to the relevant QAPI structs.
Add all the supported topology levels, dedication and entitlement
as properties to S390 CPUs.
Create machine-common.json so we can later include it in
machine-target.json also.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: c809bbc8e98cf7fa254fac91084ade0a22877dec
https://github.com/qemu/qemu/commit/c809bbc8e98cf7fa254fac91084ade0a22877dec
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
A hw/s390x/cpu-topology.c
M hw/s390x/meson.build
M hw/s390x/s390-virtio-ccw.c
A include/hw/s390x/cpu-topology.h
Log Message:
-----------
s390x/cpu topology: add topology entries on CPU hotplug
The topology information are attributes of the CPU and are
specified during the CPU device creation.
On hot plug we:
- calculate the default values for the topology for drawers,
books and sockets in the case they are not specified.
- verify the CPU attributes
- check that we have still room on the desired socket
The possibility to insert a CPU in a mask is dependent on the
number of cores allowed in a socket, a book or a drawer, the
checking is done during the hot plug of the CPU to have an
immediate answer.
If the complete topology is not specified, the core is added
in the physical topology based on its core ID and it gets
defaults values for the modifier attributes.
This way, starting QEMU without specifying the topology can
still get some advantage of the CPU topology.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: f4f54b582f4b78f4cfd5a6912e88aef4f11e3e3c
https://github.com/qemu/qemu/commit/f4f54b582f4b78f4cfd5a6912e88aef4f11e3e3c
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/s390x/cpu-topology.c
M include/hw/s390x/cpu-topology.h
M include/hw/s390x/sclp.h
M qapi/machine-target.json
M target/s390x/cpu.h
M target/s390x/kvm/kvm.c
M target/s390x/kvm/meson.build
A target/s390x/kvm/stsi-topology.c
Log Message:
-----------
target/s390x/cpu topology: handle STSI(15) and build the SYSIB
On interception of STSI(15.1.x) the System Information Block
(SYSIB) is built from the list of pre-ordered topology entries.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: a67f05b39106bf3477475297d8508bcb7d8eb0d8
https://github.com/qemu/qemu/commit/a67f05b39106bf3477475297d8508bcb7d8eb0d8
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/sclp.c
M include/hw/s390x/sclp.h
Log Message:
-----------
s390x/sclp: reporting the maximum nested topology entries
The maximum nested topology entries is used by the guest to
know how many nested topology are available on the machine.
Let change the MNEST value from 2 to 4 in the SCLP READ INFO
structure now that we support books and drawers.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 3d6e75f4df67980479cc0912b842202f2093aeeb
https://github.com/qemu/qemu/commit/3d6e75f4df67980479cc0912b842202f2093aeeb
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/cpu-topology.c
M hw/s390x/s390-virtio-ccw.c
M include/hw/s390x/cpu-topology.h
M target/s390x/cpu-sysemu.c
M target/s390x/cpu.h
M target/s390x/kvm/kvm.c
M target/s390x/kvm/kvm_s390x.h
Log Message:
-----------
s390x/cpu topology: resetting the Topology-Change-Report
During a subsystem reset the Topology-Change-Report is cleared
by the machine.
Let's ask KVM to clear the Modified Topology Change Report (MTCR)
bit of the SCA in the case of a subsystem reset.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: af37bad52e7c216c044f919d6254c77be0eacbc6
https://github.com/qemu/qemu/commit/af37bad52e7c216c044f919d6254c77be0eacbc6
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/cpu-topology.c
M include/hw/s390x/s390-virtio-ccw.h
M target/s390x/kvm/kvm.c
Log Message:
-----------
s390x/cpu topology: interception of PTF instruction
When the host supports the CPU topology facility, the PTF
instruction with function code 2 is interpreted by the SIE,
provided that the userland hypervisor activates the interpretation
by using the KVM_CAP_S390_CPU_TOPOLOGY KVM extension.
The PTF instructions with function code 0 and 1 are intercepted
and must be emulated by the userland hypervisor.
During RESET all CPU of the configuration are placed in
horizontal polarity.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: f530b9e7dad69511f79bbeb3e6683f854ebf703c
https://github.com/qemu/qemu/commit/f530b9e7dad69511f79bbeb3e6683f854ebf703c
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/cpu-topology.c
M target/s390x/cpu_models.c
M target/s390x/kvm/kvm.c
Log Message:
-----------
target/s390x/cpu topology: activate CPU topology
The KVM capability KVM_CAP_S390_CPU_TOPOLOGY is used to
activate the S390_FEAT_CONFIGURATION_TOPOLOGY feature and
the topology facility in the host CPU model for the guest
in the case the topology is available in QEMU and in KVM.
The feature is disabled by default and fenced for SE
(secure execution).
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: a457c2ab5af7d69fd96f0aef2d33800bdc082b8c
https://github.com/qemu/qemu/commit/a457c2ab5af7d69fd96f0aef2d33800bdc082b8c
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/cpu-topology.c
M qapi/machine-target.json
Log Message:
-----------
qapi/s390x/cpu topology: set-cpu-topology qmp command
The modification of the CPU attributes are done through a monitor
command.
It allows to move the core inside the topology tree to optimize
the cache usage in the case the host's hypervisor previously
moved the CPU.
The same command allows to modify the CPU attributes modifiers
like polarization entitlement and the dedicated attribute to notify
the guest if the host admin modified scheduling or dedication of a vCPU.
With this knowledge the guest has the possibility to optimize the
usage of the vCPUs.
The command has a feature unstable for the moment.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: ad2d1afc1d7158e1d94f6f7a3efe6efc15dca51c
https://github.com/qemu/qemu/commit/ad2d1afc1d7158e1d94f6f7a3efe6efc15dca51c
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M qapi/machine.json
M target/s390x/cpu.c
Log Message:
-----------
machine: adding s390 topology to query-cpu-fast
S390x provides two more topology attributes, entitlement and dedication.
Let's add these CPU attributes to the QAPI command query-cpu-fast.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: bb2df37a6286e24edd6bbad162bc3eef07c97c34
https://github.com/qemu/qemu/commit/bb2df37a6286e24edd6bbad162bc3eef07c97c34
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/core/machine-hmp-cmds.c
Log Message:
-----------
machine: adding s390 topology to info hotpluggable-cpus
S390 topology adds books and drawers topology containers.
Let's add these to the HMP information for hotpluggable cpus.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 1cfe52b7824067962357493475f0c36c7900f799
https://github.com/qemu/qemu/commit/1cfe52b7824067962357493475f0c36c7900f799
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/cpu-topology.c
M qapi/machine-target.json
Log Message:
-----------
qapi/s390x/cpu topology: CPU_POLARIZATION_CHANGE QAPI event
When the guest asks to change the polarization this change
is forwarded to the upper layer using QAPI.
The upper layer is supposed to take according decisions concerning
CPU provisioning.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 154893a784cb3f1349fce65ab6038e0bc462d218
https://github.com/qemu/qemu/commit/154893a784cb3f1349fce65ab6038e0bc462d218
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/s390x/cpu-topology.c
M qapi/machine-target.json
Log Message:
-----------
qapi/s390x/cpu topology: add query-s390x-cpu-polarization command
The query-s390x-cpu-polarization qmp command returns the current
CPU polarization of the machine.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 0d177cdd2ba402f7f0aee301e56037311c7a8781
https://github.com/qemu/qemu/commit/0d177cdd2ba402f7f0aee301e56037311c7a8781
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
M docs/devel/index-internals.rst
A docs/devel/s390-cpu-topology.rst
A docs/system/s390x/cpu-topology.rst
M docs/system/target-s390x.rst
M qapi/machine.json
Log Message:
-----------
docs/s390x/cpu topology: document s390x cpu topology
Add some basic examples for the definition of cpu topology
in s390x.
Signed-off-by: Pierre Morel <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: e5bc49d54d94fb680b0f200ae0529dda2c91c8db
https://github.com/qemu/qemu/commit/e5bc49d54d94fb680b0f200ae0529dda2c91c8db
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
A tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology core
Introduction of the s390x cpu topology core functions and
basic tests.
We test the correlation between the command line and
the QMP results in query-cpus-fast for various CPU topology.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Tested-by: Thomas Huth <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: cb042c73f37e820fe8fe5bdc71cb92836aea5955
https://github.com/qemu/qemu/commit/cb042c73f37e820fe8fe5bdc71cb92836aea5955
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology polarization
Polarization is changed on a request from the guest.
Let's verify the polarization is accordingly set by QEMU.
Signed-off-by: Pierre Morel <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 16ab722edb0c308e18364b70a84ef9f7dfd0a946
https://github.com/qemu/qemu/commit/16ab722edb0c308e18364b70a84ef9f7dfd0a946
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology entitlement tests
Test changes in the entitlement from both a guest and a host point of
view, depending on the polarization.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Tested-by: Thomas Huth <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 471676bfd2e182746b9bb0ff4e613908dc4c8842
https://github.com/qemu/qemu/commit/471676bfd2e182746b9bb0ff4e613908dc4c8842
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology test dedicated CPU
A dedicated CPU in vertical polarization can only have
a high entitlement.
Let's check this from both host and guest point of view.
Signed-off-by: Pierre Morel <[email protected]>
Co-developed-by: Nina Schoetterl-Glausch <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Nina Schoetterl-Glausch <[email protected]>
Signed-off-by: Nina Schoetterl-Glausch <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 944e03006d0fa17332d4cbf82e26d63c10d320d2
https://github.com/qemu/qemu/commit/944e03006d0fa17332d4cbf82e26d63c10d320d2
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology test socket full
This test verifies that QMP set-cpu-topology does not accept
to overload a socket.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 22ac7809bbd0dc338836ac9f0e5330c18e13e08c
https://github.com/qemu/qemu/commit/22ac7809bbd0dc338836ac9f0e5330c18e13e08c
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology dedicated errors
Let's test that QEMU refuses to setup a dedicated CPU with
low or medium entitlement.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 219922ef9b7af4b425c85a7c14c79c2f68f1a19b
https://github.com/qemu/qemu/commit/219922ef9b7af4b425c85a7c14c79c2f68f1a19b
Author: Pierre Morel <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/avocado/s390_topology.py
Log Message:
-----------
tests/avocado: s390x cpu topology bad move
This test verifies that QEMU refuses to move a CPU to an
nonexistent location.
Signed-off-by: Pierre Morel <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: c35a79cbd7dc2ff3435355177290b7b31b589993
https://github.com/qemu/qemu/commit/c35a79cbd7dc2ff3435355177290b7b31b589993
Author: Thomas Huth <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M target/s390x/kvm/kvm.c
Log Message:
-----------
target/s390x/kvm: Turn KVM_CAP_SYNC_REGS into a hard requirement
Since we already require at least kernel 3.15 in the s390x KVM code,
we can assume that the KVM_CAP_SYNC_REGS capability is always there.
Thus turn this into a hard requirement now.
Reviewed-by: Christian Borntraeger <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 1d1071665012e378510494e99466c042b3ac1be0
https://github.com/qemu/qemu/commit/1d1071665012e378510494e99466c042b3ac1be0
Author: Thomas Huth <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M target/s390x/kvm/kvm.c
Log Message:
-----------
target/s390x/kvm: Simplify the GPRs, ACRs, CRs and prefix synchronization code
KVM_SYNC_GPRS, KVM_SYNC_ACRS, KVM_SYNC_CRS and KVM_SYNC_PREFIX are
available since kernel 3.10. Since we already require at least kernel
3.15 in the s390x KVM code, we can also assume that the KVM_CAP_SYNC_REGS
sync code is always possible for these registers, and remove the
related checks and fallbacks via KVM_SET_REGS and KVM_GET_REGS.
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 18424d9591c73178bdfd6a4518091064db22e1d9
https://github.com/qemu/qemu/commit/18424d9591c73178bdfd6a4518091064db22e1d9
Author: Thomas Huth <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration-test: Disable the analyze-migration.py test on s390x
The analyze-migration.py script fails on s390x hosts:
Traceback (most recent call last):
File "scripts/analyze-migration.py", line 662, in <module>
dump.read(dump_memory = args.memory)
File "scripts/analyze-migration.py", line 596, in read
classdesc = self.section_classes[section_key]
KeyError: ('s390-storage_attributes', 0)
It obviously never has been adapted to s390x yet, so until this
has been done, disable this test on s390x.
Message-ID: <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 04131e00097c5b85f96af6a66b1c009446c90ec1
https://github.com/qemu/qemu/commit/04131e00097c5b85f96af6a66b1c009446c90ec1
Author: Thomas Huth <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration-test: Disable the analyze-migration.py test on s390x
The analyze-migration.py script fails on s390x hosts:
Traceback (most recent call last):
File "scripts/analyze-migration.py", line 662, in <module>
dump.read(dump_memory = args.memory)
File "scripts/analyze-migration.py", line 596, in read
classdesc = self.section_classes[section_key]
KeyError: ('s390-storage_attributes', 0)
It obviously never has been adapted to s390x yet, so until this
has been done, disable this test on s390x.
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: c8a7fc5179c649eed1d4286776a23e8a1a183cdc
https://github.com/qemu/qemu/commit/c8a7fc5179c649eed1d4286776a23e8a1a183cdc
Author: Steve Sistare <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M backends/tpm/tpm_emulator.c
M block/parallels.c
M block/qcow.c
M block/vdi.c
M block/vhdx.c
M block/vmdk.c
M block/vpc.c
M block/vvfat.c
M dump/dump.c
M hw/9pfs/9p.c
M hw/display/virtio-gpu-base.c
M hw/intc/arm_gic_kvm.c
M hw/intc/arm_gicv3_its_kvm.c
M hw/intc/arm_gicv3_kvm.c
M hw/misc/ivshmem.c
M hw/ppc/pef.c
M hw/ppc/spapr.c
M hw/ppc/spapr_events.c
M hw/ppc/spapr_rtas.c
M hw/remote/proxy.c
M hw/s390x/s390-virtio-ccw.c
M hw/scsi/vhost-scsi.c
M hw/vfio/common.c
M hw/vfio/migration.c
M hw/virtio/vhost.c
M include/migration/blocker.h
M migration/migration.c
M stubs/migr-blocker.c
M target/i386/kvm/kvm.c
M target/i386/nvmm/nvmm-all.c
M target/i386/sev.c
M target/i386/whpx/whpx-all.c
M ui/vdagent.c
Log Message:
-----------
migration: simplify blockers
Modify migrate_add_blocker and migrate_del_blocker to take an Error **
reason. This allows migration to own the Error object, so that if
an error occurs in migrate_add_blocker, migration code can free the Error
and clear the client handle, simplifying client code. It also simplifies
the migrate_del_blocker call site.
In addition, this is a pre-requisite for a proposed future patch that would
add a mode argument to migration requests to support live update, and
maintain a list of blockers for each mode. A blocker may apply to a single
mode or to multiple modes, and passing Error** will allow one Error object
to be registered for multiple modes.
No functional change.
Signed-off-by: Steve Sistare <[email protected]>
Tested-by: Michael Galaxy <[email protected]>
Reviewed-by: Michael Galaxy <[email protected]>
Reviewed-by: Peter Xu <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 2c36076a1153e321e32a28b735f5c0fe70d8d10f
https://github.com/qemu/qemu/commit/2c36076a1153e321e32a28b735f5c0fe70d8d10f
Author: Peter Xu <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M migration/ram.c
Log Message:
-----------
migration: Fix parse_ramblock() on overwritten retvals
It's possible that some errors can be overwritten with success retval later
on, and then ignored. Always capture all errors and report.
Reported by Coverity 1522861, but actually I spot one more in the same
function.
Fixes: CID 1522861
Signed-off-by: Peter Xu <[email protected]>
Reviewed-by: Fabiano Rosas <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: d9cda21303a2b92cf3be48b75d4201896aa06857
https://github.com/qemu/qemu/commit/d9cda21303a2b92cf3be48b75d4201896aa06857
Author: Steve Sistare <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M hw/net/virtio-net.c
M hw/vfio/migration.c
M include/migration/misc.h
M migration/migration.c
M net/vhost-vdpa.c
M ui/spice-core.c
Log Message:
-----------
migration: simplify notifiers
Pass the callback function to add_migration_state_change_notifier so
that migration can initialize the notifier on add and clear it on
delete, which simplifies the call sites. Shorten the function names
so the extra arg can be added more legibly. Hide the global notifier
list in a new function migration_call_notifiers, and make it externally
visible so future live update code can call it.
No functional change.
Signed-off-by: Steve Sistare <[email protected]>
Reviewed-by: Peter Xu <[email protected]>
Tested-by: Michael Galaxy <[email protected]>
Reviewed-by: Michael Galaxy <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 175e63c9829f9887c04bed8e0c4906e1166c9a87
https://github.com/qemu/qemu/commit/175e63c9829f9887c04bed8e0c4906e1166c9a87
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M migration/multifd.c
Log Message:
-----------
migration/multifd: Stop checking p->quit in multifd_send_thread
We don't need to check p->quit in the multifd_send_thread() because it
is shadowed by the 'exiting' flag. Ever since that flag was added
p->quit became obsolete as a way to stop the thread.
Since p->quit is set at multifd_send_terminate_threads() under the
p->mutex lock, the thread will only see it once it loops, so 'exiting'
will always be seen first.
Note that setting p->quit at multifd_send_terminate_threads() still
makes sense because we need a way to inform multifd_send_pages() that
the channel has stopped.
Signed-off-by: Fabiano Rosas <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: f4a7b30fcd5b60ca9b0215f9a6fa1faf9bd73f7b
https://github.com/qemu/qemu/commit/f4a7b30fcd5b60ca9b0215f9a6fa1faf9bd73f7b
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/libqtest.c
Log Message:
-----------
tests/qtest: Allow qtest_qemu_binary to use a custom environment variable
We're adding support for testing migration using two different QEMU
binaries. We'll provide the second binary in a new environment
variable.
Allow qtest_qemu_binary() to receive the name of the new variable. If
the new environment variable is not set, that's not an error, we use
QTEST_QEMU_BINARY as a fallback.
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 9931215bd33b640dcc824e07431e67e6ddb6b1e1
https://github.com/qemu/qemu/commit/9931215bd33b640dcc824e07431e67e6ddb6b1e1
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/libqtest.c
M tests/qtest/libqtest.h
Log Message:
-----------
tests/qtest: Introduce qtest_init_with_env
Add a version of qtest_init() that takes an environment variable
containing the path of the QEMU binary. This allows tests to use more
than one QEMU binary.
If no variable is provided or the environment variable does not exist,
that is not an error. Fallback to using QTEST_QEMU_BINARY.
Signed-off-by: Fabiano Rosas <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 41b2eba4e5c480b8515db60f23b0cb5eeae0dc50
https://github.com/qemu/qemu/commit/41b2eba4e5c480b8515db60f23b0cb5eeae0dc50
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/libqtest.c
Log Message:
-----------
tests/qtest: Allow qtest_get_machines to use an alternate QEMU binary
We're adding support for using more than one QEMU binary in
tests. Modify qtest_get_machines() to take an environment variable
that contains the QEMU binary path.
Since the function keeps a cache of the machines list in the form of a
static variable, refresh it any time the environment variable changes.
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 1027fc0ae4fcd24c11a43d1f217a1d11579a574b
https://github.com/qemu/qemu/commit/1027fc0ae4fcd24c11a43d1f217a1d11579a574b
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/libqtest.c
M tests/qtest/libqtest.h
Log Message:
-----------
tests/qtest: Introduce qtest_has_machine_with_env
Add a variant of qtest_has_machine() that receives an environment
variable containing an alternate QEMU binary path.
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: a3c0ebc9b09cb15cac35690412eb66aaa5eb4f23
https://github.com/qemu/qemu/commit/a3c0ebc9b09cb15cac35690412eb66aaa5eb4f23
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/libqtest.c
M tests/qtest/libqtest.h
Log Message:
-----------
tests/qtest: Introduce qtest_resolve_machine_alias
The migration tests are being enhanced to test migration between
different QEMU versions. A requirement of migration is that the
machine type between source and destination matches, including the
version.
We cannot hardcode machine types in the tests because those change
with each release. QEMU provides a machine type alias that has a fixed
name, but points to the latest machine type at each release.
Add a helper to resolve the alias into the exact machine
type. E.g. "-machine pc" resolves to "pc-i440fx-8.2"
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: dcf389cbc84c2b714d49887775918c5f03f73864
https://github.com/qemu/qemu/commit/dcf389cbc84c2b714d49887775918c5f03f73864
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-helpers.c
M tests/qtest/migration-helpers.h
Log Message:
-----------
tests/qtest/migration: Introduce find_common_machine_version
When using two different QEMU binaries for migration testing, we'll
need to find what is the machine version that will work with both
binaries. Add a helper for that.
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: c99613910106fd9a79005a3e8f47b1ce7d46dbc4
https://github.com/qemu/qemu/commit/c99613910106fd9a79005a3e8f47b1ce7d46dbc4
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration: Define a machine for all architectures
Stop relying on defaults and select a machine explicitly for every
architecture.
This is a prerequisite for being able to select machine types for
migration using different QEMU binaries for source and destination.
Signed-off-by: Fabiano Rosas <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 3cb9c6553be28b01761c97768abb41c4b5aaa333
https://github.com/qemu/qemu/commit/3cb9c6553be28b01761c97768abb41c4b5aaa333
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration: Specify the geometry of the bootsector
We're about to enable the x86_64 tests to run with the q35 machine,
but that machine does not work with the program we use to dirty the
memory for the tests.
The issue is that QEMU needs to guess the geometry of the "disk" we
give to it and the guessed geometry doesn't pass the sanity checks
done by SeaBIOS. This causes SeaBIOS to interpret the geometry as if
needing a translation from LBA to CHS and SeaBIOS ends up miscomputing
the number of cylinders and aborting due to that.
The reason things work with the "pc" machine is that is uses ATA
instead of AHCI like q35 and SeaBIOS has an exception for ATA that
ends up skipping the sanity checks and ignoring translation
altogether.
Workaround this situation by specifying a geometry in the command
line.
Signed-off-by: Fabiano Rosas <[email protected]>
Acked-by: Thomas Huth <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: fa35b0cb25775abb95f61e219b14b63084fb7c5a
https://github.com/qemu/qemu/commit/fa35b0cb25775abb95f61e219b14b63084fb7c5a
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration: Set q35 as the default machine for x86_86
Change the x86_64 to use the q35 machines in tests from now on. Keep
testing the pc macine on 32bit.
Signed-off-by: Fabiano Rosas <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 5050ad2a380832a62c7dedda147bbee06c8fe924
https://github.com/qemu/qemu/commit/5050ad2a380832a62c7dedda147bbee06c8fe924
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration: Support more than one QEMU binary
We have strict rules around migration compatibility between different
QEMU versions but no test to validate the migration state between
different binaries.
Add infrastructure to allow running the migration tests with two
different QEMU binaries as migration source and destination.
The code now recognizes two new environment variables
QTEST_QEMU_BINARY_SRC and QTEST_QEMU_BINARY_DST. In the absence of
either of them, the test will use the QTEST_QEMU_BINARY variable. If
both are missing then the tests are run with single binary as
previously.
The machine type is selected automatically as the latest machine type
version that works with both binaries.
Usage (only one of SRC|DST is allowed):
QTEST_QEMU_BINARY_SRC=../build-8.2.0/qemu-system-x86_64 \
QTEST_QEMU_BINARY=../build-8.1.0/qemu-system-x86_64 \
./tests/qtest/migration-test
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 6c6d2330a07d8a1ba1c1613d8631599a072c5544
https://github.com/qemu/qemu/commit/6c6d2330a07d8a1ba1c1613d8631599a072c5544
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/migration-helpers.c
M tests/qtest/migration-helpers.h
M tests/qtest/migration-test.c
Log Message:
-----------
tests/qtest/migration: Allow user to specify a machine type
Accept the QTEST_QEMU_MACHINE_TYPE environment variable to take a
machine type to use in the tests.
The full machine type is recognized (e.g. pc-q35-8.2). Aliases
(e.g. pc) are also allowed and resolve to the latest machine version
for that alias, or, if using two QEMU binaries, to the latest common
machine version between the two.
Signed-off-by: Fabiano Rosas <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Juan Quintela <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Message-ID: <[email protected]>
Commit: 7789331b03ae3bffcb2de925a093796b3b9907ff
https://github.com/qemu/qemu/commit/7789331b03ae3bffcb2de925a093796b3b9907ff
Author: Fabiano Rosas <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M tests/qtest/libqtest.c
Log Message:
-----------
tests/qtest: Don't print messages from query instances
Now that we can query more than one binary, the "starting QEMU..."
message can get a little noisy. Mute those messages unless we're
running with --verbose.
Only affects qtest_init() calls from within libqtest. The tests
continue to output as usual.
Reviewed-by: Juan Quintela <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Juan Quintela <[email protected]>
Commit: caa75cc56e36b93553e19d74ab9e887cfd0ead20
https://github.com/qemu/qemu/commit/caa75cc56e36b93553e19d74ab9e887cfd0ead20
Author: Stefan Hajnoczi <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
M contrib/elf2dmp/addrspace.c
M contrib/elf2dmp/main.c
M contrib/elf2dmp/pdb.c
M contrib/elf2dmp/qemu_elf.c
M docs/system/arm/emulation.rst
M hw/arm/boot.c
M hw/arm/sbsa-ref.c
M hw/arm/smmuv3-internal.h
M hw/arm/smmuv3.c
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M hw/misc/bcm2835_property.c
M hw/nvram/xlnx-bbram.c
M hw/nvram/xlnx-versal-efuse-ctrl.c
M hw/nvram/xlnx-zynqmp-efuse.c
M hw/timer/npcm7xx_timer.c
A include/hw/arm/bsa.h
M include/hw/arm/exynos4210.h
A include/hw/arm/raspberrypi-fw-defs.h
M include/hw/arm/virt.h
R include/hw/misc/raspberrypi-fw-defs.h
M include/hw/nvram/xlnx-bbram.h
M target/arm/arm-powerctl.c
M target/arm/common-semi-target.h
M target/arm/cpu-qom.h
M target/arm/cpu.c
M target/arm/cpu.h
M target/arm/helper.c
M target/arm/kvm.c
M target/arm/kvm64.c
M target/arm/tcg/cpu32.c
M target/arm/tcg/cpu64.c
M target/arm/tcg/translate.c
Log Message:
-----------
Merge tag 'pull-target-arm-20231019' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder
* hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot'
* xlnx devices: remove deprecated device reset
* xlnx-bbram: hw/nvram: Use dot in device type name
* elf2dmp: fix coverity issues
* elf2dmp: convert to g_malloc, g_new and g_free
* target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0
* hw/arm: refactor virt PPI logic
* arm/kvm: convert to kvm_set_one_reg, kvm_get_one_reg
* target/arm: Permit T32 LDM with single register
* smmuv3: Advertise SMMUv3.1-XNX
* target/arm: Implement FEAT_HPMN0
* Remove some unnecessary include lines
* target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL
* hw/timer/npcm7xx_timer: Prevent timer from counting down past zero
# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 19 Oct 2023 06:34:22 PDT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "[email protected]"
# gpg: Good signature from "Peter Maydell <[email protected]>" [full]
# gpg: aka "Peter Maydell <[email protected]>" [full]
# gpg: aka "Peter Maydell <[email protected]>"
[full]
# gpg: aka "Peter Maydell <[email protected]>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20231019' of
https://git.linaro.org/people/pmaydell/qemu-arm: (24 commits)
contrib/elf2dmp: Use g_malloc(), g_new() and g_free()
hw/timer/npcm7xx_timer: Prevent timer from counting down past zero
target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL
target/arm/common-semi-target.h: Remove unnecessary boot.h include
target/arm/kvm64.c: Remove unused include
target/arm: Implement FEAT_HPMN0
hw/arm/smmuv3: Advertise SMMUv3.1-XNX feature
hw/arm/smmuv3: Sort ID register setting into field order
hw/arm/smmuv3: Update ID register bit field definitions
target/arm: Permit T32 LDM with single register
arm/kvm: convert to kvm_get_one_reg
arm/kvm: convert to kvm_set_one_reg
hw/arm/sbsa-ref: use bsa.h for PPI definitions
include/hw/arm: move BSA definitions to bsa.h
{include/}hw/arm: refactor virt PPI logic
target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0
elf2dmp: check array bounds in pdb_get_file_size
elf2dmp: limit print length for sign_rsds
xlnx-bbram: hw/nvram: Use dot in device type name
xlnx-versal-efuse: hw/nvram: Remove deprecated device reset
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 31572e63cd1d82eea2eb3ec51eb9df3550a561fa
https://github.com/qemu/qemu/commit/31572e63cd1d82eea2eb3ec51eb9df3550a561fa
Author: Stefan Hajnoczi <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M qapi/compat.json
M scripts/qapi/gen.py
M scripts/qapi/parser.py
M scripts/qapi/schema.py
Log Message:
-----------
Merge tag 'pull-qapi-2023-10-19' of https://repo.or.cz/qemu/armbru into
staging
QAPI patches patches for 2023-10-19
# -----BEGIN PGP SIGNATURE-----
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# AKpBhmiNJKtK
# =KDfs
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 19 Oct 2023 07:00:34 PDT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "[email protected]"
# gpg: Good signature from "Markus Armbruster <[email protected]>" [full]
# gpg: aka "Markus Armbruster <[email protected]>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* tag 'pull-qapi-2023-10-19' of https://repo.or.cz/qemu/armbru:
qapi: provide a friendly string representation of QAPI classes
qapi: Belatedly update CompatPolicy documentation for unstable
qapi: re-establish linting baseline
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 46919512fcfec1e677733a16bc178898c524854f
https://github.com/qemu/qemu/commit/46919512fcfec1e677733a16bc178898c524854f
Author: Stefan Hajnoczi <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M .mailmap
M MAINTAINERS
M chardev/msmouse.c
M chardev/wctablet.c
M hw/acpi/pcihp.c
M hw/arm/virt.c
M hw/block/vhost-user-blk.c
M hw/char/escc.c
M hw/core/cpu-sysemu.c
M hw/display/virtio-gpu.c
M hw/display/xenfb.c
M hw/dma/xilinx_axidma.c
M hw/dma/xlnx-zdma.c
M hw/dma/xlnx_csu_dma.c
M hw/i386/amd_iommu.c
M hw/i386/intel_iommu.c
M hw/i386/microvm.c
M hw/i386/pc.c
M hw/input/adb-kbd.c
M hw/input/hid.c
M hw/input/ps2.c
M hw/input/virtio-input-hid.c
M hw/intc/apic_common.c
M hw/intc/spapr_xive.c
M hw/isa/i82378.c
M hw/isa/isa-bus.c
M hw/loongarch/virt.c
M hw/mips/cps.c
M hw/mips/fuloong2e.c
M hw/mips/jazz.c
M hw/mips/loongson3_virt.c
M hw/mips/malta.c
M hw/mips/mips_int.c
M hw/mips/mipssim.c
M hw/misc/allwinner-r40-dramc.c
M hw/misc/mips_itu.c
M hw/net/cadence_gem.c
M hw/pci-host/bonito.c
M hw/pci-host/sh_pci.c
M hw/pci/pci.c
M hw/ppc/pnv.c
M hw/ppc/pnv_xscom.c
M hw/ppc/spapr_vio.c
M hw/s390x/css-bridge.c
M hw/s390x/sclpquiesce.c
M hw/scsi/virtio-scsi.c
M hw/sd/sdhci.c
M hw/sparc64/sun4u.c
M hw/virtio/virtio-pmem.c
M include/hw/acpi/pcihp.h
M include/hw/audio/pcspk.h
M include/hw/core/cpu.h
M include/hw/core/sysemu-cpu-ops.h
R include/hw/mips/cpudevs.h
M include/hw/misc/mips_itu.h
M include/hw/pci/pci.h
M include/hw/ppc/pnv_xscom.h
M include/hw/virtio/virtio-input.h
M include/sysemu/memory_mapping.h
M include/ui/input.h
M meson.build
M system/memory_mapping.c
M target/i386/arch_memory_mapping.c
M target/i386/cpu.h
M target/mips/cpu.h
M target/mips/sysemu/cp0_timer.c
M target/mips/tcg/sysemu/cp0_helper.c
M target/mips/tcg/sysemu/tlb_helper.c
M ui/input-legacy.c
M ui/input.c
M ui/vdagent.c
M util/cutils.c
Log Message:
-----------
Merge tag 'hw-misc-20231019' of https://github.com/philmd/qemu into staging
Misc hardware patch queue
- MAINTAINERS updates (Zoltan, Thomas)
- Fix cutils::get_relocated_path on Windows host (Akihiko)
- Housekeeping in Memory APIs (Marc-André)
- SDHCI fix for SDMA transfer (Lu, Jianxian)
- Various QOM/QDev/SysBus cleanups (Philippe)
- Constify QemuInputHandler structure (Philippe)
# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 19 Oct 2023 14:16:16 PDT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <[email protected]>"
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20231019' of https://github.com/philmd/qemu: (46 commits)
ui/input: Constify QemuInputHandler structure
hw/net: Declare link using static DEFINE_PROP_LINK() macro
hw/dma: Declare link using static DEFINE_PROP_LINK() macro
hw/scsi/virtio-scsi: Use VIRTIO_SCSI_COMMON() macro
hw/display/virtio-gpu: Use VIRTIO_DEVICE() macro
hw/block/vhost-user-blk: Use DEVICE() / VIRTIO_DEVICE() macros
hw/virtio/virtio-pmem: Replace impossible check by assertion
hw/s390x/css-bridge: Realize sysbus device before accessing it
hw/isa: Realize ISA bridge device before accessing it
hw/arm/virt: Realize ARM_GICV2M sysbus device before accessing it
hw/acpi: Realize ACPI_GED sysbus device before accessing it
hw/pci-host/bonito: Do not use SysBus API to map local MMIO region
hw/misc/allwinner-dramc: Do not use SysBus API to map local MMIO region
hw/misc/allwinner-dramc: Move sysbus_mmio_map call from init -> realize
hw/i386/intel_iommu: Do not use SysBus API to map local MMIO region
hw/i386/amd_iommu: Do not use SysBus API to map local MMIO region
hw/audio/pcspk: Inline pcspk_init()
hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region
hw/intc/spapr_xive: Move sysbus_init_mmio() calls around
hw/ppc/pnv: Do not use SysBus API to map local MMIO region
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 749d14f782c333b8167f712d55cc36797e88122a
https://github.com/qemu/qemu/commit/749d14f782c333b8167f712d55cc36797e88122a
Author: Stefan Hajnoczi <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
M hw/hppa/Kconfig
M hw/hppa/hppa_hardware.h
M hw/hppa/machine.c
M hw/input/lasips2.c
M hw/net/tulip.c
M hw/pci-host/Kconfig
A hw/pci-host/astro.c
M hw/pci-host/meson.build
M hw/pci-host/trace-events
A include/hw/pci-host/astro.h
M include/hw/pci/pci_ids.h
M pc-bios/hppa-firmware.img
M roms/seabios-hppa
Log Message:
-----------
Merge tag 'C3700-pull-request' of https://github.com/hdeller/qemu-hppa into
staging
target/hppa: Add emulation of a C3700 HP-PARISC workstation
This series adds a new PA-RISC machine emulation for the HP-PARISC
C3700 workstation.
The physical HP C3700 machine has a PA2.0 (64-bit) CPU, in contrast to
the existing emulation of a B160L workstation which is a 32-bit only
machine and where it's Dino PCI controller isn't 64-bit capable.
With the HP C3700 machine emulation (together with the emulated Astro
Memory controller and the Elroy PCI bridge) it's now possible to
enhance the hppa CPU emulation to support the 64-bit instruction set
in upcoming patches.
Helge
v4 changes:
- Fix testsuite error in astro by adding a realize() implementation
v3 changes:
based on feedback from BALATON Zoltan <[email protected]>:
- apply paches in different order to bring them logically closer to each other
- update comments in lasips2
- rephrased title and commit message of MAINTAINERS patch
v2 changes:
suggestions by BALATON Zoltan <[email protected]>:
- merged pci_ids and tulip patch
- dropped comments in lasips2
- mention additional cleanups in patch "Require at least SeaBIOS-hppa version
10"
suggestions by Philippe Mathieu-Daudé <[email protected]>:
- dropped static pci_bus variable
# -----BEGIN PGP SIGNATURE-----
#
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 19 Oct 2023 15:51:57 PDT
# gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F
# gpg: Good signature from "Helge Deller <[email protected]>" [unknown]
# gpg: aka "Helge Deller <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603
# Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F
* tag 'C3700-pull-request' of https://github.com/hdeller/qemu-hppa:
hw/hppa: Add new HP C3700 machine
hw/hppa: Split out machine creation
hw/hppa: Provide RTC and DebugOutputPort on CPU #0
hw/hppa: Export machine name, BTLBs, power-button address via fw_cfg
MAINTAINERS: Update HP-PARISC entries
pci-host: Wire up new Astro/Elroy PCI bridge
hw/pci-host: Add Astro system bus adapter found on PA-RISC machines
lasips2: LASI PS/2 devices are not user-createable
pci_ids/tulip: Add PCI vendor ID for HP and use it in tulip
hw/hppa: Require at least SeaBIOS-hppa version 10
target/hppa: Update to SeaBIOS-hppa version 10
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: ebdf417220f5264475e0423b8016c1444f2cf406
https://github.com/qemu/qemu/commit/ebdf417220f5264475e0423b8016c1444f2cf406
Author: Stefan Hajnoczi <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M MAINTAINERS
M docs/devel/index-internals.rst
A docs/devel/s390-cpu-topology.rst
A docs/system/s390x/cpu-topology.rst
M docs/system/target-s390x.rst
M hw/core/machine-hmp-cmds.c
M hw/core/machine-smp.c
M hw/core/machine.c
M hw/core/qdev-properties-system.c
A hw/s390x/cpu-topology.c
M hw/s390x/meson.build
M hw/s390x/s390-virtio-ccw.c
M hw/s390x/sclp.c
M include/hw/boards.h
M include/hw/qdev-properties-system.h
A include/hw/s390x/cpu-topology.h
M include/hw/s390x/s390-virtio-ccw.h
M include/hw/s390x/sclp.h
A qapi/machine-common.json
M qapi/machine-target.json
M qapi/machine.json
M qapi/meson.build
M qapi/qapi-schema.json
M qemu-options.hx
M system/vl.c
M target/s390x/cpu-sysemu.c
M target/s390x/cpu.c
M target/s390x/cpu.h
M target/s390x/cpu_models.c
M target/s390x/kvm/kvm.c
M target/s390x/kvm/kvm_s390x.h
M target/s390x/kvm/meson.build
A target/s390x/kvm/stsi-topology.c
A tests/avocado/s390_topology.py
M tests/qtest/migration-test.c
Log Message:
-----------
Merge tag 'pull-request-2023-10-20' of https://gitlab.com/thuth/qemu into
staging
* s390x CPU topology support
* Simplify the KVM register synchronization code
* Disable the analyze-migration.py test on s390x
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 19 Oct 2023 22:17:55 PDT
# gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "[email protected]"
# gpg: Good signature from "Thomas Huth <[email protected]>" [full]
# gpg: aka "Thomas Huth <[email protected]>" [full]
# gpg: aka "Thomas Huth <[email protected]>" [full]
# gpg: aka "Thomas Huth <[email protected]>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-10-20' of https://gitlab.com/thuth/qemu: (24 commits)
tests/qtest/migration-test: Disable the analyze-migration.py test on s390x
target/s390x/kvm: Simplify the GPRs, ACRs, CRs and prefix synchronization code
target/s390x/kvm: Turn KVM_CAP_SYNC_REGS into a hard requirement
tests/avocado: s390x cpu topology bad move
tests/avocado: s390x cpu topology dedicated errors
tests/avocado: s390x cpu topology test socket full
tests/avocado: s390x cpu topology test dedicated CPU
tests/avocado: s390x cpu topology entitlement tests
tests/avocado: s390x cpu topology polarization
tests/avocado: s390x cpu topology core
docs/s390x/cpu topology: document s390x cpu topology
qapi/s390x/cpu topology: add query-s390x-cpu-polarization command
qapi/s390x/cpu topology: CPU_POLARIZATION_CHANGE QAPI event
machine: adding s390 topology to info hotpluggable-cpus
machine: adding s390 topology to query-cpu-fast
qapi/s390x/cpu topology: set-cpu-topology qmp command
target/s390x/cpu topology: activate CPU topology
s390x/cpu topology: interception of PTF instruction
s390x/cpu topology: resetting the Topology-Change-Report
s390x/sclp: reporting the maximum nested topology entries
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 384dbdda94c0bba55bf186cccd3714bbb9b737e9
https://github.com/qemu/qemu/commit/384dbdda94c0bba55bf186cccd3714bbb9b737e9
Author: Stefan Hajnoczi <[email protected]>
Date: 2023-10-20 (Fri, 20 Oct 2023)
Changed paths:
M backends/tpm/tpm_emulator.c
M block/parallels.c
M block/qcow.c
M block/vdi.c
M block/vhdx.c
M block/vmdk.c
M block/vpc.c
M block/vvfat.c
M dump/dump.c
M hw/9pfs/9p.c
M hw/display/virtio-gpu-base.c
M hw/intc/arm_gic_kvm.c
M hw/intc/arm_gicv3_its_kvm.c
M hw/intc/arm_gicv3_kvm.c
M hw/misc/ivshmem.c
M hw/net/virtio-net.c
M hw/ppc/pef.c
M hw/ppc/spapr.c
M hw/ppc/spapr_events.c
M hw/ppc/spapr_rtas.c
M hw/remote/proxy.c
M hw/s390x/s390-virtio-ccw.c
M hw/scsi/vhost-scsi.c
M hw/vfio/common.c
M hw/vfio/migration.c
M hw/virtio/vhost.c
M include/migration/blocker.h
M include/migration/misc.h
M migration/migration.c
M migration/multifd.c
M migration/ram.c
M net/vhost-vdpa.c
M stubs/migr-blocker.c
M target/i386/kvm/kvm.c
M target/i386/nvmm/nvmm-all.c
M target/i386/sev.c
M target/i386/whpx/whpx-all.c
M tests/qtest/libqtest.c
M tests/qtest/libqtest.h
M tests/qtest/migration-helpers.c
M tests/qtest/migration-helpers.h
M tests/qtest/migration-test.c
M ui/spice-core.c
M ui/vdagent.c
Log Message:
-----------
Merge tag 'migration-20231020-pull-request' of
https://gitlab.com/juan.quintela/qemu into staging
Migration Pull request (20231020)
In this pull request:
- disable analyze-migration on s390x (thomas)
- Fix parse_ramblock() (peter)
- start merging live update (steve)
- migration-test support for using several binaries (fabiano)
- multifd cleanups (fabiano)
CI: https://gitlab.com/juan.quintela/qemu/-/pipelines/1042492801
Please apply.
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# gpg: Signature made Thu 19 Oct 2023 23:57:15 PDT
# gpg: using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723
# gpg: Good signature from "Juan Quintela <[email protected]>" [full]
# gpg: aka "Juan Quintela <[email protected]>" [full]
# Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723
* tag 'migration-20231020-pull-request' of
https://gitlab.com/juan.quintela/qemu:
tests/qtest: Don't print messages from query instances
tests/qtest/migration: Allow user to specify a machine type
tests/qtest/migration: Support more than one QEMU binary
tests/qtest/migration: Set q35 as the default machine for x86_86
tests/qtest/migration: Specify the geometry of the bootsector
tests/qtest/migration: Define a machine for all architectures
tests/qtest/migration: Introduce find_common_machine_version
tests/qtest: Introduce qtest_resolve_machine_alias
tests/qtest: Introduce qtest_has_machine_with_env
tests/qtest: Allow qtest_get_machines to use an alternate QEMU binary
tests/qtest: Introduce qtest_init_with_env
tests/qtest: Allow qtest_qemu_binary to use a custom environment variable
migration/multifd: Stop checking p->quit in multifd_send_thread
migration: simplify notifiers
migration: Fix parse_ramblock() on overwritten retvals
migration: simplify blockers
tests/qtest/migration-test: Disable the analyze-migration.py test on s390x
Signed-off-by: Stefan Hajnoczi <[email protected]>
Compare: https://github.com/qemu/qemu/compare/0d239e513e01...384dbdda94c0
