Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 01e8774d6d67362f3b48172597278a6ce3ba5f44
      
https://github.com/qemu/qemu/commit/01e8774d6d67362f3b48172597278a6ce3ba5f44
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M configure

  Log Message:
  -----------
  configure: detect --cpu=mipsisa64r6

Treat it as a MIPS64 machine.

Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 05b379e04ed3daed350383789d1254ad19050578
      
https://github.com/qemu/qemu/commit/05b379e04ed3daed350383789d1254ad19050578
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/cpu-dump.c

  Log Message:
  -----------
  target/i386: fix CC_OP dump

POPCNT was missing, and the entries were all out of order after
ADCX/ADOX/ADCOX were moved close to EFLAGS.  Just use designated
initializers.

Fixes: 4885c3c4953 ("target-i386: Use ctpop helper", 2017-01-10)
Fixes: cc155f19717 ("target/i386: rewrite flags writeback for ADCX/ADOX", 
2024-06-11)
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: c01d64a1e31a777222a9def66c045c677b945e39
      
https://github.com/qemu/qemu/commit/c01d64a1e31a777222a9def66c045c677b945e39
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/cpu.h
    M target/i386/tcg/cc_helper.c
    M target/i386/tcg/emit.c.inc
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: use cpu_cc_dst for CC_OP_POPCNT

It is the only CCOp, among those that compute ZF from one of the cc_op_*
registers, that uses cpu_cc_src.  Do not make it the odd one off,
instead use cpu_cc_dst like the others.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 3cef7c1459ea0182d6cb1e0f22d4ab57bc480a7e
      
https://github.com/qemu/qemu/commit/3cef7c1459ea0182d6cb1e0f22d4ab57bc480a7e
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/cpu.h
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL

Handle it like the other arithmetic cc_ops.  This simplifies a
bit the implementation of bit test instructions.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: d5469841f80cb205145a547b8c66efaf8161771e
      
https://github.com/qemu/qemu/commit/d5469841f80cb205145a547b8c66efaf8161771e
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/decode-new.c.inc
    M target/i386/tcg/decode-new.h
    M target/i386/tcg/emit.c.inc
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: convert bit test instructions to new decoder

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 3c49afeacedf5ae0b5b71916f0ac28ac3f1eff1b
      
https://github.com/qemu/qemu/commit/3c49afeacedf5ae0b5b71916f0ac28ac3f1eff1b
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX

When computing the "other" flag (CF for CC_OP_ADOX, OF for CC_OP_ADCX),
take into account that it is already in the right position of cpu_cc_src,
just like for CC_OP_EFLAGS.  There is no need to call gen_compute_eflags().

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 34d876d0992af4f147d68230274a2fabc0d15819
      
https://github.com/qemu/qemu/commit/34d876d0992af4f147d68230274a2fabc0d15819
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/decode-new.c.inc
    M target/i386/tcg/decode-new.h
    M target/i386/tcg/emit.c.inc
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: decode address before going back to translate.c

There are now relatively few unconverted opcodes in translate.c (there
are 13 of them including 8 for x87), and all of them have the same
format with a mod/rm byte and no immediate.  A good next step is
to remove the early bail out to disas_insn_x87/disas_insn_old,
instead giving these legacy translator functions the same prototype
as the other gen_* functions.

To do this, the X86DecodeInsn can be passed down to the places that
used to fetch address bytes from the instruction stream.  To make
sure that everything is done cleanly, the CPUX86State* argument is
removed.

As part of the unification, the gen_lea_modrm() name is now free,
so rename gen_load_ea() to gen_lea_modrm().  This is as good a name
and it makes the changes to translate.c easier to review.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 584e634a774392cd839e84a0ed120d2677029c69
      
https://github.com/qemu/qemu/commit/584e634a774392cd839e84a0ed120d2677029c69
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/decode-new.c.inc
    M target/i386/tcg/decode-new.h
    M target/i386/tcg/emit.c.inc
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder

This moves the last LOCK-enabled instructions to the new decoder.  It is now
possible to assume that PREFIX_LOCK gen_multi0F is called only after checking
that LOCK was not specified.

The gen_cmpxchg8b and gen_cmpxchg16b functions even have the correct
prototype already; the only thing that needs to be done is removing the
gen_lea_modrm() call.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 9edaf8b2daf14dfad4f1de9f37d8a56240b2120a
      
https://github.com/qemu/qemu/commit/9edaf8b2daf14dfad4f1de9f37d8a56240b2120a
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: do not check PREFIX_LOCK in old-style decoder

It is already checked before getting there.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 667a57b83faf9ee743dce69b7c180f7f94ec0874
      
https://github.com/qemu/qemu/commit/667a57b83faf9ee743dce69b7c180f7f94ec0874
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/decode-new.c.inc

  Log Message:
  -----------
  target/i386: list instructions still in translate.c

Group them so that it is easier to figure out which two-byte opcodes to
tackle together.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: afe1ad4b94f9ee8b24fcf5e0d71c5cc7e16db665
      
https://github.com/qemu/qemu/commit/afe1ad4b94f9ee8b24fcf5e0d71c5cc7e16db665
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: assert that cc_op* and pc_save are preserved

Now all decoding has been done before any code generation.
There is no need anymore to save and restore cc_op* and
pc_save but, for the time being, assert that this is indeed
the case.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 5856f9efd361afca80fae0cbef3ff0ac775e8790
      
https://github.com/qemu/qemu/commit/5856f9efd361afca80fae0cbef3ff0ac775e8790
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M target/i386/tcg/translate.c

  Log Message:
  -----------
  target/i386: remove gen_ext_tl

With the introduction of tcg_gen_ext_tl, most uses can be converted directly
because they do not have a NULL destination.  tcg_gen_ext_tl is able to drop
no-ops like "tcg_gen_ext_tl(tcgv, tcgv, MO_TL)" just fine, and the only thing
that gen_ext_tl was adding on top was avoiding the creation of a useless
temporary.  This can be done in the only place where it matters, which is
gen_op_j_ecx.

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 87d453fb24904fff0c806635edb36d1c68f6bb07
      
https://github.com/qemu/qemu/commit/87d453fb24904fff0c806635edb36d1c68f6bb07
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M host/include/i386/host/cpuinfo.h
    M tcg/i386/tcg-target.h
    M util/cpuinfo-i386.c

  Log Message:
  -----------
  Revert "host/i386: assume presence of POPCNT"

This reverts commit 45ccdbcb24baf99667997fac5cf60318e5e7db51.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.

Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: b0546fa7cd987bb5b5555b547066e0abdf01cfe0
      
https://github.com/qemu/qemu/commit/b0546fa7cd987bb5b5555b547066e0abdf01cfe0
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M util/cpuinfo-i386.c

  Log Message:
  -----------
  Revert "host/i386: assume presence of SSSE3"

This reverts commit 433cd6d94a8256af70a5200f236dc8047c3c1468.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.

Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 51916c577262fe5ed405911399991b05c3819c01
      
https://github.com/qemu/qemu/commit/51916c577262fe5ed405911399991b05c3819c01
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M host/include/i386/host/bufferiszero.c.inc
    M host/include/i386/host/cpuinfo.h
    M util/cpuinfo-i386.c

  Log Message:
  -----------
  Revert "host/i386: assume presence of SSE2"

This reverts commit b18236897ca15c3db1506d8edb9a191dfe51429c.
The x86-64 instruction set can now be tuned down to x86-64 v1
or i386 Pentium Pro.

Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 4e46a55b1b200649c95a7f37a424188507d5d650
      
https://github.com/qemu/qemu/commit/4e46a55b1b200649c95a7f37a424188507d5d650
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M meson.build
    M meson_options.txt
    M scripts/meson-buildoptions.sh

  Log Message:
  -----------
  meson: allow configuring the x86-64 baseline

Add a Meson option to configure which x86-64 instruction
set to use.  QEMU will now default to x86-64-v1 + cmpxchg16b for
64-bit builds (that corresponds to a Pentium 4 for 32-bit builds).

The baseline can be tuned down to Pentium Pro for 32-bit builds (with
-Dx86_version=0), or up as desired.

Acked-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 6b75ac917bb60abba3a46b9e3de544e8bd0c4467
      
https://github.com/qemu/qemu/commit/6b75ac917bb60abba3a46b9e3de544e8bd0c4467
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M meson.build
    M meson_options.txt
    M scripts/meson-buildoptions.sh

  Log Message:
  -----------
  meson: remove dead optimization option

Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: b04b773aaf17b29944d94285fb0a7b1f6c84df0a
      
https://github.com/qemu/qemu/commit/b04b773aaf17b29944d94285fb0a7b1f6c84df0a
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M block.c

  Log Message:
  -----------
  block: make assertion more generic

.bdrv_needs_filename is only set for drivers that also set bdrv_file_open,
i.e. protocol drivers.

So we can make the assertion always, it will always pass for those drivers
that use bdrv_open.

Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 23ff79ee84d18ffbd33cf08735597c6ef2575b4a
      
https://github.com/qemu/qemu/commit/23ff79ee84d18ffbd33cf08735597c6ef2575b4a
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M block.c

  Log Message:
  -----------
  block: do not check bdrv_file_open

The set of BlockDrivers that have .bdrv_file_open coincides with those
that have .protocol_name and guess what---checking drv->bdrv_file_open
is done to see if the driver is a protocol.  So check drv->protocol_name
instead.

Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 75c7dbc7159ba61e735d8f2ee42ba357fcb86e79
      
https://github.com/qemu/qemu/commit/75c7dbc7159ba61e735d8f2ee42ba357fcb86e79
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M block.c
    M block/blkdebug.c
    M block/blkio.c
    M block/blkverify.c
    M block/curl.c
    M block/file-posix.c
    M block/file-win32.c
    M block/gluster.c
    M block/iscsi.c
    M block/nbd.c
    M block/nfs.c
    M block/null.c
    M block/nvme.c
    M block/rbd.c
    M block/ssh.c
    M block/vvfat.c
    M include/block/block_int-common.h

  Log Message:
  -----------
  block: remove separate bdrv_file_open callback

bdrv_file_open and bdrv_open are completely equivalent, they are
never checked except to see which one to invoke.  So merge them
into a single one.

Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: cd411e47a11df09461503aa66558d4a28e47081a
      
https://github.com/qemu/qemu/commit/cd411e47a11df09461503aa66558d4a28e47081a
  Author: Paolo Bonzini <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M block/blkio.c
    M block/null.c
    M block/nvme.c
    M block/ssh.c

  Log Message:
  -----------
  block: rename former bdrv_file_open callbacks

Since there is no bdrv_file_open callback anymore, rename the implementations
so that they end with "_open" instead of "_file_open".  NFS is the exception
because all the functions are named nfs_file_*.

Suggested-by: Kevin Wolf <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: c98831bac2c0553e86a14fc996620faf48cb07d5
      
https://github.com/qemu/qemu/commit/c98831bac2c0553e86a14fc996620faf48cb07d5
  Author: Roman Kiryanov <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M include/exec/memory.h

  Log Message:
  -----------
  exec: avoid using C++ keywords in function parameters

to use the QEMU headers with a C++ compiler.

Signed-off-by: Roman Kiryanov <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: 0753fbb4750ad6709c43b4263c3d29b00f7cd0bb
      
https://github.com/qemu/qemu/commit/0753fbb4750ad6709c43b4263c3d29b00f7cd0bb
  Author: Roman Kiryanov <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M include/exec/memory.h

  Log Message:
  -----------
  exec: don't use void* in pointer arithmetic in headers

void* pointer arithmetic is a GCC extentension which could not be
available in other build tools (e.g. C++). This changes removes this
assumption.

Signed-off-by: Roman Kiryanov <[email protected]>
Suggested-by: Paolo Bonzini <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>


  Commit: a6981005288c044b91f8404ada208b81535a67c1
      
https://github.com/qemu/qemu/commit/a6981005288c044b91f8404ada208b81535a67c1
  Author: Richard Henderson <[email protected]>
  Date:   2024-06-24 (Mon, 24 Jun 2024)

  Changed paths:
    M block.c
    M block/blkdebug.c
    M block/blkio.c
    M block/blkverify.c
    M block/curl.c
    M block/file-posix.c
    M block/file-win32.c
    M block/gluster.c
    M block/iscsi.c
    M block/nbd.c
    M block/nfs.c
    M block/null.c
    M block/nvme.c
    M block/rbd.c
    M block/ssh.c
    M block/vvfat.c
    M configure
    M host/include/i386/host/bufferiszero.c.inc
    M host/include/i386/host/cpuinfo.h
    M include/block/block_int-common.h
    M include/exec/memory.h
    M meson.build
    M meson_options.txt
    M scripts/meson-buildoptions.sh
    M target/i386/cpu-dump.c
    M target/i386/cpu.h
    M target/i386/tcg/cc_helper.c
    M target/i386/tcg/decode-new.c.inc
    M target/i386/tcg/decode-new.h
    M target/i386/tcg/emit.c.inc
    M target/i386/tcg/translate.c
    M tcg/i386/tcg-target.h
    M util/cpuinfo-i386.c

  Log Message:
  -----------
  Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: detect --cpu=mipsisa64r6
* target/i386: decode address before going back to translate.c
* meson: allow configuring the x86-64 baseline
* meson: remove dead optimization option
* exec: small changes to allow compilation with C++ in Android emulator

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmZ5HbcUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroNx+gf7Bc8tCmAZsTH2yuBqTQ9mH+B+BLDF
# HV3oNA+9nRVnaHSS/6hiskrLxjL02b5hFaKOFs6ykIrN5No9cfVfSIEe5GcRuuKd
# XKPDNjkEtK+YFEFVHiSXRt069C78V7qtrkfrxpOSq3Y4vq356oYDCYUx2UOO9Eih
# AS6x45MtiY2P6GdNCQJvNNKoAN7L52Kc31UIY3jNA0hF03gVqmENTItXiMpuJUQK
# 6f35APns06eN4pJsEzrE2KRoFL+hBuHC8ajN/SXk2ptepyi3zCuoeUlhfp8N4Z+9
# LiVIMd8issdAhXxPWkVlNQgVAodSqFtUWXhw8HGj2pk1YtoKYipfzg+l1A==
# =wzOH
# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 24 Jun 2024 12:18:15 AM PDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "[email protected]"
# gpg: Good signature from "Paolo Bonzini <[email protected]>" [full]
# gpg:                 aka "Paolo Bonzini <[email protected]>" [full]

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (23 commits)
  exec: don't use void* in pointer arithmetic in headers
  exec: avoid using C++ keywords in function parameters
  block: rename former bdrv_file_open callbacks
  block: remove separate bdrv_file_open callback
  block: do not check bdrv_file_open
  block: make assertion more generic
  meson: remove dead optimization option
  meson: allow configuring the x86-64 baseline
  Revert "host/i386: assume presence of SSE2"
  Revert "host/i386: assume presence of SSSE3"
  Revert "host/i386: assume presence of POPCNT"
  target/i386: remove gen_ext_tl
  target/i386: assert that cc_op* and pc_save are preserved
  target/i386: list instructions still in translate.c
  target/i386: do not check PREFIX_LOCK in old-style decoder
  target/i386: convert CMPXCHG8B/CMPXCHG16B to new decoder
  target/i386: decode address before going back to translate.c
  target/i386: try not to force EFLAGS computation for CC_OP_ADOX/ADCX
  target/i386: convert bit test instructions to new decoder
  target/i386: give CC_OP_POPCNT low bits corresponding to MO_TL
  ...

Signed-off-by: Richard Henderson <[email protected]>


Compare: https://github.com/qemu/qemu/compare/c9ba79baca7c...a6981005288c

To unsubscribe from these emails, change your notification settings at 
https://github.com/qemu/qemu/settings/notifications

Reply via email to