Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 64678fc45d8f6c0c8d3adff41e0080aa7af15549
https://github.com/qemu/qemu/commit/64678fc45d8f6c0c8d3adff41e0080aa7af15549
Author: Richard Henderson <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M target/arm/tcg/helper-a64.c
M target/arm/tcg/helper-a64.h
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate.h
Log Message:
-----------
target/arm: Fix BTI versus CF_PCREL
With pcrel, we cannot check the guarded page bit at translation
time, as different mappings of the same physical page may or may
not have the GP bit set.
Instead, add a couple of helpers to check the page at runtime,
after all other filters that might obviate the need for the check.
The set_btype_for_br call must be moved after the gen_a64_set_pc
call to ensure the current pc can still be computed.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 05548400327db52d8f98eb033002fd2baadc3706
https://github.com/qemu/qemu/commit/05548400327db52d8f98eb033002fd2baadc3706
Author: Peter Maydell <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M include/qapi/qmp/qobject.h
M include/qemu/atomic.h
M include/qemu/compiler.h
M include/qemu/osdep.h
Log Message:
-----------
include: Fix typo in name of MAKE_IDENTFIER macro
In commit bb71846325e23 we added some macro magic to avoid
variable-shadowing when using some of our more complicated
macros. One of the internal components of this is a macro
named MAKE_IDENTFIER. Fix the typo in its name: it should
be MAKE_IDENTIFIER.
Commit created with
sed -i -e 's/MAKE_IDENTFIER/MAKE_IDENTIFIER/g' include/qemu/*.h
include/qapi/qmp/qobject.h
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Markus Armbruster <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: 9ca6876dc0befcc07b1c609dd96fa719feb7a318
https://github.com/qemu/qemu/commit/9ca6876dc0befcc07b1c609dd96fa719feb7a318
Author: Peter Maydell <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M MAINTAINERS
M docs/specs/index.rst
A docs/specs/rocker.rst
R docs/specs/rocker.txt
Log Message:
-----------
docs/specs/rocker.txt: Convert to rST
Convert the rocker.txt specification document to rST format. We make
extensive use of the :: marker to introduce a literal block for all
the tables and ASCII art, rather than trying to convert the tables to
rST table syntax. This produces a valid rST document without needing
a huge diff.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: 8dac93a8ee78631ee69ff8f6e6203fa2d741e378
https://github.com/qemu/qemu/commit/8dac93a8ee78631ee69ff8f6e6203fa2d741e378
Author: Peter Maydell <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M MAINTAINERS
M docs/interop/index.rst
A docs/interop/nbd.rst
R docs/interop/nbd.txt
Log Message:
-----------
docs/interop/nbd.txt: Convert to rST
Convert nbd.txt to rST format.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Eric Blake <[email protected]>
Message-id: [email protected]
Commit: 1bc0fc0a0b2a25b10008b0dc870ca87e2a090006
https://github.com/qemu/qemu/commit/1bc0fc0a0b2a25b10008b0dc870ca87e2a090006
Author: Peter Maydell <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M MAINTAINERS
M docs/interop/index.rst
A docs/interop/parallels.rst
R docs/interop/parallels.txt
Log Message:
-----------
docs/interop/parallels.txt: Convert to rST
Convert parallels.txt to rST format.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Eric Blake <[email protected]>
Message-id: [email protected]
Commit: 7d9fc7e74d8062e99c51b6b1a71393dcb5266cef
https://github.com/qemu/qemu/commit/7d9fc7e74d8062e99c51b6b1a71393dcb5266cef
Author: Peter Maydell <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M MAINTAINERS
M docs/interop/index.rst
A docs/interop/prl-xml.rst
R docs/interop/prl-xml.txt
Log Message:
-----------
docs/interop/prl-xml.txt: Convert to rST
Convert prl-xml.txt to rST format.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Eric Blake <[email protected]>
Message-id: [email protected]
Commit: 09334420d281777d6b7af8509942f0f604525fc2
https://github.com/qemu/qemu/commit/09334420d281777d6b7af8509942f0f604525fc2
Author: Peter Maydell <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M docs/interop/prl-xml.rst
Log Message:
-----------
docs/interop/prl-xml.rst: Fix minor grammar nits
Fix some minor grammar nits in the prl-xml documentation.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Eric Blake <[email protected]>
Message-id: [email protected]
Commit: a8e1ea4c97a010349acbe22f099f0c6d6f2db470
https://github.com/qemu/qemu/commit/a8e1ea4c97a010349acbe22f099f0c6d6f2db470
Author: Eric Blake <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M docs/interop/live-block-operations.rst
Log Message:
-----------
docs: Typo fix in live disk backup
Add in the missing space in the section header.
Fixes: 1084159b31 ("qapi: deprecate drive-backup", v6.2.0)
Signed-off-by: Eric Blake <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: bab3bc37aa47346bc4ab0aa36c5ff7ad5704b917
https://github.com/qemu/qemu/commit/bab3bc37aa47346bc4ab0aa36c5ff7ad5704b917
Author: Alex Richardson <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M target/arm/helper.c
Log Message:
-----------
target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode
In the PMUv3, a new AArch32 64-bit (MCRR/MRRC) accessor for the
PMCCNTR was added. In QEMU we forgot to implement this, so only
provide the 32-bit accessor. Since we have a 64-bit PMCCNTR
sysreg for AArch64, adding the 64-bit AArch32 version is easy.
We add the PMCCNTR to the v8_cp_reginfo because PMUv3 was added
in the ARMv8 architecture. This is consistent with how we
handle the existing PMCCNTR support, where we always implement
it for all v7 CPUs. This is arguably something we should
clean up so it is gated on ARM_FEATURE_PMU and/or an ID
register check for the relevant PMU version, but we should
do that as its own tidyup rather than being inconsistent between
this PMCCNTR accessor and the others.
See
https://developer.arm.com/documentation/ddi0601/2024-06/AArch32-Registers/PMCCNTR--Performance-Monitors-Cycle-Count-Register?lang=en
Signed-off-by: Alex Richardson <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 2635ab1ff0877d1c39a43aa722a3d181b0e3150f
https://github.com/qemu/qemu/commit/2635ab1ff0877d1c39a43aa722a3d181b0e3150f
Author: Jianzhou Yue <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M hw/core/ptimer.c
M tests/unit/ptimer-test.c
Log Message:
-----------
hw/core/ptimer: fix timer zero period condition for freq > 1GHz
The real period is zero when both period and period_frac are zero.
Check the method ptimer_set_freq, if freq is larger than 1000 MHz,
the period is zero, but the period_frac is not, in this case, the
ptimer will work but the current code incorrectly recognizes that
the ptimer is disabled.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2306
Signed-off-by: JianZhou Yue <[email protected]>
Message-id: 3da024aea8b57545af1b3caa37077d0fb75e8...@shasxm03.verisilicon.com
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 77100e100d76a568800e19ee20c7e9255053b84a
https://github.com/qemu/qemu/commit/77100e100d76a568800e19ee20c7e9255053b84a
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2024-08-09 (Fri, 09 Aug 2024)
Changed paths:
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M include/hw/arm/virt.h
Log Message:
-----------
arm/virt: place power button pin number on a define
Having magic numbers inside the code is not a good idea, as it
is error-prone. So, instead, create a macro with the number
definition.
Link:
https://lore.kernel.org/qemu-devel/CAFEAcA-PYnZ-32MRX+PgvzhnoAV80zBKMYg61j2f=ohagfw...@mail.gmail.com/
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Message-id:
ef0e7f5fca6cd94eda415ecee670c3028c671b74.1723121692.git.mchehab+hua...@kernel.org
Suggested-by: Peter Maydell <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 11fa5670c6d5451e408ecb1bf918d98000f8a7e2
https://github.com/qemu/qemu/commit/11fa5670c6d5451e408ecb1bf918d98000f8a7e2
Author: Richard Henderson <[email protected]>
Date: 2024-08-10 (Sat, 10 Aug 2024)
Changed paths:
M MAINTAINERS
M docs/interop/index.rst
M docs/interop/live-block-operations.rst
A docs/interop/nbd.rst
R docs/interop/nbd.txt
A docs/interop/parallels.rst
R docs/interop/parallels.txt
A docs/interop/prl-xml.rst
R docs/interop/prl-xml.txt
M docs/specs/index.rst
A docs/specs/rocker.rst
R docs/specs/rocker.txt
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M hw/core/ptimer.c
M include/hw/arm/virt.h
M include/qapi/qmp/qobject.h
M include/qemu/atomic.h
M include/qemu/compiler.h
M include/qemu/osdep.h
M target/arm/helper.c
M target/arm/tcg/helper-a64.c
M target/arm/tcg/helper-a64.h
M target/arm/tcg/translate-a64.c
M target/arm/tcg/translate.h
M tests/unit/ptimer-test.c
Log Message:
-----------
Merge tag 'pull-target-arm-20240809' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* Fix BTI versus CF_PCREL
* include: Fix typo in name of MAKE_IDENTFIER macro
* docs: Various txt-to-rST conversions
* add support for PMUv3 64-bit PMCCNTR in AArch32 mode
* hw/core/ptimer: fix timer zero period condition for freq > 1GHz
* arm/virt: place power button pin number on a define
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# gpg: Signature made Sat 10 Aug 2024 04:06:14 AM AEST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "[email protected]"
# gpg: Good signature from "Peter Maydell <[email protected]>" [full]
# gpg: aka "Peter Maydell <[email protected]>" [full]
# gpg: aka "Peter Maydell <[email protected]>"
[full]
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* tag 'pull-target-arm-20240809' of
https://git.linaro.org/people/pmaydell/qemu-arm:
arm/virt: place power button pin number on a define
hw/core/ptimer: fix timer zero period condition for freq > 1GHz
target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode
docs: Typo fix in live disk backup
docs/interop/prl-xml.rst: Fix minor grammar nits
docs/interop/prl-xml.txt: Convert to rST
docs/interop/parallels.txt: Convert to rST
docs/interop/nbd.txt: Convert to rST
docs/specs/rocker.txt: Convert to rST
include: Fix typo in name of MAKE_IDENTFIER macro
target/arm: Fix BTI versus CF_PCREL
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/0f397dcfecc9...11fa5670c6d5
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