Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: ab1cb3683bd0462695a75aa9a8c1d07731caf304
https://github.com/qemu/qemu/commit/ab1cb3683bd0462695a75aa9a8c1d07731caf304
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M crypto/tlssession.c
M include/crypto/tlssession.h
Log Message:
-----------
crypto: Allow gracefully ending the TLS session
QEMU's TLS session code provides no way to call gnutls_bye() to
terminate a TLS session. Callers of qcrypto_tls_session_read() can
choose to ignore a GNUTLS_E_PREMATURE_TERMINATION error by setting the
gracefulTermination argument.
The QIOChannelTLS ignores the premature termination error whenever
shutdown() has already been issued. This was found to be not enough for
the migration code because shutdown() might not have been issued before
the connection is terminated.
Add support for calling gnutls_bye() in the tlssession layer so users
of QIOChannelTLS can clearly identify the end of a TLS session.
Reviewed-by: Daniel P. Berrangé <[email protected]>
Acked-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 30ee88622edfa962154222b4a674361488ed823b
https://github.com/qemu/qemu/commit/30ee88622edfa962154222b4a674361488ed823b
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M include/io/channel-tls.h
M io/channel-tls.c
M io/trace-events
Log Message:
-----------
io: tls: Add qio_channel_tls_bye
Add a task dispatcher for gnutls_bye similar to the
qio_channel_tls_handshake_task(). The gnutls_bye() call might be
interrupted and so it needs to be rescheduled.
The migration code will make use of this to help the migration
destination identify a premature EOF. Once the session termination is
in place, any EOF that happens before the source issued gnutls_bye()
will be considered an error.
Reviewed-by: Daniel P. Berrangé <[email protected]>
Acked-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 0b8a70d70f65fbcf3ad62c975a64a356779095a9
https://github.com/qemu/qemu/commit/0b8a70d70f65fbcf3ad62c975a64a356779095a9
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M crypto/tlssession.c
M include/crypto/tlssession.h
M io/channel-tls.c
M tests/unit/test-crypto-tlssession.c
Log Message:
-----------
crypto: Remove qcrypto_tls_session_get_handshake_status
The correct way of calling qcrypto_tls_session_handshake() requires
calling qcrypto_tls_session_get_handshake_status() right after it so
there's no reason to have a separate method.
Refactor qcrypto_tls_session_handshake() to inform the status in its
own return value and alter the callers accordingly.
No functional change.
Suggested-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Acked-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: a25b013019672ab456ef8b51912eadcdda418b73
https://github.com/qemu/qemu/commit/a25b013019672ab456ef8b51912eadcdda418b73
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M hw/remote/mpqemu-link.c
M include/io/channel.h
M io/channel.c
Log Message:
-----------
io: Add flags argument to qio_channel_readv_full_all_eof
We want to pass flags into qio_channel_tls_readv() but
qio_channel_readv_full_all_eof() doesn't take a flags argument.
No functional change.
Reviewed-by: Daniel P. Berrangé <[email protected]>
Acked-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 322d873b634dc515220f154e29626a33f528bbfb
https://github.com/qemu/qemu/commit/322d873b634dc515220f154e29626a33f528bbfb
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M include/io/channel.h
M io/channel-tls.c
Log Message:
-----------
io: Add a read flag for relaxed EOF
Add a read flag that can inform a channel that it's ok to receive an
EOF at any moment. Channels that have some form of strict EOF
tracking, such as TLS session termination, may choose to ignore EOF
errors with the use of this flag.
This is being added for compatibility with older migration streams
that do not include a TLS termination step.
Reviewed-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 48796f6b44df1dd0f78d18757889d5ac478c33e4
https://github.com/qemu/qemu/commit/48796f6b44df1dd0f78d18757889d5ac478c33e4
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/multifd.c
M migration/tls.c
M migration/tls.h
Log Message:
-----------
migration/multifd: Terminate the TLS connection
The multifd recv side has been getting a TLS error of
GNUTLS_E_PREMATURE_TERMINATION at the end of migration when the send
side closes the sockets without ending the TLS session. This has been
masked by the code not checking the migration error after loadvm.
Start ending the TLS session at multifd_send_shutdown() so the recv
side always sees a clean termination (EOF) and we can start to
differentiate that from an actual premature termination that might
possibly happen in the middle of the migration.
There's nothing to be done if a previous migration error has already
broken the connection, so add a comment explaining it and ignore any
errors coming from gnutls_bye().
This doesn't break compat with older recv-side QEMUs because EOF has
always caused the recv thread to exit cleanly.
Reviewed-by: Peter Xu <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 9b3b192f65b1cf635719a2981dd2d4b70892d2ec
https://github.com/qemu/qemu/commit/9b3b192f65b1cf635719a2981dd2d4b70892d2ec
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M hw/core/machine.c
M migration/migration.h
M migration/multifd.c
M migration/multifd.h
M migration/options.c
Log Message:
-----------
migration/multifd: Add a compat property for TLS termination
We're currently changing the way the source multifd migration handles
the shutdown of the multifd channels when TLS is in use to perform a
clean termination by calling gnutls_bye().
Older src QEMUs will always close the channel without terminating the
TLS session. New dst QEMUs treat an unclean termination as an error.
Add multifd_clean_tls_termination (default true) that can be switched
on the destination whenever a src QEMU <= 9.2 is in use.
(Note that the compat property is only strictly necessary for src
QEMUs older than 9.1. Due to synchronization coincidences, src QEMUs
9.1 and 9.2 can put the destination in a condition where it doesn't
see the unclean termination. Still, make the property more inclusive
to facilitate potential backports.)
Reviewed-by: Peter Xu <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: e0ad300fe1a0e0b12b90994bab6e4df77dd1ee8a
https://github.com/qemu/qemu/commit/e0ad300fe1a0e0b12b90994bab6e4df77dd1ee8a
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/savevm.c
Log Message:
-----------
migration: Check migration error after loadvm
We're currently only checking the QEMUFile error after
qemu_loadvm_state(). This was causing a TLS termination error from
multifd recv threads to be ignored.
Start checking the migration error as well to avoid missing further
errors.
Regarding compatibility concerning the TLS termination error that was
being ignored, for QEMUs <= 9.2 - if the old QEMU is being used as
migration source - the recently added migration property
multifd-tls-clean-termination needs to be set to OFF in the
*destination* machine.
Reviewed-by: Peter Xu <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: a47f0cfba8d33f7001bcc4616f96e42dbd553135
https://github.com/qemu/qemu/commit/a47f0cfba8d33f7001bcc4616f96e42dbd553135
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/migration.c
M migration/migration.h
M migration/ram.c
Log Message:
-----------
migration: Set migration error outside of migrate_cancel
There's no point passing the error into migration cancel only for it
to call migrate_set_error().
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 8444d0938112b7da8d88cc6a7481b9eb33654997
https://github.com/qemu/qemu/commit/8444d0938112b7da8d88cc6a7481b9eb33654997
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/migration.c
M migration/trace-events
Log Message:
-----------
migration: Unify migration_cancel and migrate_fd_cancel
There's no need for two separate functions and this _fd_ is a historic
artifact that makes little sense nowadays.
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 4bbadfc55e6ec608df75911b4360e6e995daa28c
https://github.com/qemu/qemu/commit/4bbadfc55e6ec608df75911b4360e6e995daa28c
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/channel.c
M migration/migration.c
M migration/migration.h
M migration/multifd.c
M migration/rdma.c
M migration/trace-events
Log Message:
-----------
migration: Change migrate_fd_ to migration_
Remove all instances of _fd_ from the migration generic code. These
functions have grown over time and the _fd_ part is now just
confusing.
migration_fd_error() -> migration_error() makes it a little
vague. Since it's only used for migration_connect() failures, change
it to migration_connect_set_error().
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 2b667a8c0f7ad423c9141b3a487898c50a6ff5e0
https://github.com/qemu/qemu/commit/2b667a8c0f7ad423c9141b3a487898c50a6ff5e0
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/channel.c
Log Message:
-----------
migration: Fix hang after error in destination setup phase
If the destination side fails at migration_ioc_process_incoming()
before starting the coroutine, it will report the error but QEMU will
not exit.
Set the migration state to FAILED and exit the process if
exit-on-error allows.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2633
Reported-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 646119088f8a1d9925239e70b0a7b426bfb6e58a
https://github.com/qemu/qemu/commit/646119088f8a1d9925239e70b0a7b426bfb6e58a
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/migration.c
Log Message:
-----------
migration: Reject qmp_migrate_cancel after postcopy
After postcopy has started, it's not possible to recover the source
machine in case a migration error occurs because the destination has
already been changing the state of the machine. For that same reason,
it doesn't make sense to try to cancel the migration after postcopy
has started. Reject the cancel command during postcopy.
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 4a228bcc994ea8ab05d4927e23e7916f32cc1168
https://github.com/qemu/qemu/commit/4a228bcc994ea8ab05d4927e23e7916f32cc1168
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/migration.c
Log Message:
-----------
migration: Don't set FAILED state when cancelling
The expected outcome from qmp_migrate_cancel() is that the source
migration goes to the terminal state
MIGRATION_STATUS_CANCELLED. Anything different from this is a bug when
cancelling.
Make sure there is never a state transition from an unspecified state
into FAILED. Code that sets FAILED, should always either make sure
that the old state is not CANCELLING or specify the old state.
Note that the destination is allowed to go into FAILED, so there's no
issue there.
(I don't think this is relevant as a backport because cancelling does
work, it just doesn't show the right state at the end)
Fixes: 3dde8fdbad ("migration: Merge precopy/postcopy on switchover start")
Fixes: d0edb8a173 ("migration: Create the postcopy preempt channel
asynchronously")
Fixes: 8518278a6a ("migration: implementation of background snapshot thread")
Fixes: bf78a046b9 ("migration: refactor migrate_fd_connect failures")
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: aabb2a5b5d54acde0992d933b647a306e59362b4
https://github.com/qemu/qemu/commit/aabb2a5b5d54acde0992d933b647a306e59362b4
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M tests/qtest/migration/migration-util.c
M tests/qtest/migration/migration-util.h
Log Message:
-----------
tests/qtest/migration: Introduce migration_test_add_suffix
Introduce a new migration_test_add_suffix to allow programmatic
creation of tests based on a suffix. Pass the test name into the test
so it can know which variant to run.
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 538e03d28001a325a93154df2313d215721b2241
https://github.com/qemu/qemu/commit/538e03d28001a325a93154df2313d215721b2241
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M tests/qtest/migration/precopy-tests.c
Log Message:
-----------
tests/qtest/migration: Add a cancel test
The qmp_migrate_cancel() command is poorly tested and code inspection
reveals that there might be concurrency issues with its usage. Add a
test that runs a migration and calls qmp_migrate_cancel() at specific
moments.
In order to make the test more deterministic, instead of calling
qmp_migrate_cancel() at random moments during migration, do it after
the migration status change events are seen.
The expected result is that qmp_migrate_cancel() on the source ends
migration on the source with the "cancelled" state and ends migration
on the destination with the "failed" state. The only exception is that
a failed migration should continue in the failed state.
Cancelling is not allowed during postcopy (no test is added for this
because it's a trivial check in the code).
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 24f4c80cfc31ab4ed4cb6553c9289e3cf8ca63ac
https://github.com/qemu/qemu/commit/24f4c80cfc31ab4ed4cb6553c9289e3cf8ca63ac
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M qapi/migration.json
Log Message:
-----------
migration: Update migrate_cancel documentation
Update the migrate_cancel command documentation with a few words about
postcopy and the expected state of the machine after migration.
Acked-by: Markus Armbruster <[email protected]>
Reviewed-by: Peter Xu <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: b451705e3b90e55c6070338fa97aaae274721a5c
https://github.com/qemu/qemu/commit/b451705e3b90e55c6070338fa97aaae274721a5c
Author: Steve Sistare <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M migration/cpr.c
Log Message:
-----------
migration: use parameters.mode in cpr_state_save
qmp_migrate guarantees that cpr_channel is not null for
MIG_MODE_CPR_TRANSFER when cpr_state_save is called:
qmp_migrate()
if (s->parameters.mode == MIG_MODE_CPR_TRANSFER && !cpr_channel) {
return;
}
cpr_state_save(cpr_channel)
but cpr_state_save checks for mode differently before using channel,
and Coverity cannot infer that they are equivalent in outgoing QEMU,
and warns that channel may be NULL:
cpr_state_save(channel)
MigMode mode = migrate_mode();
if (mode == MIG_MODE_CPR_TRANSFER) {
f = cpr_transfer_output(channel, errp);
To make Coverity happy, assert that channel != NULL in cpr_state_save.
Resolves: Coverity CID 1590980
Reported-by: Peter Maydell <[email protected]>
Signed-off-by: Steve Sistare <[email protected]>
Message-ID: <[email protected]>
[assert instead of using parameters.mode in cpr_state_save]
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 32a1bb21c6f4d569427099e4e495f1d07d017fdb
https://github.com/qemu/qemu/commit/32a1bb21c6f4d569427099e4e495f1d07d017fdb
Author: Hyman Huang <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M tests/migration-stress/guestperf/engine.py
Log Message:
-----------
guestperf: Support deferred migration for multifd
The way to enable multifd migration has been changed by commit,
82137e6c8c (migration: enforce multifd and postcopy preempt to
be set before incoming), and guestperf has not made the
necessary changes. If multifd migration had been enabled in the
previous manner, the following error would have occurred:
Multifd must be set before incoming starts
Supporting deferred migration will fix it.
Signed-off-by: Hyman Huang <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-ID:
<8874e170f890ce0bc6f25cb0d9b9ae307ce2e070.1739530098.git.yong.hu...@smartx.com>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 42f5975cd84eed96661468ae0b895eed0e16074b
https://github.com/qemu/qemu/commit/42f5975cd84eed96661468ae0b895eed0e16074b
Author: Hyman Huang <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M tests/migration-stress/guestperf/comparison.py
Log Message:
-----------
guestperf: Nitpick the inconsistent parameters
Signed-off-by: Hyman Huang <[email protected]>
Reviewed-by: Fabiano Rosas <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-ID:
<c8e3768c0d21b47456ad80376ddee63122d60cf7.1739530098.git.yong.hu...@smartx.com>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 45f34156e4d9c3f4215402b34d7da32f00073066
https://github.com/qemu/qemu/commit/45f34156e4d9c3f4215402b34d7da32f00073066
Author: Hyman Huang <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M tests/migration-stress/guestperf/comparison.py
M tests/migration-stress/guestperf/engine.py
M tests/migration-stress/guestperf/scenario.py
M tests/migration-stress/guestperf/shell.py
Log Message:
-----------
guestperf: Introduce multifd compression option
Guestperf tool does not cover the multifd compression option
currently, it is worth supporting so that developers can
analysis the migration performance with different
compression algorithms.
Multifd support 4 compression algorithms currently:
zlib, zstd, qpl, uadk
To request that multifd with the specified compression
algorithm such as zlib:
$ ./tests/migration-stress/guestperf.py \
--multifd --multifd-channels 4 --multifd-compression zlib \
--output output.json
To run the entire standardized set of multifd compression
comparisons, with unix migration:
$ ./tests/migration-stress/guestperf-batch.py \
--dst-host localhost --transport unix \
--filter compr-multifd-compression* --output outputdir
Signed-off-by: Hyman Huang <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-ID:
<c0e3313d81e8130f8119ef4f242e4625886278cf.1739530098.git.yong.hu...@smartx.com>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 5984870e02aa6cf471bc9225ae91640b544b31c8
https://github.com/qemu/qemu/commit/5984870e02aa6cf471bc9225ae91640b544b31c8
Author: Hyman Huang <[email protected]>
Date: 2025-02-14 (Fri, 14 Feb 2025)
Changed paths:
M tests/migration-stress/guestperf/engine.py
M tests/migration-stress/guestperf/report.py
Log Message:
-----------
guestperf: Add test result data into report
The migration result data is not included in the guestperf
report information; include the result as a report entry
so the developer can check whether the migration was successful
after running guestperf.
Signed-off-by: Hyman Huang <[email protected]>
Message-ID:
<6303400c2983ffe5647f07caa6406f00ceae4581.1739530098.git.yong.hu...@smartx.com>
Signed-off-by: Fabiano Rosas <[email protected]>
Commit: 0ce30d9bd4c000664297d2854ff66323306b8209
https://github.com/qemu/qemu/commit/0ce30d9bd4c000664297d2854ff66323306b8209
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/tcg.c
M tcg/tci/tcg-target.h
Log Message:
-----------
tcg: Remove last traces of TCG_TARGET_NEED_POOL_LABELS
These should have been removed with the rest. There are
a couple of hosts which can emit guest_base into the
constant pool: aarch64, mips64, ppc64, riscv64.
Fixes: a417ef835058 ("tcg: Remove TCG_TARGET_NEED_LDST_LABELS and
TCG_TARGET_NEED_POOL_LABELS")
Signed-off-by: Richard Henderson <[email protected]>
Commit: e014ae3184229508dabc8531df89ac073b02c102
https://github.com/qemu/qemu/commit/e014ae3184229508dabc8531df89ac073b02c102
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/tcg-all.c
M docs/devel/multi-thread-tcg.rst
M include/qemu/atomic.h
R include/tcg/oversized-guest.h
M target/arm/ptw.c
M target/riscv/cpu_helper.c
Log Message:
-----------
tcg: Remove TCG_OVERSIZED_GUEST
This is now prohibited in configuration.
Reviewed-by: Alex Bennée <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: c43d3194854f7d55351eff047a0fde98a1bd3e4d
https://github.com/qemu/qemu/commit/c43d3194854f7d55351eff047a0fde98a1bd3e4d
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/tcg-op-ldst.c
M tcg/tcg.c
Log Message:
-----------
tcg: Drop support for two address registers in gen_ldst
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 0308bb1ab2a336393b3dd85587bf88ec6499c975
https://github.com/qemu/qemu/commit/0308bb1ab2a336393b3dd85587bf88ec6499c975
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M include/tcg/tcg-opc.h
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/optimize.c
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg-op-ldst.c
M tcg/tcg.c
M tcg/tci.c
M tcg/tci/tcg-target.c.inc
Log Message:
-----------
tcg: Merge INDEX_op_qemu_*_{a32,a64}_*
Since 64-on-32 is now unsupported, guest addresses always
fit in one host register. Drop the replication of opcodes.
Signed-off-by: Richard Henderson <[email protected]>
Commit: 0749986c16c91799db2c932954145572ba4e8ded
https://github.com/qemu/qemu/commit/0749986c16c91799db2c932954145572ba4e8ded
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/arm/tcg-target.c.inc
Log Message:
-----------
tcg/arm: Drop addrhi from prepare_host_addr
The guest address will now always be TCG_TYPE_I32.
Signed-off-by: Richard Henderson <[email protected]>
Commit: 9802ec5e7673ac084df9b4625f5e648b6b8997f7
https://github.com/qemu/qemu/commit/9802ec5e7673ac084df9b4625f5e648b6b8997f7
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/i386/tcg-target.c.inc
Log Message:
-----------
tcg/i386: Drop addrhi from prepare_host_addr
The guest address will now always fit in one register.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 15fc6a3718ece5e013a8fec8f73b3dd4723ef43e
https://github.com/qemu/qemu/commit/15fc6a3718ece5e013a8fec8f73b3dd4723ef43e
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/mips/tcg-target.c.inc
Log Message:
-----------
tcg/mips: Drop addrhi from prepare_host_addr
The guest address will now always fit in one register.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 278f9e2dd7d3b9c85de2f66be4f6dfd79712868f
https://github.com/qemu/qemu/commit/278f9e2dd7d3b9c85de2f66be4f6dfd79712868f
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
tcg/ppc: Drop addrhi from prepare_host_addr
The guest address will now always fit in one register.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: c30fc5364b2692d1097a88bad26bb1392da4429d
https://github.com/qemu/qemu/commit/c30fc5364b2692d1097a88bad26bb1392da4429d
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg.c
Log Message:
-----------
tcg: Replace addr{lo,hi}_reg with addr_reg in TCGLabelQemuLdst
There is now always only one guest address register.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: d8d74e042618d21f2089a4cb0e3a9ce475eb7c8a
https://github.com/qemu/qemu/commit/d8d74e042618d21f2089a4cb0e3a9ce475eb7c8a
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M plugins/api.c
Log Message:
-----------
plugins: Fix qemu_plugin_read_memory_vaddr parameters
The declaration uses uint64_t for addr.
Fixes: 595cd9ce2ec ("plugins: add plugin API to read guest memory")
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 0865af7439da0590ebfa0372c66c695617cd1160
https://github.com/qemu/qemu/commit/0865af7439da0590ebfa0372c66c695617cd1160
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M accel/tcg/cputlb.c
Log Message:
-----------
accel/tcg: Fix tlb_set_page_with_attrs, tlb_set_page
The declarations use vaddr for size.
Signed-off-by: Richard Henderson <[email protected]>
Commit: f21b9c0ba04fe4dfba78a214055846c44f29dba6
https://github.com/qemu/qemu/commit/f21b9c0ba04fe4dfba78a214055846c44f29dba6
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M include/exec/vaddr.h
Log Message:
-----------
include/exec: Change vaddr to uintptr_t
Since we no longer support 64-bit guests on 32-bit hosts,
we can use a 32-bit type on a 32-bit host.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 97800d760dbf8de6047c1ed07514458eb6e8cb9d
https://github.com/qemu/qemu/commit/97800d760dbf8de6047c1ed07514458eb6e8cb9d
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M accel/tcg/cputlb.c
M include/exec/tlb-common.h
M tcg/arm/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/ppc/tcg-target.c.inc
Log Message:
-----------
include/exec: Use uintptr_t in CPUTLBEntry
Since we no longer support 64-bit guests on 32-bit hosts,
we can use a 32-bit type on a 32-bit host. This shrinks
the size of the structure to 16 bytes on a 32-bit host.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: eb04813e0ba5bd3c91858a1a1b156b555e52fa3d
https://github.com/qemu/qemu/commit/eb04813e0ba5bd3c91858a1a1b156b555e52fa3d
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M docs/devel/tcg-ops.rst
M include/tcg/tcg.h
M tcg/aarch64/tcg-target.h
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target.h
M tcg/riscv/tcg-target.h
M tcg/sparc64/tcg-target.h
M tcg/tcg.c
Log Message:
-----------
tcg: Introduce the 'z' constraint for a hardware zero register
For loongarch, mips, riscv and sparc, a zero register is
available all the time. For aarch64, register index 31
depends on context: sometimes it is the stack pointer,
and sometimes it is the zero register.
Introduce a new general-purpose constraint which maps 0
to TCG_REG_ZERO, if defined. This differs from existing
constant constraints in that const_arg[*] is recorded as
false, indicating that the value is in a register.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 617d1bc762828f90b887566c9872437e2da4bb64
https://github.com/qemu/qemu/commit/617d1bc762828f90b887566c9872437e2da4bb64
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/aarch64/tcg-target-con-set.h
M tcg/aarch64/tcg-target.c.inc
Log Message:
-----------
tcg/aarch64: Use 'z' constraint
Note that 'Z' is still used for addsub2.
Signed-off-by: Richard Henderson <[email protected]>
Commit: f1382a7f3c84dbe0f17270220c32b750d56c3a8d
https://github.com/qemu/qemu/commit/f1382a7f3c84dbe0f17270220c32b750d56c3a8d
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target-con-str.h
M tcg/loongarch64/tcg-target.c.inc
Log Message:
-----------
tcg/loongarch64: Use 'z' constraint
Replace target-specific 'Z' with generic 'z'.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 1e554fd50edd9ce984947f56166f6f901110877b
https://github.com/qemu/qemu/commit/1e554fd50edd9ce984947f56166f6f901110877b
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/mips/tcg-target-con-set.h
M tcg/mips/tcg-target-con-str.h
M tcg/mips/tcg-target.c.inc
Log Message:
-----------
tcg/mips: Use 'z' constraint
Replace target-specific 'Z' with generic 'z'.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: d7f861112ae3f961cd087fdd15a953f88f572301
https://github.com/qemu/qemu/commit/d7f861112ae3f961cd087fdd15a953f88f572301
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/riscv/tcg-target-con-set.h
M tcg/riscv/tcg-target-con-str.h
M tcg/riscv/tcg-target.c.inc
Log Message:
-----------
tcg/riscv: Use 'z' constraint
Replace target-specific 'Z' with generic 'z'.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 3331e55ce65193d73acdf5d013fa18160fde3ddc
https://github.com/qemu/qemu/commit/3331e55ce65193d73acdf5d013fa18160fde3ddc
Author: Richard Henderson <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M tcg/sparc64/tcg-target-con-set.h
M tcg/sparc64/tcg-target-con-str.h
M tcg/sparc64/tcg-target.c.inc
Log Message:
-----------
tcg/sparc64: Use 'z' constraint
Replace target-specific 'Z' with generic 'z'.
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Commit: 0b1cd0727410f830f2d4fefebd8955e81f2df9a2
https://github.com/qemu/qemu/commit/0b1cd0727410f830f2d4fefebd8955e81f2df9a2
Author: Fabiano Rosas <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M linux-user/elfload.c
Log Message:
-----------
elfload: Fix alignment when unmapping excess reservation
When complying with the alignment requested in the ELF and unmapping
the excess reservation, having align_end not aligned to the guest page
causes the unmap to be rejected by the alignment check at
target_munmap and later brk adjustments hit an EEXIST.
Fix by aligning the start of region to be unmapped.
Fixes: c81d1fafa6 ("linux-user: Honor elf alignment when placing images")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1913
Signed-off-by: Fabiano Rosas <[email protected]>
[rth: Align load_end as well.]
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>
Commit: b9c8393f2a60b59f0d5f296afa04fadce7224f48
https://github.com/qemu/qemu/commit/b9c8393f2a60b59f0d5f296afa04fadce7224f48
Author: Andreas Schwab <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M linux-user/aarch64/target_signal.h
M linux-user/arm/target_signal.h
M linux-user/generic/signal.h
M linux-user/i386/target_signal.h
M linux-user/m68k/target_signal.h
M linux-user/microblaze/target_signal.h
M linux-user/ppc/target_signal.h
M linux-user/s390x/target_signal.h
M linux-user/sh4/target_signal.h
M linux-user/x86_64/target_signal.h
M linux-user/xtensa/target_signal.h
Log Message:
-----------
linux-user: Move TARGET_SA_RESTORER out of generic/signal.h
SA_RESTORER and the associated sa_restorer field of struct sigaction are
an obsolete feature, not expected to be used by future architectures.
They are also absent on RISC-V, LoongArch, Hexagon and OpenRISC, but
defined due to their use of generic/signal.h. This leads to corrupted
data and out-of-bounds accesses.
Move the definition of TARGET_SA_RESTORER out of generic/signal.h into the
target_signal.h files that need it. Note that m68k has the sa_restorer
field, but does not use it and does not define SA_RESTORER.
Reported-by: Thomas Weißschuh <[email protected]>
Signed-off-by: Andreas Schwab <[email protected]>
Reviewed-by: Thomas Weißschuh <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>
Commit: c6f2c002cd1dcdef426a60b4aad3050d495f9d7b
https://github.com/qemu/qemu/commit/c6f2c002cd1dcdef426a60b4aad3050d495f9d7b
Author: Mikael Szreder <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M target/sparc/insns.decode
Log Message:
-----------
target/sparc: Fix register selection for all F*TOx and FxTO* instructions
A bug was introduced in commit 0bba7572d40d which causes the fdtox
and fqtox instructions to incorrectly select the destination registers.
More information and a test program can be found in issue #2802.
Fixes: 0bba7572d40d ("target/sparc: Perform DFPREG/QFPREG in decodetree")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2802
Signed-off-by: Mikael Szreder <[email protected]>
Acked-by: Artyom Tarasenko <[email protected]>
[rth: Squash patches together, since the second fixes a typo in the first.]
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>
Commit: 3bef966219ed0f9b28444353d77dd8559b1c5522
https://github.com/qemu/qemu/commit/3bef966219ed0f9b28444353d77dd8559b1c5522
Author: Mikael Szreder <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M target/sparc/gdbstub.c
Log Message:
-----------
target/sparc: Fix gdbstub incorrectly handling registers f32-f62
The gdbstub implementation for the Sparc architecture would
incorrectly calculate the the floating point register offset.
This resulted in, for example, registers f32 and f34 to point to
the same value.
The issue was caused by the confusion between even register numbers
and even register indexes. For example, the register index of f32 is 64
and f34 is 65.
Fixes: 30038fd81808 ("target-sparc: Change fpr representation to doubles.")
Signed-off-by: Mikael Szreder <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>
Commit: 2132751069134114814c7e1609e9cf644f077aad
https://github.com/qemu/qemu/commit/2132751069134114814c7e1609e9cf644f077aad
Author: Artyom Tarasenko <[email protected]>
Date: 2025-02-15 (Sat, 15 Feb 2025)
Changed paths:
M target/sparc/insns.decode
M target/sparc/translate.c
Log Message:
-----------
target/sparc: fake UltraSPARC T1 PCR and PIC registers
Fake access to
PCR Performance Control Register
and
PIC Performance Instrumentation Counter.
Ignore writes in privileged mode, and return 0 on reads.
This allows booting Tribblix, MilaX and v9os under Niagara target.
Signed-off-by: Artyom Tarasenko <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>
Commit: 1e0d4eb4ee7c909323bffc39bc348eb3174b426b
https://github.com/qemu/qemu/commit/1e0d4eb4ee7c909323bffc39bc348eb3174b426b
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M backends/tpm/tpm_util.c
Log Message:
-----------
backends/tpm: Use qemu_hexdump_line() to avoid sprintf()
sprintf() is deprecated on Darwin since macOS 13.0 / XCode 14.1.
Using qemu_hexdump_line() both fixes the deprecation warning and
simplifies the code base.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Stefan Berger <[email protected]>
[rth: Keep the linebreaks every 16 bytes]
Signed-off-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
[PMD: Rebased]
Commit: 7f2626dc24198700683d264c265a2d337fff980b
https://github.com/qemu/qemu/commit/7f2626dc24198700683d264c265a2d337fff980b
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/arm/xlnx-zynqmp.c
Log Message:
-----------
hw/arm/xlnx-zynqmp: Use &error_abort for programming errors
When a property value is static (not provided by QMP or CLI),
error shouldn't happen, otherwise it is a programming error.
Therefore simplify and use &error_abort as this can't fail.
Reported-by: Richard Henderson <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Anton Johansson <[email protected]>
Message-Id: <[email protected]>
Commit: 1e71a9b1147145c9904b2ce5350c5591d5badb23
https://github.com/qemu/qemu/commit/1e71a9b1147145c9904b2ce5350c5591d5badb23
Author: Phil Dennis-Jordan <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/intc/apic.c
Log Message:
-----------
hw/intc/apic: Fixes magic number use, removes outdated comment
This changes replaces the use of an explicit literal constant for
the APIC base address mask with the existing symbolic constant
intended for this purpose.
Additionally, we remove the comment about not being able to
re-enable the APIC after disabling it. This is no longer
the case after the APIC implementation's state machine was
modified in 9.0.
Signed-off-by: Phil Dennis-Jordan <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 0d2d00e57a55d3d8205923e60c2553d83d288ebb
https://github.com/qemu/qemu/commit/0d2d00e57a55d3d8205923e60c2553d83d288ebb
Author: Zhao Liu <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/core/machine-smp.c
Log Message:
-----------
hw/core/machine: Reject thread level cache
Currently, neither i386 nor ARM have real hardware support for per-
thread cache, and there is no clear demand for this specific cache
topology.
Additionally, since ARM even can't support this special cache topology
in device tree, it is unnecessary to support it at this moment, even
though per-thread cache might have potential scheduling benefits for
VMs without CPU affinity.
Therefore, disable thread-level cache topology in the general machine
part. At present, i386 has not enabled SMP cache, so disabling the
thread parameter does not pose compatibility issues.
In the future, if there is a clear demand for this feature, the correct
approach would be to add a new control field in MachineClass.smp_props
and enable it only for the machines that require it.
Signed-off-by: Zhao Liu <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: d4194e19cc202774251ae03a1658077fd954797f
https://github.com/qemu/qemu/commit/d4194e19cc202774251ae03a1658077fd954797f
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/core/sysbus.c
Log Message:
-----------
hw/sysbus: Use sizeof(BusState) in main_system_bus_create()
Rather than using the obscure system_bus_info.instance_size,
directly use sizeof(BusState).
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif<[email protected]>
Message-Id: <[email protected]>
Commit: 45683d1e7c622b1e9c0a41054847f519cd2aaa45
https://github.com/qemu/qemu/commit/45683d1e7c622b1e9c0a41054847f519cd2aaa45
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/core/sysbus.c
Log Message:
-----------
hw/sysbus: Declare QOM types using DEFINE_TYPES() macro
When multiple QOM types are registered in the same file,
it is simpler to use the the DEFINE_TYPES() macro. In
particular because type array declared with such macro
are easier to review.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Reviewed-by: Bernhard Beschow <[email protected]>
Message-Id: <[email protected]>
Commit: 47dfd350fbf80bdfc7dcc102974fad328bf3e993
https://github.com/qemu/qemu/commit/47dfd350fbf80bdfc7dcc102974fad328bf3e993
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/core/sysbus.c
M include/hw/sysbus.h
Log Message:
-----------
hw/sysbus: Introduce TYPE_DYNAMIC_SYS_BUS_DEVICE
Some TYPE_SYS_BUS_DEVICEs can be optionally dynamically
plugged on the TYPE_PLATFORM_BUS_DEVICE.
Rather than sometimes noting that with comment around
the 'user_creatable = true' line in each DeviceRealize
handler, introduce an abstract TYPE_DYNAMIC_SYS_BUS_DEVICE
class.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Message-Id: <[email protected]>
Commit: 341df541dce236ab8f68ac9a3a0d63897767215b
https://github.com/qemu/qemu/commit/341df541dce236ab8f68ac9a3a0d63897767215b
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/vfio/amd-xgbe.c
M hw/vfio/calxeda-xgmac.c
M hw/vfio/platform.c
Log Message:
-----------
hw/vfio: Have VFIO_PLATFORM devices inherit from DYNAMIC_SYS_BUS_DEVICE
Do not explain why VFIO_PLATFORM devices are user_creatable,
have them inherit TYPE_DYNAMIC_SYS_BUS_DEVICE, to make explicit
that they can optionally be plugged on TYPE_PLATFORM_BUS_DEVICE.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Message-Id: <[email protected]>
Commit: 8abda739f35373ba0525be4bf6df4f69e31241b5
https://github.com/qemu/qemu/commit/8abda739f35373ba0525be4bf6df4f69e31241b5
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/display/ramfb-standalone.c
Log Message:
-----------
hw/display: Have RAMFB device inherit from DYNAMIC_SYS_BUS_DEVICE
Because the RAM FB device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Message-Id: <[email protected]>
Commit: 1e2f32bf71cd93788aa71859d0145d9a56667310
https://github.com/qemu/qemu/commit/1e2f32bf71cd93788aa71859d0145d9a56667310
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/intel_iommu.c
M hw/i386/x86-iommu.c
Log Message:
-----------
hw/i386: Have X86_IOMMU devices inherit from DYNAMIC_SYS_BUS_DEVICE
Do not explain why _X86_IOMMU devices are user_creatable,
have them inherit TYPE_DYNAMIC_SYS_BUS_DEVICE, to explicit
they can optionally be plugged on TYPE_PLATFORM_BUS_DEVICE.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Message-Id: <[email protected]>
Commit: 4b2e34d9ef2d66811e7bc36a637a0701efc05d92
https://github.com/qemu/qemu/commit/4b2e34d9ef2d66811e7bc36a637a0701efc05d92
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/net/fsl_etsec/etsec.c
Log Message:
-----------
hw/net: Have eTSEC device inherit from DYNAMIC_SYS_BUS_DEVICE
Because the network eTSEC device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Tested-by: Bernhard Beschow <[email protected]>
Acked-by: Bernhard Beschow <[email protected]>
Message-Id: <[email protected]>
Commit: c10f4c744a7cac8be38158b0793ccf8d754cecd1
https://github.com/qemu/qemu/commit/c10f4c744a7cac8be38158b0793ccf8d754cecd1
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/tpm/tpm_tis_sysbus.c
Log Message:
-----------
hw/tpm: Have TPM TIS sysbus device inherit from DYNAMIC_SYS_BUS_DEVICE
Because the TPM TIS sysbus device can be optionally plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Reviewed-by: Stefan Berger <[email protected]>
Message-Id: <[email protected]>
Commit: 83f0f363e4a24b40142079ab1b328ed653f7d14b
https://github.com/qemu/qemu/commit/83f0f363e4a24b40142079ab1b328ed653f7d14b
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/usb/xen-usb.c
M hw/xen/xen-legacy-backend.c
M hw/xen/xen_pvdev.c
Log Message:
-----------
hw/xen: Prefer QOM cast for XenLegacyDevice
Makes the code less sensitive regarding changes in the class hierarchy which
will be performed in the next patch.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 250e797ceadad60ee7ebfdb92c76ba2057687597
https://github.com/qemu/qemu/commit/250e797ceadad60ee7ebfdb92c76ba2057687597
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/xen/xen-legacy-backend.c
M include/hw/xen/xen_pvdev.h
Log Message:
-----------
hw/xen: Have legacy Xen backend inherit from DYNAMIC_SYS_BUS_DEVICE
Because the legacy Xen backend devices can optionally be plugged on the
TYPE_PLATFORM_BUS_DEVICE, have it inherit TYPE_DYNAMIC_SYS_BUS_DEVICE.
Remove the implicit TYPE_XENSYSDEV instance_size.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Alexander Graf <[email protected]>
Tested-by: Bernhard Beschow <[email protected]>
Reviewed-by: Bernhard Beschow <[email protected]>
Message-Id: <[email protected]>
Commit: e3660f60dca85de599c913fda1d156f20495b45a
https://github.com/qemu/qemu/commit/e3660f60dca85de599c913fda1d156f20495b45a
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/arm/xilinx_zynq.c
M hw/core/null-machine.c
M hw/s390x/s390-virtio-ccw.c
M include/hw/boards.h
M system/vl.c
Log Message:
-----------
hw/boards: Convert no_sdcard flag to OnOffAuto tri-state
MachineClass::no_sdcard is initialized as false by default.
To catch all uses, convert it to a tri-state, having the
current default (false) becoming AUTO.
No logical change intended.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 8a2f1f921cc84cae3aa54c29e24e8c1defc9ef34
https://github.com/qemu/qemu/commit/8a2f1f921cc84cae3aa54c29e24e8c1defc9ef34
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/alpha/dp264.c
M hw/arm/aspeed.c
M hw/arm/b-l475e-iot01a.c
M hw/arm/bananapi_m2u.c
M hw/arm/collie.c
M hw/arm/cubieboard.c
M hw/arm/digic_boards.c
M hw/arm/exynos4_boards.c
M hw/arm/fby35.c
M hw/arm/highbank.c
M hw/arm/imx25_pdk.c
M hw/arm/integratorcp.c
M hw/arm/kzm.c
M hw/arm/mcimx6ul-evk.c
M hw/arm/mcimx7d-sabre.c
M hw/arm/microbit.c
M hw/arm/mps2-tz.c
M hw/arm/mps2.c
M hw/arm/mps3r.c
M hw/arm/msf2-som.c
M hw/arm/musca.c
M hw/arm/musicpal.c
M hw/arm/netduino2.c
M hw/arm/netduinoplus2.c
M hw/arm/npcm7xx_boards.c
M hw/arm/olimex-stm32-h405.c
M hw/arm/omap_sx1.c
M hw/arm/orangepi.c
M hw/arm/raspi.c
M hw/arm/raspi4b.c
M hw/arm/realview.c
M hw/arm/sabrelite.c
M hw/arm/sbsa-ref.c
M hw/arm/stellaris.c
M hw/arm/stm32vldiscovery.c
M hw/arm/versatilepb.c
M hw/arm/vexpress.c
M hw/arm/virt.c
M hw/arm/xen-pvh.c
M hw/arm/xlnx-versal-virt.c
M hw/arm/xlnx-zcu102.c
M hw/avr/arduino.c
M hw/hppa/machine.c
M hw/i386/pc.c
M hw/i386/x86.c
M hw/i386/xen/xen-pvh.c
M hw/loongarch/virt.c
M hw/m68k/an5206.c
M hw/m68k/mcf5208.c
M hw/m68k/next-cube.c
M hw/m68k/q800.c
M hw/m68k/virt.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/microblaze/xlnx-zynqmp-pmu.c
M hw/mips/boston.c
M hw/mips/fuloong2e.c
M hw/mips/jazz.c
M hw/mips/loongson3_virt.c
M hw/mips/malta.c
M hw/mips/mipssim.c
M hw/openrisc/openrisc_sim.c
M hw/openrisc/virt.c
M hw/ppc/amigaone.c
M hw/ppc/e500plat.c
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/mpc8544ds.c
M hw/ppc/pegasos2.c
M hw/ppc/pnv.c
M hw/ppc/ppc405_boards.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/prep.c
M hw/ppc/sam460ex.c
M hw/ppc/spapr.c
M hw/ppc/virtex_ml507.c
M hw/remote/machine.c
M hw/riscv/microchip_pfsoc.c
M hw/riscv/opentitan.c
M hw/riscv/shakti_c.c
M hw/riscv/sifive_e.c
M hw/riscv/sifive_u.c
M hw/riscv/spike.c
M hw/riscv/virt.c
M hw/rx/rx-gdbsim.c
M hw/sh4/r2d.c
M hw/sparc/leon3.c
M hw/sparc/sun4m.c
M hw/sparc64/niagara.c
M hw/sparc64/sun4u.c
M hw/tricore/triboard.c
M hw/tricore/tricore_testboard.c
M hw/xen/xen-pvh-common.c
M hw/xenpv/xen_machine_pv.c
M hw/xtensa/sim.c
M hw/xtensa/virt.c
M hw/xtensa/xtfpga.c
M system/vl.c
Log Message:
-----------
hw/boards: Explicit no_sdcard=false as ON_OFF_AUTO_OFF
Update MachineClass::no_sdcard default implicit AUTO
initialization to explicit OFF. This flag is consumed
in system/vl.c::qemu_disable_default_devices(). Use
this place to assert we don't have anymore AUTO state.
In hw/ppc/e500.c we add the ppce500_machine_class_init()
method to initialize once all the inherited classes.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: cdc8d7cadaac33ca103791a6ebb535a3ad9fa05f
https://github.com/qemu/qemu/commit/cdc8d7cadaac33ca103791a6ebb535a3ad9fa05f
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/alpha/dp264.c
M hw/arm/aspeed.c
M hw/arm/b-l475e-iot01a.c
M hw/arm/bananapi_m2u.c
M hw/arm/collie.c
M hw/arm/cubieboard.c
M hw/arm/digic_boards.c
M hw/arm/exynos4_boards.c
M hw/arm/fby35.c
M hw/arm/highbank.c
M hw/arm/imx25_pdk.c
M hw/arm/integratorcp.c
M hw/arm/kzm.c
M hw/arm/mcimx6ul-evk.c
M hw/arm/mcimx7d-sabre.c
M hw/arm/microbit.c
M hw/arm/mps2-tz.c
M hw/arm/mps2.c
M hw/arm/mps3r.c
M hw/arm/msf2-som.c
M hw/arm/musca.c
M hw/arm/musicpal.c
M hw/arm/netduino2.c
M hw/arm/netduinoplus2.c
M hw/arm/npcm7xx_boards.c
M hw/arm/olimex-stm32-h405.c
M hw/arm/omap_sx1.c
M hw/arm/orangepi.c
M hw/arm/raspi.c
M hw/arm/raspi4b.c
M hw/arm/realview.c
M hw/arm/sabrelite.c
M hw/arm/sbsa-ref.c
M hw/arm/stellaris.c
M hw/arm/stm32vldiscovery.c
M hw/arm/versatilepb.c
M hw/arm/vexpress.c
M hw/arm/virt.c
M hw/arm/xen-pvh.c
M hw/arm/xilinx_zynq.c
M hw/arm/xlnx-versal-virt.c
M hw/arm/xlnx-zcu102.c
M hw/avr/arduino.c
M hw/core/null-machine.c
M hw/hppa/machine.c
M hw/i386/pc.c
M hw/i386/x86.c
M hw/i386/xen/xen-pvh.c
M hw/loongarch/virt.c
M hw/m68k/an5206.c
M hw/m68k/mcf5208.c
M hw/m68k/next-cube.c
M hw/m68k/q800.c
M hw/m68k/virt.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/microblaze/xlnx-zynqmp-pmu.c
M hw/mips/boston.c
M hw/mips/fuloong2e.c
M hw/mips/jazz.c
M hw/mips/loongson3_virt.c
M hw/mips/malta.c
M hw/mips/mipssim.c
M hw/openrisc/openrisc_sim.c
M hw/openrisc/virt.c
M hw/ppc/amigaone.c
M hw/ppc/e500plat.c
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/mpc8544ds.c
M hw/ppc/pegasos2.c
M hw/ppc/pnv.c
M hw/ppc/ppc405_boards.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/prep.c
M hw/ppc/sam460ex.c
M hw/ppc/spapr.c
M hw/ppc/virtex_ml507.c
M hw/remote/machine.c
M hw/riscv/microchip_pfsoc.c
M hw/riscv/opentitan.c
M hw/riscv/shakti_c.c
M hw/riscv/sifive_e.c
M hw/riscv/sifive_u.c
M hw/riscv/spike.c
M hw/riscv/virt.c
M hw/rx/rx-gdbsim.c
M hw/s390x/s390-virtio-ccw.c
M hw/sh4/r2d.c
M hw/sparc/leon3.c
M hw/sparc/sun4m.c
M hw/sparc64/niagara.c
M hw/sparc64/sun4u.c
M hw/tricore/triboard.c
M hw/tricore/tricore_testboard.c
M hw/xen/xen-pvh-common.c
M hw/xenpv/xen_machine_pv.c
M hw/xtensa/sim.c
M hw/xtensa/virt.c
M hw/xtensa/xtfpga.c
M include/hw/boards.h
M system/vl.c
Log Message:
-----------
hw/boards: Rename no_sdcard -> auto_create_sdcard
Invert the 'no_sdcard' logic, renaming it as the more explicit
"auto_create_sdcard". Machines are supposed to create a SD Card
drive when this flag is set. In many cases it doesn't make much
sense (as boards don't expose SD Card host controller), but this
is patch only aims to expose that nonsense; so no logical change
intended (mechanical patch using gsed).
Most of the changes are:
- mc->no_sdcard = ON_OFF_AUTO_OFF;
+ mc->auto_create_sdcard = true;
Except in
. hw/core/null-machine.c
. hw/arm/xilinx_zynq.c
. hw/s390x/s390-virtio-ccw.c
where the disabled option is manually removed (since default):
- mc->no_sdcard = ON_OFF_AUTO_ON;
+ mc->auto_create_sdcard = false;
- mc->auto_create_sdcard = false;
and in system/vl.c we change the 'default_sdcard' type to boolean.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 5824fad4e92e3d10de1ce86d900dcde8f8dfaf76
https://github.com/qemu/qemu/commit/5824fad4e92e3d10de1ce86d900dcde8f8dfaf76
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/alpha/dp264.c
M hw/avr/arduino.c
M hw/hppa/machine.c
M hw/i386/pc.c
M hw/i386/x86.c
M hw/i386/xen/xen-pvh.c
M hw/loongarch/virt.c
M hw/m68k/an5206.c
M hw/m68k/mcf5208.c
M hw/m68k/next-cube.c
M hw/m68k/q800.c
M hw/m68k/virt.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/microblaze/xlnx-zynqmp-pmu.c
M hw/mips/boston.c
M hw/mips/fuloong2e.c
M hw/mips/jazz.c
M hw/mips/loongson3_virt.c
M hw/mips/malta.c
M hw/mips/mipssim.c
M hw/openrisc/openrisc_sim.c
M hw/openrisc/virt.c
M hw/ppc/amigaone.c
M hw/ppc/e500plat.c
M hw/ppc/mac_newworld.c
M hw/ppc/mac_oldworld.c
M hw/ppc/mpc8544ds.c
M hw/ppc/pegasos2.c
M hw/ppc/pnv.c
M hw/ppc/ppc405_boards.c
M hw/ppc/ppc440_bamboo.c
M hw/ppc/prep.c
M hw/ppc/sam460ex.c
M hw/ppc/spapr.c
M hw/ppc/virtex_ml507.c
M hw/remote/machine.c
M hw/rx/rx-gdbsim.c
M hw/sh4/r2d.c
M hw/sparc/leon3.c
M hw/sparc/sun4m.c
M hw/sparc64/niagara.c
M hw/sparc64/sun4u.c
M hw/tricore/triboard.c
M hw/tricore/tricore_testboard.c
M hw/xen/xen-pvh-common.c
M hw/xenpv/xen_machine_pv.c
M hw/xtensa/sim.c
M hw/xtensa/virt.c
M hw/xtensa/xtfpga.c
M tests/qemu-iotests/172.out
Log Message:
-----------
hw/boards: Do not create unusable default if=sd drives
A number of machines create an if=sd drive by default even though
they lack an SD bus, and therefore cannot use the drive.
This drive is created when the machine sets flag
@auto_create_sdcard.
See for example running HMP "info block" on the HPPA C3700 machine:
$ qemu-system-hppa -M C3700 -monitor stdio -S
(qemu) info block
floppy0: [not inserted]
Removable device: not locked, tray closed
sd0: [not inserted]
Removable device: not locked, tray closed
$ qemu-system-hppa -M C3700 -sd /bin/sh
qemu-system-hppa: -sd /bin/sh: machine type does not support
if=sd,bus=0,unit=0
Delete that from machines that lack an SD bus.
Note, only the ARM and RISCV targets use such feature:
$ git grep -wl IF_SD hw | cut -d/ -f-2 | sort -u
hw/arm
hw/riscv
$
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: f208970a06e2af65c351dd6e12df4ca4f382acdd
https://github.com/qemu/qemu/commit/f208970a06e2af65c351dd6e12df4ca4f382acdd
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/arm/aspeed.c
M hw/arm/b-l475e-iot01a.c
M hw/arm/collie.c
M hw/arm/digic_boards.c
M hw/arm/highbank.c
M hw/arm/kzm.c
M hw/arm/microbit.c
M hw/arm/mps2-tz.c
M hw/arm/mps2.c
M hw/arm/mps3r.c
M hw/arm/msf2-som.c
M hw/arm/musca.c
M hw/arm/musicpal.c
M hw/arm/netduino2.c
M hw/arm/netduinoplus2.c
M hw/arm/olimex-stm32-h405.c
M hw/arm/sbsa-ref.c
M hw/arm/stellaris.c
M hw/arm/stm32vldiscovery.c
M hw/arm/virt.c
M hw/arm/xen-pvh.c
Log Message:
-----------
hw/arm: Remove all invalid uses of auto_create_sdcard=true
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the ARM machines modified by this
commit try to use the IF_SD interface.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: b5d5edc1d9564b5156230860e494e1279099587d
https://github.com/qemu/qemu/commit/b5d5edc1d9564b5156230860e494e1279099587d
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/riscv/opentitan.c
M hw/riscv/shakti_c.c
M hw/riscv/sifive_e.c
M hw/riscv/spike.c
M hw/riscv/virt.c
Log Message:
-----------
hw/riscv: Remove all invalid uses of auto_create_sdcard=true
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the RISCV machines modified by this
commit try to use the IF_SD interface.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 2be22bc72d18d92ca9e0c16e56bf309839360f5d
https://github.com/qemu/qemu/commit/2be22bc72d18d92ca9e0c16e56bf309839360f5d
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M system/vl.c
Log Message:
-----------
hw/boards: Ensure machine setting auto_create_sdcard expose a SD Bus
Using the auto_create_sdcard feature without SD Bus is irrelevant.
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <[email protected]>
Commit: bb741c4f405cf5ade6d2cf3cbbf776a6f26016dc
https://github.com/qemu/qemu/commit/bb741c4f405cf5ade6d2cf3cbbf776a6f26016dc
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/riscv/opentitan.c
Log Message:
-----------
hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header
opentitan_machine_init() calls get_system_memory(),
which is declared in "exec/address-spaces.h". Include
it in order to avoid when refactoring unrelated headers:
hw/riscv/opentitan.c:83:29: error: call to undeclared function
'get_system_memory'
83 | MemoryRegion *sys_mem = get_system_memory();
| ^
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Message-Id: <[email protected]>
Commit: 937df81af6757638a7f1908747560dd342947213
https://github.com/qemu/qemu/commit/937df81af6757638a7f1908747560dd342947213
Author: Peter Maydell <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/net/smc91c111.c
Log Message:
-----------
hw/net/smc91c111: Ignore attempt to pop from empty RX fifo
The SMC91C111 includes an MMU Command register which permits
the guest to remove entries from the RX FIFO. The datasheet
does not specify what happens if the guest tries to do this
when the FIFO is already empty; there are no status registers
containing error bits which might be applicable.
Currently we don't guard at all against pop of an empty
RX FIFO, with the result that we allow the guest to drive
the rx_fifo_len index to negative values, which will cause
smc91c111_receive() to write to the rx_fifo[] array out of
bounds when we receive the next packet.
Instead ignore attempts to pop an empty RX FIFO.
Cc: [email protected]
Fixes: 80337b66a8e7 ("NIC emulation for qemu arm-softmmu")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2780
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: a029fe842f39af07ff5a203a34ebd5243df0e396
https://github.com/qemu/qemu/commit/a029fe842f39af07ff5a203a34ebd5243df0e396
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
Log Message:
-----------
tests/functional: Explicit endianness of microblaze assets
The archive used in test_microblaze_s3adsp1800.py (testing a
big-endian target) contains a big-endian kernel. Rename using
the _BE suffix.
Similarly, the archive in test_microblazeel_s3adsp1800 (testing
a little-endian target) contains a little-endian kernel. Rename
using _LE suffix.
These changes will help when adding cross-endian kernel tests.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: fe52b090c03bfb93a76883b8234fd42e975cb930
https://github.com/qemu/qemu/commit/fe52b090c03bfb93a76883b8234fd42e975cb930
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
Log Message:
-----------
tests/functional: Allow microblaze tests to take a machine name argument
Make microblaze tests a bit more generic.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-Id: <[email protected]>
Commit: 94dbecb994a38cafa057e5bfa515cef6faadcea4
https://github.com/qemu/qemu/commit/94dbecb994a38cafa057e5bfa515cef6faadcea4
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M tests/functional/test_microblazeel_s3adsp1800.py
Log Message:
-----------
tests/functional: Remove sleep() kludges from microblaze tests
Commit f0ec14c78c4 ("tests/avocado: Fix console data loss") fixed
QEMUMachine's problem with console, we don't need to use the sleep()
kludges.
Suggested-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: d31f1185fb029b44c439a6961a6cb087df6567d9
https://github.com/qemu/qemu/commit/d31f1185fb029b44c439a6961a6cb087df6567d9
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/isa/vt82c686.c
M hw/rtc/m48t59-isa.c
M hw/rtc/m48t59.c
M hw/sensor/tmp421.c
M hw/usb/hcd-ehci-pci.c
M hw/usb/hcd-uhci.c
Log Message:
-----------
hw: Declare various const data as 'const'
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 788369f477a3c89023f5ab19590baee4239623bb
https://github.com/qemu/qemu/commit/788369f477a3c89023f5ab19590baee4239623bb
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/sd/sdhci-internal.h
M hw/sd/sdhci.c
M hw/sensor/emc141x.c
M hw/sensor/isl_pmbus_vr.c
Log Message:
-----------
hw: Make class data 'const'
When the %data argument is not modified, we can declare it const.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 4ec96630f93ec2a1fd8bf9c9150cdae330531de8
https://github.com/qemu/qemu/commit/4ec96630f93ec2a1fd8bf9c9150cdae330531de8
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/core/qdev-properties-system.c
M include/hw/qdev-properties-system.h
M qapi/common.json
Log Message:
-----------
hw/qdev-properties-system: Introduce EndianMode QAPI enum
Introduce the EndianMode type and the DEFINE_PROP_ENDIAN() macros.
Endianness can be BIG, LITTLE or unspecified (default).
Reviewed-by: Thomas Huth <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 2cdf693b197db6c6c27ff2bf02fce1c0bb384786
https://github.com/qemu/qemu/commit/2cdf693b197db6c6c27ff2bf02fce1c0bb384786
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/intc/xilinx_intc.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/ppc/virtex_ml507.c
M hw/riscv/microblaze-v-generic.c
Log Message:
-----------
hw/intc/xilinx_intc: Make device endianness configurable
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
set it explicitly.
Set the proper endianness for each machine using the device.
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 644276db5d707eba7dd89cc8550b3639dbd29f75
https://github.com/qemu/qemu/commit/644276db5d707eba7dd89cc8550b3639dbd29f75
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/net/xilinx_ethlite.c
M hw/riscv/microblaze-v-generic.c
Log Message:
-----------
hw/net/xilinx_ethlite: Make device endianness configurable
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
set it explicitly.
Set the proper endianness for each machine using the device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: df1f35ab67e50f572934b7ea705764b77cf6d525
https://github.com/qemu/qemu/commit/df1f35ab67e50f572934b7ea705764b77cf6d525
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/ppc/virtex_ml507.c
M hw/riscv/microblaze-v-generic.c
M hw/timer/xilinx_timer.c
Log Message:
-----------
hw/timer/xilinx_timer: Make device endianness configurable
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
set it explicitly.
Set the proper endianness for each machine using the device.
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 8a8c92c8afbb8a153968a72dd4ce504884a3209d
https://github.com/qemu/qemu/commit/8a8c92c8afbb8a153968a72dd4ce504884a3209d
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/char/xilinx_uartlite.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/riscv/microblaze-v-generic.c
Log Message:
-----------
hw/char/xilinx_uartlite: Make device endianness configurable
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
set it explicitly.
Set the proper endianness for each machine using the device.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: e87c93df1134516166ff3d8f9a56e168ff7e1c8a
https://github.com/qemu/qemu/commit/e87c93df1134516166ff3d8f9a56e168ff7e1c8a
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/microblaze/petalogix_ml605_mmu.c
M hw/ssi/xilinx_spi.c
Log Message:
-----------
hw/ssi/xilinx_spi: Make device endianness configurable
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
set it explicitly.
Set the proper endianness on the single machine using the
device.
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: ba26f1477735a5ad7dd40a3227ac2a54cf82014d
https://github.com/qemu/qemu/commit/ba26f1477735a5ad7dd40a3227ac2a54cf82014d
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/arm/allwinner-a10.c
M hw/arm/allwinner-h3.c
M hw/arm/allwinner-r40.c
M hw/i2c/allwinner-i2c.c
M hw/intc/allwinner-a10-pic.c
M hw/misc/allwinner-a10-ccm.c
M hw/misc/allwinner-a10-dramc.c
M hw/misc/allwinner-cpucfg.c
M hw/misc/allwinner-h3-ccu.c
M hw/misc/allwinner-h3-dramc.c
M hw/misc/allwinner-h3-sysctrl.c
M hw/misc/allwinner-r40-ccu.c
M hw/misc/allwinner-r40-dramc.c
M hw/misc/allwinner-sid.c
M hw/misc/allwinner-sramc.c
M hw/net/allwinner-sun8i-emac.c
M hw/net/allwinner_emac.c
M hw/rtc/allwinner-rtc.c
M hw/sd/allwinner-sdhost.c
M hw/ssi/allwinner-a10-spi.c
M hw/timer/allwinner-a10-pit.c
M hw/watchdog/allwinner-wdt.c
Log Message:
-----------
hw/arm: Mark Allwinner Technology devices as little-endian
These devices are only used by the ARM targets, which are
only built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_LITTLE_ENDIAN (besides, the
DEVICE_BIG_ENDIAN case isn't tested). Simplify directly using
DEVICE_LITTLE_ENDIAN.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 7830a2ea8053e4dbe2466dba6a13204873a0ef87
https://github.com/qemu/qemu/commit/7830a2ea8053e4dbe2466dba6a13204873a0ef87
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/mips/boston.c
Log Message:
-----------
hw/mips: Mark Boston machine devices as little-endian
The Boston machine is only built as little-endian.
Therefore the DEVICE_NATIVE_ENDIAN definition expand to
DEVICE_LITTLE_ENDIAN (besides, the DEVICE_BIG_ENDIAN case
isn't tested). Simplify directly using DEVICE_LITTLE_ENDIAN.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 8970e2ea01f91c3162c36c731ea9720cb0df9bff
https://github.com/qemu/qemu/commit/8970e2ea01f91c3162c36c731ea9720cb0df9bff
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/mips/loongson3_virt.c
Log Message:
-----------
hw/mips: Mark Loonson3 Virt machine devices as little-endian
The Loonson3 Virt machine is only built as little-endian.
Therefore the DEVICE_NATIVE_ENDIAN definition expand to
DEVICE_LITTLE_ENDIAN (besides, the DEVICE_BIG_ENDIAN case
isn't tested). Simplify directly using DEVICE_LITTLE_ENDIAN.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 62fb8ec35b7d7de7bfd4bd008026d49a5f52f946
https://github.com/qemu/qemu/commit/62fb8ec35b7d7de7bfd4bd008026d49a5f52f946
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/pci-host/versatile.c
Log Message:
-----------
hw/pci-host: Mark versatile regions as little-endian
This device is only used by the ARM targets, which are only
built as little-endian. Therefore the DEVICE_NATIVE_ENDIAN
definition expand to DEVICE_LITTLE_ENDIAN (besides, the
DEVICE_BIG_ENDIAN case isn't tested). Simplify directly
using DEVICE_LITTLE_ENDIAN.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
Commit: 5bf24ec9c4d4771a9469cadd19cf534e9a32a9db
https://github.com/qemu/qemu/commit/5bf24ec9c4d4771a9469cadd19cf534e9a32a9db
Author: Keith Packard <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M hw/rx/rx-gdbsim.c
Log Message:
-----------
hw/rx: Allow execution without either bios or kernel
Users can use -device loader to get an ELF file loaded to
memory, so we don't need to require one of these options.
Signed-off-by: Keith Packard <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 2fd0afce85cc42ef2a3ccabff378aae0a5a1e5c1
https://github.com/qemu/qemu/commit/2fd0afce85cc42ef2a3ccabff378aae0a5a1e5c1
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M crypto/tlssession.c
M hw/core/machine.c
M hw/remote/mpqemu-link.c
M include/crypto/tlssession.h
M include/io/channel-tls.h
M include/io/channel.h
M io/channel-tls.c
M io/channel.c
M io/trace-events
M migration/channel.c
M migration/cpr.c
M migration/migration.c
M migration/migration.h
M migration/multifd.c
M migration/multifd.h
M migration/options.c
M migration/ram.c
M migration/rdma.c
M migration/savevm.c
M migration/tls.c
M migration/tls.h
M migration/trace-events
M qapi/migration.json
M tests/migration-stress/guestperf/comparison.py
M tests/migration-stress/guestperf/engine.py
M tests/migration-stress/guestperf/report.py
M tests/migration-stress/guestperf/scenario.py
M tests/migration-stress/guestperf/shell.py
M tests/qtest/migration/migration-util.c
M tests/qtest/migration/migration-util.h
M tests/qtest/migration/precopy-tests.c
M tests/unit/test-crypto-tlssession.c
Log Message:
-----------
Merge tag 'migration-20250214-pull-request' of
https://gitlab.com/farosas/qemu into staging
Migration pull request
- Proper TLS termination for multifd
- Fixes for bugs while cancelling migration
- Fix for a hang after migration failure (#2633)
- Tests for qmp_migrate_cancel
- Fix for CID 1590980
- Fixes and improvements to guestperf.py
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# gpg: Signature made Fri 14 Feb 2025 15:28:42 EST
# gpg: using RSA key AA1B48B0A22326A5A4C364CFC798DC741BEC319D
# gpg: issuer "[email protected]"
# gpg: Good signature from "Fabiano Rosas <[email protected]>" [unknown]
# gpg: aka "Fabiano Almeida Rosas <[email protected]>"
[unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: AA1B 48B0 A223 26A5 A4C3 64CF C798 DC74 1BEC 319D
* tag 'migration-20250214-pull-request' of https://gitlab.com/farosas/qemu: (22
commits)
guestperf: Add test result data into report
guestperf: Introduce multifd compression option
guestperf: Nitpick the inconsistent parameters
guestperf: Support deferred migration for multifd
migration: use parameters.mode in cpr_state_save
migration: Update migrate_cancel documentation
tests/qtest/migration: Add a cancel test
tests/qtest/migration: Introduce migration_test_add_suffix
migration: Don't set FAILED state when cancelling
migration: Reject qmp_migrate_cancel after postcopy
migration: Fix hang after error in destination setup phase
migration: Change migrate_fd_ to migration_
migration: Unify migration_cancel and migrate_fd_cancel
migration: Set migration error outside of migrate_cancel
migration: Check migration error after loadvm
migration/multifd: Add a compat property for TLS termination
migration/multifd: Terminate the TLS connection
io: Add a read flag for relaxed EOF
io: Add flags argument to qio_channel_readv_full_all_eof
crypto: Remove qcrypto_tls_session_get_handshake_status
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: b3834364822b358d44964cd2ba71bdfa025eb57f
https://github.com/qemu/qemu/commit/b3834364822b358d44964cd2ba71bdfa025eb57f
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M accel/tcg/cputlb.c
M accel/tcg/tcg-all.c
M docs/devel/multi-thread-tcg.rst
M docs/devel/tcg-ops.rst
M include/exec/tlb-common.h
M include/exec/vaddr.h
M include/qemu/atomic.h
R include/tcg/oversized-guest.h
M include/tcg/tcg-opc.h
M include/tcg/tcg.h
M linux-user/aarch64/target_signal.h
M linux-user/arm/target_signal.h
M linux-user/elfload.c
M linux-user/generic/signal.h
M linux-user/i386/target_signal.h
M linux-user/m68k/target_signal.h
M linux-user/microblaze/target_signal.h
M linux-user/ppc/target_signal.h
M linux-user/s390x/target_signal.h
M linux-user/sh4/target_signal.h
M linux-user/x86_64/target_signal.h
M linux-user/xtensa/target_signal.h
M plugins/api.c
M target/arm/ptw.c
M target/riscv/cpu_helper.c
M target/sparc/gdbstub.c
M target/sparc/insns.decode
M target/sparc/translate.c
M tcg/aarch64/tcg-target-con-set.h
M tcg/aarch64/tcg-target.c.inc
M tcg/aarch64/tcg-target.h
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target-con-set.h
M tcg/loongarch64/tcg-target-con-str.h
M tcg/loongarch64/tcg-target.c.inc
M tcg/loongarch64/tcg-target.h
M tcg/mips/tcg-target-con-set.h
M tcg/mips/tcg-target-con-str.h
M tcg/mips/tcg-target.c.inc
M tcg/mips/tcg-target.h
M tcg/optimize.c
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target-con-set.h
M tcg/riscv/tcg-target-con-str.h
M tcg/riscv/tcg-target.c.inc
M tcg/riscv/tcg-target.h
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target-con-set.h
M tcg/sparc64/tcg-target-con-str.h
M tcg/sparc64/tcg-target.c.inc
M tcg/sparc64/tcg-target.h
M tcg/tcg-op-ldst.c
M tcg/tcg.c
M tcg/tci.c
M tcg/tci/tcg-target.c.inc
M tcg/tci/tcg-target.h
Log Message:
-----------
Merge tag 'pull-tcg-20250215' of https://gitlab.com/rth7680/qemu into staging
tcg: Remove last traces of TCG_TARGET_NEED_POOL_LABELS
tcg: Cleanups after disallowing 64-on-32
tcg: Introduce constraint for zero register
linux-user: Move TARGET_SA_RESTORER out of generic/signal.h
linux-user: Fix alignment when unmapping excess reservation
target/sparc: Fix register selection for all F*TOx and FxTO* instructions
target/sparc: Fix gdbstub incorrectly handling registers f32-f62
target/sparc: fake UltraSPARC T1 PCR and PIC registers
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# gpg: Signature made Sat 15 Feb 2025 19:00:24 EST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "[email protected]"
# gpg: Good signature from "Richard Henderson <[email protected]>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20250215' of https://gitlab.com/rth7680/qemu: (24 commits)
target/sparc: fake UltraSPARC T1 PCR and PIC registers
target/sparc: Fix gdbstub incorrectly handling registers f32-f62
target/sparc: Fix register selection for all F*TOx and FxTO* instructions
linux-user: Move TARGET_SA_RESTORER out of generic/signal.h
elfload: Fix alignment when unmapping excess reservation
tcg/sparc64: Use 'z' constraint
tcg/riscv: Use 'z' constraint
tcg/mips: Use 'z' constraint
tcg/loongarch64: Use 'z' constraint
tcg/aarch64: Use 'z' constraint
tcg: Introduce the 'z' constraint for a hardware zero register
include/exec: Use uintptr_t in CPUTLBEntry
include/exec: Change vaddr to uintptr_t
accel/tcg: Fix tlb_set_page_with_attrs, tlb_set_page
plugins: Fix qemu_plugin_read_memory_vaddr parameters
tcg: Replace addr{lo,hi}_reg with addr_reg in TCGLabelQemuLdst
tcg/ppc: Drop addrhi from prepare_host_addr
tcg/mips: Drop addrhi from prepare_host_addr
tcg/i386: Drop addrhi from prepare_host_addr
tcg/arm: Drop addrhi from prepare_host_addr
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 99eb2f3638109d88ddcd0d40dfea395d9fd42d46
https://github.com/qemu/qemu/commit/99eb2f3638109d88ddcd0d40dfea395d9fd42d46
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-02-16 (Sun, 16 Feb 2025)
Changed paths:
M backends/tpm/tpm_util.c
M hw/arm/allwinner-a10.c
M hw/arm/allwinner-h3.c
M hw/arm/allwinner-r40.c
M hw/arm/aspeed.c
M hw/arm/bananapi_m2u.c
M hw/arm/cubieboard.c
M hw/arm/exynos4_boards.c
M hw/arm/fby35.c
M hw/arm/imx25_pdk.c
M hw/arm/integratorcp.c
M hw/arm/mcimx6ul-evk.c
M hw/arm/mcimx7d-sabre.c
M hw/arm/npcm7xx_boards.c
M hw/arm/omap_sx1.c
M hw/arm/orangepi.c
M hw/arm/raspi.c
M hw/arm/raspi4b.c
M hw/arm/realview.c
M hw/arm/sabrelite.c
M hw/arm/stellaris.c
M hw/arm/versatilepb.c
M hw/arm/vexpress.c
M hw/arm/xilinx_zynq.c
M hw/arm/xlnx-versal-virt.c
M hw/arm/xlnx-zcu102.c
M hw/arm/xlnx-zynqmp.c
M hw/char/xilinx_uartlite.c
M hw/core/machine-smp.c
M hw/core/null-machine.c
M hw/core/qdev-properties-system.c
M hw/core/sysbus.c
M hw/display/ramfb-standalone.c
M hw/i2c/allwinner-i2c.c
M hw/i386/amd_iommu.c
M hw/i386/intel_iommu.c
M hw/i386/x86-iommu.c
M hw/intc/allwinner-a10-pic.c
M hw/intc/apic.c
M hw/intc/xilinx_intc.c
M hw/isa/vt82c686.c
M hw/microblaze/petalogix_ml605_mmu.c
M hw/microblaze/petalogix_s3adsp1800_mmu.c
M hw/mips/boston.c
M hw/mips/loongson3_virt.c
M hw/misc/allwinner-a10-ccm.c
M hw/misc/allwinner-a10-dramc.c
M hw/misc/allwinner-cpucfg.c
M hw/misc/allwinner-h3-ccu.c
M hw/misc/allwinner-h3-dramc.c
M hw/misc/allwinner-h3-sysctrl.c
M hw/misc/allwinner-r40-ccu.c
M hw/misc/allwinner-r40-dramc.c
M hw/misc/allwinner-sid.c
M hw/misc/allwinner-sramc.c
M hw/net/allwinner-sun8i-emac.c
M hw/net/allwinner_emac.c
M hw/net/fsl_etsec/etsec.c
M hw/net/smc91c111.c
M hw/net/xilinx_ethlite.c
M hw/pci-host/versatile.c
M hw/ppc/virtex_ml507.c
M hw/riscv/microblaze-v-generic.c
M hw/riscv/microchip_pfsoc.c
M hw/riscv/opentitan.c
M hw/riscv/sifive_u.c
M hw/rtc/allwinner-rtc.c
M hw/rtc/m48t59-isa.c
M hw/rtc/m48t59.c
M hw/rx/rx-gdbsim.c
M hw/s390x/s390-virtio-ccw.c
M hw/sd/allwinner-sdhost.c
M hw/sd/sdhci-internal.h
M hw/sd/sdhci.c
M hw/sensor/emc141x.c
M hw/sensor/isl_pmbus_vr.c
M hw/sensor/tmp421.c
M hw/ssi/allwinner-a10-spi.c
M hw/ssi/xilinx_spi.c
M hw/timer/allwinner-a10-pit.c
M hw/timer/xilinx_timer.c
M hw/tpm/tpm_tis_sysbus.c
M hw/usb/hcd-ehci-pci.c
M hw/usb/hcd-uhci.c
M hw/usb/xen-usb.c
M hw/vfio/amd-xgbe.c
M hw/vfio/calxeda-xgmac.c
M hw/vfio/platform.c
M hw/watchdog/allwinner-wdt.c
M hw/xen/xen-legacy-backend.c
M hw/xen/xen_pvdev.c
M include/hw/boards.h
M include/hw/qdev-properties-system.h
M include/hw/sysbus.h
M include/hw/xen/xen_pvdev.h
M qapi/common.json
M system/vl.c
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
M tests/qemu-iotests/172.out
Log Message:
-----------
Merge tag 'hw-misc-20250216' of https://github.com/philmd/qemu into staging
Misc HW patches
- Use qemu_hexdump_line() in TPM backend (Philippe)
- Remove magic number in APIC (Phil)
- Disable thread-level cache topology (Zhao)
- Xen QOM style cleanups (Bernhard)
- Introduce TYPE_DYNAMIC_SYS_BUS_DEVICE (Philippe)
- Invert logic of machine no_sdcard flag (Philippe)
- Housekeeping in MicroBlaze functional tests (Philippe)
- Prevent out-of-bound access in SMC91C111 RX path (Peter)
- Declare more fields / arguments as const (Philippe)
- Introduce EndianMode QAPI enum (Philippe)
- Make various Xilinx devices endianness configurable (Philippe)
- Mark some devices memory regions as little-endian (Philippe)
- Allow execution RX gdbsim machine without BIOS/kernel (Keith)
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# gpg: Signature made Sun 16 Feb 2025 15:58:55 EST
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <[email protected]>"
[full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20250216' of https://github.com/philmd/qemu: (39 commits)
hw/rx: Allow execution without either bios or kernel
hw/pci-host: Mark versatile regions as little-endian
hw/mips: Mark Loonson3 Virt machine devices as little-endian
hw/mips: Mark Boston machine devices as little-endian
hw/arm: Mark Allwinner Technology devices as little-endian
hw/ssi/xilinx_spi: Make device endianness configurable
hw/char/xilinx_uartlite: Make device endianness configurable
hw/timer/xilinx_timer: Make device endianness configurable
hw/net/xilinx_ethlite: Make device endianness configurable
hw/intc/xilinx_intc: Make device endianness configurable
hw/qdev-properties-system: Introduce EndianMode QAPI enum
hw: Make class data 'const'
hw: Declare various const data as 'const'
tests/functional: Remove sleep() kludges from microblaze tests
tests/functional: Allow microblaze tests to take a machine name argument
tests/functional: Explicit endianness of microblaze assets
hw/net/smc91c111: Ignore attempt to pop from empty RX fifo
hw/riscv/opentitan: Include missing 'exec/address-spaces.h' header
hw/boards: Ensure machine setting auto_create_sdcard expose a SD Bus
hw/riscv: Remove all invalid uses of auto_create_sdcard=true
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Compare: https://github.com/qemu/qemu/compare/495de0fd82d8...99eb2f363810
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