Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 4098c6b7b62c6a11a15c74fa275e754af8970317
https://github.com/qemu/qemu/commit/4098c6b7b62c6a11a15c74fa275e754af8970317
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
Log Message:
-----------
tests/functional: Have microblaze tests inherit common parent class
Have the MicroblazeMachine class being common to both
MicroblazeBigEndianMachine and MicroblazeLittleEndianMachine
classes. Move the xmaton and ballerina tests to the parent class.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
[thuth: Add missing ASSET statements to the leaf classes]
Signed-off-by: Thomas Huth <[email protected]>
Commit: ab544de12787035edb7ad4994a80f9cd6a6b55d7
https://github.com/qemu/qemu/commit/ab544de12787035edb7ad4994a80f9cd6a6b55d7
Author: Nicolin Chen <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M hw/arm/smmuv3.c
Log Message:
-----------
hw/arm/smmuv3: Fill u.f_cd_fetch.addr for SMMU_EVT_F_CD_FETCH
When we fill in the SMMUEventInfo for SMMU_EVT_F_CD_FETCH we write
the address into the f_ste_fetch member of the union, but then when
we come to read it back in smmuv3_record_event() we will (correctly)
be using the f_cd_fetch member.
This is more like a cosmetics fix since the f_cd_fetch and f_ste_fetch are
basically the same field since they are in the exact same union with exact
same type, but it's conceptually wrong. Use the correct union member.
Signed-off-by: Nicolin Chen <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: f10104aeae3a17f181d5bb37b7fd7dad7fe86cba
https://github.com/qemu/qemu/commit/f10104aeae3a17f181d5bb37b7fd7dad7fe86cba
Author: Matthew R. Ochs <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M docs/system/arm/virt.rst
M hw/arm/virt.c
Log Message:
-----------
hw/arm/virt: Support larger highmem MMIO regions
The MMIO region size required to support virtualized environments with
large PCI BAR regions can exceed the hardcoded limit configured in QEMU.
For example, a VM with multiple NVIDIA Grace-Hopper GPUs passed through
requires more MMIO memory than the amount provided by VIRT_HIGH_PCIE_MMIO
(currently 512GB). Instead of updating VIRT_HIGH_PCIE_MMIO, introduce a
new parameter, highmem-mmio-size, that specifies the MMIO size required
to support the VM configuration.
Example usage with 1TB MMIO region size:
-machine virt,gic-version=3,highmem-mmio-size=1T
Signed-off-by: Matthew R. Ochs <[email protected]>
Reviewed-by: Gavin Shan <[email protected]>
Reviewed-by: Shameer Kolothum <[email protected]>
Reviewed-by: Eric Auger <[email protected]>
Reviewed-by: Nicolin Chen <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: cacf4cb2516aa4de94aa80fecb08be4dafa5ed44
https://github.com/qemu/qemu/commit/cacf4cb2516aa4de94aa80fecb08be4dafa5ed44
Author: Peter Maydell <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M monitor/hmp-cmds.c
Log Message:
-----------
monitor/hmp-cmds.c: Clean up hmp_dumpdtb printf
In hmp_dumpdtb(), we print a message when the command succeeds. This
message is missing the trailing \n, so the HMP command prompt is
printed immediately after it. We also weren't capitalizing 'DTB', or
quoting the filename in the message. Fix these nits.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: 3c25f487bc0672bf13473f4a7235c3ef592c954c
https://github.com/qemu/qemu/commit/3c25f487bc0672bf13473f4a7235c3ef592c954c
Author: Peter Maydell <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M hw/openrisc/boot.c
M hw/openrisc/openrisc_sim.c
M hw/openrisc/virt.c
M include/hw/openrisc/boot.h
Log Message:
-----------
hw/openrisc: Support monitor dumpdtb command
The openrisc machines don't set MachineState::fdt to point to their
DTB blob. This means that although the command line '-machine
dumpdtb=file.dtb' option works, the equivalent QMP and HMP monitor
commands do not, but instead produce the error "This machine doesn't
have a FDT".
Set MachineState::fdt in openrisc_load_fdt(), when we write it to
guest memory.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: dfd0de718662a58ef2f2ef051939ed4b1a4d5ea7
https://github.com/qemu/qemu/commit/dfd0de718662a58ef2f2ef051939ed4b1a4d5ea7
Author: Peter Maydell <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M hw/mips/boston.c
Log Message:
-----------
hw/mips/boston: Check for error return from boston_fdt_filter()
The function boston_fdt_filter() can return NULL on errors (in which
case it will print an error message). When we call this from the
non-FIT-image codepath, we aren't checking the return value, so we
will plough on with a NULL pointer, and segfault in fdt_totalsize().
Check for errors here.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: db0dd33559ee97a1fe84a1272258646279aca2e2
https://github.com/qemu/qemu/commit/db0dd33559ee97a1fe84a1272258646279aca2e2
Author: Peter Maydell <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M hw/core/loader-fit.c
M hw/mips/boston.c
M include/hw/loader-fit.h
Log Message:
-----------
hw/mips/boston: Support dumpdtb monitor commands
The boston machine doesn't set MachineState::fdt to the DTB blob that
it has loaded or created, which means that the QMP/HMP dumpdtb
monitor commands don't work.
Setting MachineState::fdt is easy in the non-FIT codepath: we can
simply do so immediately before loading the DTB into guest memory.
The FIT codepath is a bit more awkward as currently the FIT loader
throws away the memory that the FDT was in after it loads it into
guest memory. So we add a void *pfdt argument to load_fit() for it
to store the FDT pointer into.
There is some readjustment required of the pointer handling in
loader-fit.c, so that it applies 'const' only where it should (e.g.
the data pointer we get back from fdt_getprop() is const, because
it's into the middle of the input FDT data, but the pointer that
fit_load_image_alloc() should not be const, because it's freshly
allocated memory that the caller can change if it likes).
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: 8fd2518ef2f8d34dc9ee53d6915a2a610eb1a659
https://github.com/qemu/qemu/commit/8fd2518ef2f8d34dc9ee53d6915a2a610eb1a659
Author: Peter Maydell <[email protected]>
Date: 2025-02-24 (Mon, 24 Feb 2025)
Changed paths:
M hw/arm/boot.c
M hw/core/machine.c
M hw/loongarch/virt-fdt-build.c
M hw/mips/boston.c
M hw/openrisc/boot.c
M hw/ppc/e500.c
M hw/ppc/pegasos2.c
M hw/ppc/pnv.c
M hw/ppc/spapr.c
M hw/riscv/boot.c
M include/system/device_tree.h
M system/device_tree.c
Log Message:
-----------
hw: Centralize handling of -machine dumpdtb option
Currently we handle the 'dumpdtb' machine sub-option ad-hoc in every
board model that has an FDT. It's up to the board code to make sure
it calls qemu_fdt_dumpdtb() in the right place.
This means we're inconsistent and often just ignore the user's
command line argument:
* if the board doesn't have an FDT at all
* if the board supports FDT, but there happens not to be one
present (usually because of a missing -fdt option)
This isn't very helpful because it gives the user no clue why their
option was ignored.
However, in order to support the QMP/HMP dumpdtb commands we require
now that every FDT machine stores a pointer to the FDT in
MachineState::fdt. This means we can handle -machine dumpdtb
centrally by calling the qmp_dumpdtb() function, unifying its
handling with the QMP/HMP commands. All the board code calls to
qemu_fdt_dumpdtb() can then be removed.
For this commit we retain the existing behaviour that if there
is no FDT we silently ignore the -machine dumpdtb option.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Commit: d8b913f7c75cd38ad07276033faa51fee68514b4
https://github.com/qemu/qemu/commit/d8b913f7c75cd38ad07276033faa51fee68514b4
Author: Thomas Huth <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M tests/qtest/qom-test.c
Log Message:
-----------
tests/qtest/qom-test: Test retrieval of machine class properties
There were recently some crashes that occurred when trying to
retrieve the properties of machines. Let's add a test to avoid
regression here.
Message-ID: <[email protected]>
Reviewed-by: Fabiano Rosas <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 36324c6774d2da16edc97cd3c9b30aa34d3f7a83
https://github.com/qemu/qemu/commit/36324c6774d2da16edc97cd3c9b30aa34d3f7a83
Author: Akihiko Odaki <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M qom/object_interfaces.c
Log Message:
-----------
qom: Use command line syntax for default values in help
object_property_help() uses the conventional command line syntax instead
of the JSON syntax. In particular,
- Key-value pairs are written in the command line syntax.
- bool description passed to the function says on/off instead of
true/false.
However, there is one exception: default values are formatted into JSON.
While the command line and JSON syntaxes are consistent in many cases,
there are two types where they disagree:
string: The command line syntax omits quotes while JSON requires them.
bool: JSON only accepts true/false for bool but the command line syntax
accepts on/off too, and on/off are also more popular than
true/false. For example, the docs directory has 2045 "on"
occurances while it has only 194 "true" occurances.
on/off are also accepted by OnOffAuto so users do not have to
remember the type is bool or OnOffAuto to use the values.
Omit quotes for strings and use on/off for bools when formatting
default values for better consistency.
Signed-off-by: Akihiko Odaki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 1433e38cc840957bafe6bc17a241c57cf93c90cd
https://github.com/qemu/qemu/commit/1433e38cc840957bafe6bc17a241c57cf93c90cd
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/timer/hpet.c
Log Message:
-----------
hpet: do not overwrite properties on post_load
Migration relies on having the same device configuration on the source
and destination. Therefore, there is no need to modify flags,
timer capabilities and the fw_cfg HPET block id on migration;
it was set to exactly the same values by realize.
Reviewed-by: Zhao Liu <[email protected]> (hpet_post_load only)
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 9ee488670066b5fdeebf0015e9b4a40bdc3eccbf
https://github.com/qemu/qemu/commit/9ee488670066b5fdeebf0015e9b4a40bdc3eccbf
Author: Zhao Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/hw/timer/Kconfig
Log Message:
-----------
i386: Fix the missing Rust HPET configuration option
The configuration option of Rust HPET is missing, so that PC machine
can't boot with "hpet=on" when QEMU Rust support is enabled.
Add the Rust HPET configuration option.
Fixes: d128c341a744 ("i386: enable rust hpet for pc when rust is enabled")
Signed-off-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 4cfe9edb1b1961af9cda74351f73b0abb3159b67
https://github.com/qemu/qemu/commit/4cfe9edb1b1961af9cda74351f73b0abb3159b67
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/Cargo.lock
M rust/qemu-api/Cargo.toml
M scripts/archive-source.sh
M scripts/make-release
M subprojects/.gitignore
A subprojects/libc-0.2-rs.wrap
A subprojects/packagefiles/libc-0.2-rs/meson.build
Log Message:
-----------
rust: subprojects: add libc crate
This allows access to errno values.
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 23a4b3ebc74bbc6b6f44edf2255864042f122b82
https://github.com/qemu/qemu/commit/23a4b3ebc74bbc6b6f44edf2255864042f122b82
Author: Stephen Bates <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/devices/nvme.rst
M hw/nvme/ctrl.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
hw/nvme: Add OCP SMART / Health Information Extended Log Page
The Open Compute Project [1] includes a Datacenter NVMe
SSD Specification [2]. The most recent version of this specification
(as of November 2024) is 2.6.1. This specification layers on top of
the NVM Express specifications [3] to provide additional
functionality. A key part of of this is the 512 Byte OCP SMART / Health
Information Extended log page that is defined in Section 4.8.6 of the
specification.
We add a controller argument (ocp) that toggles on/off the SMART log
extended structure. To accommodate different vendor specific specifications
like OCP, we add a multiplexing function (nvme_vendor_specific_log) which
will route to the different log functions based on arguments and log ids.
We only return the OCP extended SMART log when the command is 0xC0 and ocp
has been turned on in the nvme argumants.
Though we add the whole nvme SMART log extended structure, we only populate
the physical_media_units_{read,written}, log_page_version and
log_page_uuid.
This patch is based on work done by Joel but has been modified enough
that he requested a co-developed-by tag rather than a signed-off-by.
[1]: https://www.opencompute.org/
[2]:
https://www.opencompute.org/documents/datacenter-nvme-ssd-specification-v2-6-1-pdf
[3]: https://nvmexpress.org/specifications/
Signed-off-by: Stephen Bates <[email protected]>
Co-developed-by: Joel Granados <[email protected]>
Reviewed-by: Klaus Jensen <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: cd59f50ab017183805a0dd82f5e85159ecc355ce
https://github.com/qemu/qemu/commit/cd59f50ab017183805a0dd82f5e85159ecc355ce
Author: Klaus Jensen <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/ns.c
Log Message:
-----------
hw/nvme: always initialize a subsystem
If no nvme-subsys is explicitly configured, instantiate one.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: e7047adf1ebf4b5ad63e42c799d8334dcd3d139d
https://github.com/qemu/qemu/commit/e7047adf1ebf4b5ad63e42c799d8334dcd3d139d
Author: Klaus Jensen <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
hw/nvme: make oacs dynamic
Virtualization Management needs sriov-related parameters. Only report
support for the command when that conditions are true.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: 9cf6ec06592dea1973e66cd5cedf96fc59639047
https://github.com/qemu/qemu/commit/9cf6ec06592dea1973e66cd5cedf96fc59639047
Author: Klaus Jensen <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
hw/nvme: add knob for doorbell buffer config support
Add a 'dbcs' knob to allow Doorbell Buffer Config command to be
disabled.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: b202fb549dc487c5611564e5d03286748586aa34
https://github.com/qemu/qemu/commit/b202fb549dc487c5611564e5d03286748586aa34
Author: Klaus Jensen <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M include/block/nvme.h
Log Message:
-----------
nvme: fix iocs status code values
The status codes related to I/O Command Sets are in the wrong group.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: d96a32de3fd0880a9340590fd279288e42e983c1
https://github.com/qemu/qemu/commit/d96a32de3fd0880a9340590fd279288e42e983c1
Author: Klaus Jensen <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M include/block/nvme.h
Log Message:
-----------
hw/nvme: be compliant wrt. dsm processing limits
The specification states that,
> The controller shall set all three processing limit fields (i.e., the
> DMRL, DMRSL and DMSL fields) to non-zero values or shall clear all
> three processing limit fields to 0h.
So, set the DMRL and DMSL fields in addition to DMRSL.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: 8a420dd109b9e4e2244cfa32bc92829093268b3e
https://github.com/qemu/qemu/commit/8a420dd109b9e4e2244cfa32bc92829093268b3e
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/devel/rust.rst
M rust/qemu-api/meson.build
M rust/qemu-api/src/assertions.rs
A rust/qemu-api/src/errno.rs
M rust/qemu-api/src/lib.rs
M rust/qemu-api/src/prelude.rs
Log Message:
-----------
rust: add module to convert between success/-errno and io::Result
It is a common convention in QEMU to return a positive value in case of
success, and a negated errno value in case of error. Unfortunately,
using errno portably in Rust is a bit complicated; on Unix the errno
values are supported natively by io::Error, but on Windows they are not;
so, use the libc crate.
This is a set of utility functions that are used by both chardev and
block layer bindings.
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 4cb7040d851cdd7b2622f83fd7d95a922225386b
https://github.com/qemu/qemu/commit/4cb7040d851cdd7b2622f83fd7d95a922225386b
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/qemu-api/tests/tests.rs
Log Message:
-----------
rust: tests: do not import bindings::*
Similar to the devices, spell the exact set of C functions that are
called directly.
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: c48700e86d91004424e3a6496f194decb036dccb
https://github.com/qemu/qemu/commit/c48700e86d91004424e3a6496f194decb036dccb
Author: Zhao Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/hw/char/pl011/src/device.rs
M rust/hw/char/pl011/src/device_class.rs
M rust/qemu-api/src/irq.rs
Log Message:
-----------
rust: prefer importing std::ptr over core::ptr
The std::ptr is same as core::ptr, but std has already been used in many
cases and there's no need to choose non-std library.
So, use std::ptr directly to make the used ptr library as consistent as
possible.
Signed-off-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 7a2e40866cf45a016858c73b9a5699b72be8ce38
https://github.com/qemu/qemu/commit/7a2e40866cf45a016858c73b9a5699b72be8ce38
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/devel/rust.rst
Log Message:
-----------
docs: rust: fix typos
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 29b9a66f9186f028ec46b58c9914d2da68c25c2c
https://github.com/qemu/qemu/commit/29b9a66f9186f028ec46b58c9914d2da68c25c2c
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/devel/rust.rst
Log Message:
-----------
docs: rust: update description of crates
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 5384d92e22577306408cefff887bc5a4b154f470
https://github.com/qemu/qemu/commit/5384d92e22577306408cefff887bc5a4b154f470
Author: Ilya Leoshkevich <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M stubs/meson.build
R stubs/monitor-fd.c
Log Message:
-----------
stub: Remove monitor-fd.c
Both monitor-fd.c and monitor-internal.c contain a stub for
monitor_get_fd(), which causes a duplicate symbol linker error when
linking rust-qemu-api-integration. Use monitor-internal.c instead of
monitor-fd.c and remove the latter.
Reported-by: Zhao Liu <[email protected]>
Suggested-by: Zhao Liu <[email protected]>
Fixes: fccb744f41c6 ("gdbstub: Try unlinking the unix socket before binding")
Signed-off-by: Ilya Leoshkevich <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 6debfb2cb1795427d2dc6a741c7430a233c76695
https://github.com/qemu/qemu/commit/6debfb2cb1795427d2dc6a741c7430a233c76695
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M system/physmem.c
Log Message:
-----------
physmem: replace assertion with error
It is possible to start QEMU with a confidential-guest-support object
even in TCG mode. While there is already a check in qemu_machine_creation_done:
if (machine->cgs && !machine->cgs->ready) {
error_setg(errp, "accelerator does not support confidential guest %s",
object_get_typename(OBJECT(machine->cgs)));
exit(1);
}
the creation of RAMBlocks happens earlier, in qemu_init_board(), if
the command line does not override the default memory backend with
-M memdev. Then the RAMBlock will try to use guest_memfd (because
machine_require_guest_memfd correctly returns true; at least correctly
according to the current implementation) and trigger the assertion
failure for kvm_enabled(). This happend with a command line as
simple as the following:
qemu-system-x86_64 -m 512 -nographic -object
sev-snp-guest,reduced-phys-bits=48,id=sev0 \
-M q35,kernel-irqchip=split,confidential-guest-support=sev0
qemu-system-x86_64: ../system/physmem.c:1871: ram_block_add: Assertion
`kvm_enabled()' failed.
Cc: Xiaoyao Li <[email protected]>
Cc: [email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: David Hildenbrand <[email protected]>
Reviewed-by: Pankaj Gupta <[email protected]>
Reviewed-by: Xiaoyao Li <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: ae3a420fea8bfc545a4ca4b899d2fe6a3031aefa
https://github.com/qemu/qemu/commit/ae3a420fea8bfc545a4ca4b899d2fe6a3031aefa
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M Kconfig.host
M hw/display/Kconfig
M hw/display/meson.build
M meson.build
Log Message:
-----------
pvg: do not enable it on cross-architecture targets
PVG is not cross-architecture; the PVG guest drivers with x86-64 macOS do not
give
useful results with the aarch64 macOS host PVG framework, and vice versa.
To express this repurpose CONFIG_MAC_PVG, making it true only if the target has
the same architecture as the host. Furthermore, remove apple-gfx.m unless
one of the devices is actually present.
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: d50ea7f0e6fd2b0631abb61d213a396e3df32d7e
https://github.com/qemu/qemu/commit/d50ea7f0e6fd2b0631abb61d213a396e3df32d7e
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/display/meson.build
M meson.build
M meson_options.txt
M scripts/meson-buildoptions.sh
Log Message:
-----------
pvg: add option to configure it out
... and also to require it (--enable-pvg). While at it, unify the dependency()
call for pvg and metal, which simplifies the logic a bit.
Note that all other Apple frameworks are either required or always-present,
therefore do not add them to the summary in the same way as PVG.
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 2540917285872ab08f3ce66990983edd19ef4ec0
https://github.com/qemu/qemu/commit/2540917285872ab08f3ce66990983edd19ef4ec0
Author: Wei Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/hvf/hvf.c
M target/i386/hvf/x86.c
M target/i386/hvf/x86.h
M target/i386/hvf/x86_descr.c
M target/i386/hvf/x86_descr.h
M target/i386/hvf/x86_task.c
M target/i386/hvf/x86_task.h
Log Message:
-----------
target/i386/hvf: fix a typo in a type name
The prefix x68 is wrong. Change it to x86.
Signed-off-by: Wei Liu <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Link:
https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: bc4fa8c3c9b5e2ad945617b667362b71b13495ad
https://github.com/qemu/qemu/commit/bc4fa8c3c9b5e2ad945617b667362b71b13495ad
Author: Wei Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/hvf/hvf-i386.h
M target/i386/hvf/hvf.c
M target/i386/hvf/x86_emu.c
Log Message:
-----------
target/i386/hvf: fix the declaration of hvf_handle_io
There is a conflicting declaration for hvf_handle_io in x86_emu.c. The type of
the first argument is wrong. There has never been a problem because the first
argument is not used in hvf_handle_io.
That being said, the code shouldn't contain such an error. Use the proper
declaration from hvf-i386.h.
Take the chance to change the first argument's type to be CPUState.
Signed-off-by: Wei Liu <[email protected]>
Link:
https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: d54d3346b86d7c08b7fb2dac2d9a889854c7d3ba
https://github.com/qemu/qemu/commit/d54d3346b86d7c08b7fb2dac2d9a889854c7d3ba
Author: Wei Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/hvf/x86_decode.c
Log Message:
-----------
target/i386/hvf: use x86_segment in x86_decode.c
Make the code to rely on the segment definition for checking cs.db.
This allows removing HVF specific VMX related definition from the
decoder.
Introduce a function for retrieving the CS descriptor.
No functional change intended.
Signed-off-by: Wei Liu <[email protected]>
Link:
https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: dbccd48df0954069c12e13883ee8b2929a57ac6a
https://github.com/qemu/qemu/commit/dbccd48df0954069c12e13883ee8b2929a57ac6a
Author: Wei Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/hvf/hvf.c
M target/i386/hvf/x86_emu.c
M target/i386/hvf/x86_emu.h
M target/i386/hvf/x86_task.c
M target/i386/hvf/x86hvf.h
Log Message:
-----------
target/i386/hvf: move and rename {load, store}_regs
They contain HVF specific code. Move them to a better location and
add "hvf_" prefix. Fix up all the call sites.
No functional change.
Signed-off-by: Wei Liu <[email protected]>
Link:
https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 99e5aaf9afeed3e0437f6dbc7672e3028d2b2f4b
https://github.com/qemu/qemu/commit/99e5aaf9afeed3e0437f6dbc7672e3028d2b2f4b
Author: Wei Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/hvf/hvf-i386.h
M target/i386/hvf/hvf.c
M target/i386/hvf/x86_emu.c
M target/i386/hvf/x86_emu.h
Log Message:
-----------
target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
This requires making raise_exception non-static. That function needs to be
renamed to avoid clashing with a function in TCG.
Mostly code movement. No functional change.
Signed-off-by: Wei Liu <[email protected]>
Link:
https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 646140dfebd42a9a9df8f15a22027b7efcb072cf
https://github.com/qemu/qemu/commit/646140dfebd42a9a9df8f15a22027b7efcb072cf
Author: Wei Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/hvf/x86_emu.c
Log Message:
-----------
target/i386/hvf: drop some dead code
Signed-off-by: Wei Liu <[email protected]>
Link:
https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: ac5699c5da51fa9d39bc964e81645953796f7ad1
https://github.com/qemu/qemu/commit/ac5699c5da51fa9d39bc964e81645953796f7ad1
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/qemu-api/src/qdev.rs
M rust/qemu-api/src/qom.rs
Log Message:
-----------
rust: add IsA bounds to QOM implementation traits
Check that the right bounds are provided to the qom_isa! macro
whenever the class is defined to implement a certain class.
This removes the need to add IsA<> bounds together with the
*Impl trait bounds.
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 3212da0033530ae896d31d90d5e81a772fc37088
https://github.com/qemu/qemu/commit/3212da0033530ae896d31d90d5e81a772fc37088
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/hw/char/pl011/src/device.rs
M rust/hw/timer/hpet/src/hpet.rs
M rust/qemu-api/src/sysbus.rs
Log Message:
-----------
rust: add SysBusDeviceImpl
The only function, right now, is to ensure that anything with a
SysBusDeviceClass class is a SysBusDevice.
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 4551f342fed66af7f5e2b099fa06f4007db356e6
https://github.com/qemu/qemu/commit/4551f342fed66af7f5e2b099fa06f4007db356e6
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/hw/char/pl011/src/device.rs
M rust/hw/timer/hpet/src/hpet.rs
M rust/qemu-api/src/qom.rs
M rust/qemu-api/tests/tests.rs
Log Message:
-----------
rust: qom: add ObjectImpl::CLASS_INIT
As shown in the PL011 device, the orphan rules required a manual
implementation of ClassInitImpl for anything not in the qemu_api crate;
this gets in the way of moving system emulation-specific code (including
DeviceClass, which as a blanket ClassInitImpl<DeviceClass> implementation)
into its own crate.
Make ClassInitImpl optional, at the cost of having to specify the CLASS_INIT
member by hand in every implementation of ObjectImpl. The next commits will
get rid of it, replacing all the "impl<T> ClassInitImpl<Class> for T" blocks
with a generic class_init<T> method on Class.
Right now the definition is always the same, but do not provide a default
as that will not be true once ClassInitImpl goes away.
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 567c0c41a6700be72eb9e040ba0b8d7bf0cc5919
https://github.com/qemu/qemu/commit/567c0c41a6700be72eb9e040ba0b8d7bf0cc5919
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/hw/char/pl011/src/device.rs
M rust/qemu-api/tests/tests.rs
Log Message:
-----------
rust: pl011, qemu_api tests: do not use ClassInitImpl
Outside the qemu_api crate, orphan rules make the usage of ClassInitImpl
unwieldy. Now that it is optional, do not use it.
For PL011Class, this makes it easier to provide a PL011Impl trait similar
to the ones in the qemu_api crate. The device id consts are moved there.
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: d556226d6965738e06a1d75faaf271b769bb5880
https://github.com/qemu/qemu/commit/d556226d6965738e06a1d75faaf271b769bb5880
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M rust/hw/char/pl011/src/device.rs
M rust/hw/timer/hpet/src/hpet.rs
M rust/qemu-api/src/qdev.rs
M rust/qemu-api/src/qom.rs
M rust/qemu-api/src/sysbus.rs
M rust/qemu-api/tests/tests.rs
Log Message:
-----------
rust: qom: get rid of ClassInitImpl
Complete the conversion from the ClassInitImpl trait to class_init() methods.
This will provide more freedom to split the qemu_api crate in separate parts.
Reviewed-by: Zhao Liu <[email protected]>
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 2152b4bfcd91d7d8b99cd502ed049b0ab8e38649
https://github.com/qemu/qemu/commit/2152b4bfcd91d7d8b99cd502ed049b0ab8e38649
Author: Zhao Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
i386/cpu: Support module level cache topology
Allow cache to be defined at the module level. This increases
flexibility for x86 users to customize their cache topology.
Signed-off-by: Zhao Liu <[email protected]>
Tested-by: Yongwei Ma <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 5ca9282d25157004601c520ed59dcb380177f728
https://github.com/qemu/qemu/commit/5ca9282d25157004601c520ed59dcb380177f728
Author: Zhao Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
i386/cpu: Update cache topology with machine's configuration
User will configure smp cache topology via -machine smp-cache.
For this case, update the x86 CPUs' cache topology with user's
configuration in MachineState.
Signed-off-by: Zhao Liu <[email protected]>
Tested-by: Yongwei Ma <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 90df2cac3700188acadd12948fdad8e9b1459646
https://github.com/qemu/qemu/commit/90df2cac3700188acadd12948fdad8e9b1459646
Author: Zhao Liu <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/i386/pc.c
M qemu-options.hx
Log Message:
-----------
i386/pc: Support cache topology in -machine for PC machine
Allow user to configure l1d, l1i, l2 and l3 cache topologies for PC
machine.
Additionally, add the document of "-machine smp-cache" in
qemu-options.hx.
Signed-off-by: Zhao Liu <[email protected]>
Tested-by: Yongwei Ma <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 47fc56f36d333263a5865caad306336e3e61e348
https://github.com/qemu/qemu/commit/47fc56f36d333263a5865caad306336e3e61e348
Author: Alireza Sanaee <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/core/machine-smp.c
M include/hw/boards.h
M target/i386/cpu.c
Log Message:
-----------
i386/cpu: add has_caches flag to check smp_cache configuration
Add has_caches flag to SMPCompatProps, which helps in avoiding
extra checks for every single layer of caches in x86 (and ARM in
future).
Signed-off-by: Alireza Sanaee <[email protected]>
Signed-off-by: Zhao Liu <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: 4044f46978ca6c55e5fcdda84310d7435c7c26ac
https://github.com/qemu/qemu/commit/4044f46978ca6c55e5fcdda84310d7435c7c26ac
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/riscv/cpu.c
Log Message:
-----------
target/riscv: remove unused macro DEFINE_CPU
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: aeb7969cba971472aba7a3bf1e0df1bcc1b6f44c
https://github.com/qemu/qemu/commit/aeb7969cba971472aba7a3bf1e0df1bcc1b6f44c
Author: Paolo Bonzini <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/riscv/cpu.c
M target/riscv/tcg/tcg-cpu.c
Log Message:
-----------
target/riscv: move 128-bit check to TCG realize
Besides removing non-declarative code in instance_init, this also fixes
an issue with query-cpu-model-expansion. Just invoking it for the
x-rv128 CPU model causes QEMU to exit immediately. With this patch it
is possible to do
{'execute': 'query-cpu-model-expansion',
'arguments':{'type': 'full', 'model': {'name': 'x-rv128'}}}
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: bb09b7bfd37024381970744c71646e0239428897
https://github.com/qemu/qemu/commit/bb09b7bfd37024381970744c71646e0239428897
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/core/machine.c
M system/device_tree-stub.c
M system/device_tree.c
Log Message:
-----------
hw/core/machine.c: Make -machine dumpdtb=file.dtb with no DTB an error
Currently if the user requests via -machine dumpdtb=file.dtb that we
dump the DTB, but the machine doesn't have a DTB, we silently ignore
the option. This is confusing to users, and is a legacy of the old
board-specific implementation of the option, where if the execution
codepath didn't go via a call to qemu_fdt_dumpdtb() we would never
handle the option.
Now we handle the option in one place in machine.c, we can provide
the user with a useful message if they asked us to dump a DTB when
none exists. qmp_dumpdtb() already produces this error; remove the
logic in handle_machine_dumpdtb() that was there specifically to
avoid hitting it.
While we're here, beef up the error message a bit with a hint, and
make it consistent about "an FDT" rather than "a FDT". (In the
qmp_dumpdtb() case this needs an ERRP_GUARD to make
error_append_hint() work when the caller passes error_fatal.)
Note that the three places where we might report "doesn't have an
FDT" are hit in different situations:
(1) in handle_machine_dumpdtb(), if CONFIG_FDT is not set: this is
because the QEMU binary was built without libfdt at all. The
build system will not let you build with a machine type that
needs an FDT but no libfdt, so here we know both that the machine
doesn't use FDT and that QEMU doesn't have the support:
(2) in the device_tree-stub.c qmp_dumpdtb(): this is used when
we had libfdt at build time but the target architecture didn't
enable any machines which did "select DEVICE_TREE", so here we
know that the machine doesn't use FDT.
(3) in qmp_dumpdtb(), if current_machine->fdt is NULL all we know
is that this machine never set it. That might be because it doesn't
use FDT, or it might be because the user didn't pass an FDT
on the command line and the machine doesn't autogenerate an FDT.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2733
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: 9b6e986e280f43e3df3baf7aae2069d599b5056c
https://github.com/qemu/qemu/commit/9b6e986e280f43e3df3baf7aae2069d599b5056c
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat-specialize.c.inc
M fpu/softfloat.c
M include/fpu/softfloat-helpers.h
M include/fpu/softfloat-types.h
M include/fpu/softfloat.h
M target/m68k/cpu.c
Log Message:
-----------
fpu: Make targets specify floatx80 default Inf at runtime
Currently we hardcode at compile time whether the floatx80 default
Infinity value has the explicit integer bit set or not (x86 sets it;
m68k does not). To be able to compile softfloat once for all targets
we'd like to move this setting to runtime.
Define a new FloatX80Behaviour enum which is a set of flags that
define the target's floatx80 handling. Initially we define just one
flag, for whether the default Infinity has the Integer bit set or
not, but we will expand this in future commits to cover the other
floatx80 target specifics that we currently make compile-time
settings.
Define a new function floatx80_default_inf() which returns the
appropriate default Infinity value of the given sign, and use it in
the code that was previously directly using the compile-time constant
floatx80_infinity_{low,high} values when packing an infinity into a
floatx80.
Since floatx80 is highly unlikely to be supported in any new
architecture, and the existing code is generally written as "default
to like x87, with an ifdef for m68k", we make the default value for
the floatx80 behaviour flags be "what x87 does". This means we only
need to change the m68k target to specify the behaviour flags.
(Other users of floatx80 are the Arm NWFPE emulation, which is
obsolete and probably not actually doing the right thing anyway, and
the PPC xsrqpxp insn. Making the default be "like x87" avoids our
needing to review and test for behaviour changes there.)
We will clean up the remaining uses of the floatx80_infinity global
constant in subsequent commits.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: e456d4465b630ab2eed08611c6193f0a880e0ea3
https://github.com/qemu/qemu/commit/e456d4465b630ab2eed08611c6193f0a880e0ea3
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/m68k/softfloat.c
Log Message:
-----------
target/m68k: Avoid using floatx80_infinity global const
The global const floatx80_infinity is (unlike all the other
float*_infinity values) target-specific, because whether the explicit
Integer bit is set or not varies between m68k and i386. We want to
be able to compile softfloat once for multiple targets, so we can't
continue to use a single global whose value needs to be different
between targets.
Replace the direct uses of floatx80_infinity in target/m68k with
calls to the new floatx80_default_inf() function.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 165ce008d734bc0024dabdbfd1c41738bc5b834f
https://github.com/qemu/qemu/commit/165ce008d734bc0024dabdbfd1c41738bc5b834f
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/i386/tcg/fpu_helper.c
Log Message:
-----------
target/i386: Avoid using floatx80_infinity global const
The global const floatx80_infinity is (unlike all the other
float*_infinity values) target-specific, because whether the explicit
Integer bit is set or not varies between m68k and i386. We want to
be able to compile softfloat once for multiple targets, so we can't
continue to use a single global whose value needs to be different
between targets.
Replace the direct uses of floatx80_infinity in target/i386 with
calls to the new floatx80_default_inf() function. Note that because
we can ask the function for either a negative or positive infinity,
we don't need to change the sign of a positive infinity via
floatx80_chs() for the negative-Inf case.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 9ea6d1f141426a7da91f1c7ba3d693472f0550a4
https://github.com/qemu/qemu/commit/9ea6d1f141426a7da91f1c7ba3d693472f0550a4
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M include/fpu/softfloat.h
M target/i386/tcg/fpu_helper.c
M target/m68k/fpu_helper.c
Log Message:
-----------
fpu: Pass float_status to floatx80_is_infinity()
Unlike the other float formats, whether a floatx80 value is
considered to be an Infinity is target-dependent. (On x86 if the
explicit integer bit is clear this is a "pseudo-infinity" and not a
valid infinity; m68k does not care about the value of the integer
bit.)
Currently we select this target-specific logic at compile time with
an ifdef. We're going to want to do this at runtime, so change the
floatx80_is_infinity() function to take a float_status.
This commit doesn't change any logic; we'll do that in the
next commit.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: 44eb32a9835fe2feb19503e93476eee602daee0b
https://github.com/qemu/qemu/commit/44eb32a9835fe2feb19503e93476eee602daee0b
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat-specialize.c.inc
M include/fpu/softfloat-types.h
M include/fpu/softfloat.h
M target/m68k/cpu.c
Log Message:
-----------
fpu: Make targets specify whether floatx80 Inf can have Int bit clear
In Intel terminology, a floatx80 Infinity with the explicit integer
bit clear is a "pseudo-infinity"; for x86 these are not valid
infinity values. m68k is looser and does not care whether the
Integer bit is set or clear in an infinity.
Move this setting to runtime rather than using an ifdef in
floatx80_is_infinity().
Since this was the last use of the floatx80_infinity global constant,
we remove it and its definition here.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 765fe845ccb953b77b1b7e0557b13a7b760067b0
https://github.com/qemu/qemu/commit/765fe845ccb953b77b1b7e0557b13a7b760067b0
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat.c
M include/fpu/softfloat.h
M target/i386/tcg/fpu_helper.c
Log Message:
-----------
fpu: Pass float_status to floatx80_invalid_encoding()
The definition of which floatx80 encodings are invalid is
target-specific. Currently we handle this with an ifdef, but we
would like to defer this decision to runtime. In preparation, pass a
float_status argument to floatx80_invalid_encoding().
We will change the implementation from ifdef to looking at
the status argument in the following commit.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Commit: a261d3e331ca06f4d92e689f2bee40d0a0cdee08
https://github.com/qemu/qemu/commit/a261d3e331ca06f4d92e689f2bee40d0a0cdee08
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M include/fpu/softfloat-types.h
M include/fpu/softfloat.h
M target/m68k/cpu.c
Log Message:
-----------
fpu: Make floatx80 invalid encoding settable at runtime
Because floatx80 has an explicit integer bit, this permits some
odd encodings where the integer bit is not set correctly for the
floating point value type. In In Intel terminology the
categories are:
exp == 0, int = 0, mantissa == 0 : zeroes
exp == 0, int = 0, mantissa != 0 : denormals
exp == 0, int = 1 : pseudo-denormals
0 < exp < 0x7fff, int = 0 : unnormals
0 < exp < 0x7fff, int = 1 : normals
exp == 0x7fff, int = 0, mantissa == 0 : pseudo-infinities
exp == 0x7fff, int = 1, mantissa == 0 : infinities
exp == 0x7fff, int = 0, mantissa != 0 : pseudo-NaNs
exp == 0x7fff, int = 1, mantissa == 0 : NaNs
The usual IEEE cases of zero, denormal, normal, inf and NaN are always valid.
x87 permits as input also pseudo-denormals.
m68k permits all those and also pseudo-infinities, pseudo-NaNs and unnormals.
Currently we have an ifdef in floatx80_invalid_encoding() to select
the x86 vs m68k behaviour. Add new floatx80_behaviour flags to
select whether pseudo-NaN and unnormal are valid, and use these
(plus the existing pseudo_inf_valid flag) to decide whether these
encodings are invalid at runtime.
We leave pseudo-denormals as always-valid, since both x86 and m68k
accept them.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 1e75d8247ff27a307781230898fbcb8fbb9a8298
https://github.com/qemu/qemu/commit/1e75d8247ff27a307781230898fbcb8fbb9a8298
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat-parts.c.inc
M fpu/softfloat.c
M include/fpu/softfloat-types.h
M target/m68k/cpu.c
Log Message:
-----------
fpu: Move m68k_denormal fmt flag into floatx80_behaviour
Currently we compile-time set an 'm68k_denormal' flag in the FloatFmt
for floatx80 for m68k. This controls our handling of what the Intel
documentation calls a "pseudo-denormal": a value where the exponent
field is zero and the explicit integer bit is set.
For x86, the x87 FPU is supposed to accept a pseudo-denormal as
input, but never generate one on output. For m68k, these values are
permitted on input and may be produced on output.
Replace the flag in the FloatFmt with a flag indicating whether the
float format has an explicit bit (which will be true for floatx80 for
all targets, and false for every other float type). Then we can gate
the handling of these pseudo-denormals on the setting of a
floatx80_behaviour flag.
As far as I can see from the code we don't actually handle the
x86-mandated "accept on input but don't generate" behaviour, because
the handling in partsN(canonicalize) looked at fmt->m68k_denormal.
So I have added TODO comments to that effect.
This commit doesn't change any behaviour for any target.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 2e01cfea0735889a1e0481fc783d621779439572
https://github.com/qemu/qemu/commit/2e01cfea0735889a1e0481fc783d621779439572
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat-specialize.c.inc
Log Message:
-----------
fpu: Always decide no_signaling_nans() at runtime
Currently we have a compile-time shortcut where we
return false from no_signaling_nans() on everything except
Xtensa, because we know that's the only target that
might ever set status->no_signaling_nans.
Remove the ifdef, so we always look at the status flag;
this has no behavioural change, but will be necessary
if we want to build softfloat once for all targets.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 3abed4d0eace62910e90c206cb9d5741c6095b12
https://github.com/qemu/qemu/commit/3abed4d0eace62910e90c206cb9d5741c6095b12
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat-specialize.c.inc
M target/hppa/fpu_helper.c
M target/sh4/cpu.c
Log Message:
-----------
fpu: Always decide snan_bit_is_one() at runtime
Currently we have a compile-time shortcut where we return a hardcode
value from snan_bit_is_one() on everything except MIPS, because we
know that's the only target that needs to change
status->no_signaling_nans at runtime.
Remove the ifdef, so we always look at the status flag. This means
we must update the two targets (HPPA and SH4) that were previously
hardcoded to return true so that they set the status flag correctly.
This has no behavioural change, but will be necessary if we want to
build softfloat once for all targets.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: c5d4173fcf04f6de9b9bb0959d1fdfc08254381a
https://github.com/qemu/qemu/commit/c5d4173fcf04f6de9b9bb0959d1fdfc08254381a
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/softfloat.c
Log Message:
-----------
fpu: Don't compile-time disable hardfloat for PPC targets
We happen to know that for the PPC target the FP status flags (and in
particular float_flag_inexact) will always be cleared before a
floating point operation, and so can_use_fpu() will always return
false. So we speed things up a little by forcing QEMU_NO_HARDFLOAT
to true on that target.
We would like to build softfloat once for all targets; that means
removing target-specific ifdefs. Remove the check for TARGET_PPC;
this won't change behaviour because can_use_fpu() will see that
float_flag_inexact is clear and take the softfloat path anyway.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 5d3462b4cde8bedb33362dab0a3ae94d403899b0
https://github.com/qemu/qemu/commit/5d3462b4cde8bedb33362dab0a3ae94d403899b0
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M fpu/meson.build
M fpu/softfloat.c
Log Message:
-----------
fpu: Build only once
Now we have removed all the target-specifics from the softfloat code,
we can switch to building it once for the whole system rather than
once per target.
Signed-off-by: Peter Maydell <[email protected]>
Tested-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Message-id: [email protected]
Commit: 1deb15c88ab3f1b0788b9e41b08217036eca3c91
https://github.com/qemu/qemu/commit/1deb15c88ab3f1b0788b9e41b08217036eca3c91
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/arm/tcg/meson.build
A target/arm/tcg/vfp_helper.c
M target/arm/vfp_helper.c
Log Message:
-----------
target/arm: Move TCG-only VFP code into tcg/ subdir
Most of the target/arm/vfp_helper.c file is purely TCG helper code,
guarded by #ifdef CONFIG_TCG. Move this into a new file in
target/arm/tcg/.
This leaves only the code relating to getting and setting the
FPCR/FPSR/FPSCR in the original file. (Some of this also is
TCG-only, but that needs more careful disentangling.)
Having two vfp_helper.c files might seem a bit confusing,
but once we've finished moving all the helper code out
of the old file we are going to rename it to vfp_fpscr.c.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: e34cfba5e8d7bd631398a09d658dee40b1aef085
https://github.com/qemu/qemu/commit/e34cfba5e8d7bd631398a09d658dee40b1aef085
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/arm/tcg/vfp_helper.c
M target/arm/vfp_helper.c
Log Message:
-----------
target/arm: Move FPSCR get/set helpers to tcg/vfp_helper.c
Currently the helper_vfp_get_fpscr() and helper_vfp_set_fpscr()
functions do the actual work of updating the FPSCR, and we have
wrappers vfp_get_fpscr() and vfp_set_fpscr() which we use for calls
from other QEMU C code.
Flip these around so that it is vfp_get_fpscr() and vfp_set_fpscr()
which do the actual work, and helper_vfp_get_fpscr() and
helper_vfp_set_fpscr() which are the wrappers; this allows us to move
them to tcg/vfp_helper.c.
Since this is the last HELPER() we had in arm/vfp_helper.c, we can
drop the include of helper-proto.h.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: b9d3dc45532e696f5ee566edd227a4f46bad0f35
https://github.com/qemu/qemu/commit/b9d3dc45532e696f5ee566edd227a4f46bad0f35
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/arm/internals.h
M target/arm/tcg-stubs.c
M target/arm/tcg/vfp_helper.c
M target/arm/vfp_helper.c
Log Message:
-----------
target/arm: Move softfloat specific FPCR/FPSR handling to tcg/
The softfloat (i.e. TCG) specific handling for the FPCR
and FPSR is abstracted behind five functions:
arm_set_default_fp_behaviours
arm_set_ah_fp_behaviours
vfp_get_fpsr_from_host
vfp_clear_float_status_exc_flags
vfp_set_fpsr_to_host
Currently we rely on the first two calling softfloat functions that
work even in a KVM-only compile because they're defined as inline in
the softfloat header file, and we provide stub versions of the last
three in arm/vfp_helper.c if CONFIG_TCG isn't defined.
Move the softfloat-specific versions of these functions to
tcg/vfp_helper.c, and provide the non-TCG stub versions in
tcg-stubs.c.
This lets us drop the softfloat header include and the last
set of CONFIG_TCG ifdefs from arm/vfp_helper.c.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: cb8bb8472ef83d8c8c6beac37d6db47ab3b68e18
https://github.com/qemu/qemu/commit/cb8bb8472ef83d8c8c6beac37d6db47ab3b68e18
Author: Peter Maydell <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/arm/meson.build
A target/arm/vfp_fpscr.c
R target/arm/vfp_helper.c
Log Message:
-----------
target/arm: Rename vfp_helper.c to vfp_fpscr.c
The vfp_helper.c in the target/arm directory now only has
code for handling FPSCR/FPCR/FPSR in it, and no helper
functions. Rename it to vfp_fpscr.c; this helps keep it
distinct from tcg/vfp_helper.c.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Commit: fd207677a83087454b8afef31651985a1df0d2dd
https://github.com/qemu/qemu/commit/fd207677a83087454b8afef31651985a1df0d2dd
Author: Joelle van Dyne <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/arm/hvf/hvf.c
Log Message:
-----------
target/arm/hvf: Disable SME feature
macOS 15.2's Hypervisor.framework exposes SME feature on M4 Macs.
However, QEMU's hvf accelerator code does not properly support it
yet, causing QEMU to fail to start when hvf accelerator is used on
these systems, with the error message:
qemu-aarch64-softmmu: cannot disable sme4224
All SME vector lengths are disabled.
With SME enabled, at least one vector length must be enabled.
Ideally we would have SME support on these hosts; however, until that
point, we must suppress the SME feature in the ID registers, so that
users can at least run non-SME guests.
Cc: [email protected]
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2665
Signed-off-by: Joelle van Dyne <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
[PMM: expanded commit message, comment]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 12c365315ab25d364cff24dfeea8d7ff1e752b9f
https://github.com/qemu/qemu/commit/12c365315ab25d364cff24dfeea8d7ff1e752b9f
Author: Joelle van Dyne <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M target/arm/hvf/hvf.c
Log Message:
-----------
target/arm/hvf: sign extend the data for a load operation when SSE=1
In the syndrome value for a data abort, bit 21 is SSE, which is
set to indicate that the abort was on a sign-extending load. When
we handle the data abort from the guest via address_space_read(),
we forgot to handle this and so would return the wrong value if
the guest did a sign-extending load to an MMIO region. Add the
sign-extension of the returned data.
Cc: [email protected]
Signed-off-by: Joelle van Dyne <[email protected]>
Message-id: [email protected]
[PMM: Drop an unnecessary check on 'len'; expand commit message]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 2cac20cbf7b01e9a4e404db2ff9bee09ee26f315
https://github.com/qemu/qemu/commit/2cac20cbf7b01e9a4e404db2ff9bee09ee26f315
Author: Pierrick Bouvier <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/misc/npcm_clk.c
Log Message:
-----------
hw/misc/npcm_clk: fix buffer-overflow
Regression introduced by cf76c4
(hw/misc: Add nr_regs and cold_reset_values to NPCM CLK)
cold_reset_values has a different size, depending on device used
(NPCM7xx vs NPCM8xx). However, s->regs has a fixed size, which matches
NPCM8xx. Thus, when initializing a NPCM7xx, we go past cold_reset_values
ending.
Report by asan:
==2066==ERROR: AddressSanitizer: global-buffer-overflow on address
0x55d68a3e97f0 at pc 0x7fcaf2b2d14b bp 0x7ffff0cc3890 sp 0x7ffff0cc3040
READ of size 196 at 0x55d68a3e97f0 thread T0
#0 0x7fcaf2b2d14a in __interceptor_memcpy
../../../../src/libsanitizer/sanitizer_common/sanitizer_common_interceptors.inc:827
#1 0x55d688447e0d in memcpy
/usr/include/x86_64-linux-gnu/bits/string_fortified.h:29
#2 0x55d688447e0d in npcm_clk_enter_reset ../hw/misc/npcm_clk.c:968
#3 0x55d6899b7213 in resettable_phase_enter ../hw/core/resettable.c:136
#4 0x55d6899a1ef7 in bus_reset_child_foreach ../hw/core/bus.c:97
#5 0x55d6899b717d in resettable_child_foreach ../hw/core/resettable.c:92
#6 0x55d6899b717d in resettable_phase_enter ../hw/core/resettable.c:129
#7 0x55d6899b4ead in resettable_container_child_foreach
../hw/core/resetcontainer.c:54
#8 0x55d6899b717d in resettable_child_foreach ../hw/core/resettable.c:92
#9 0x55d6899b717d in resettable_phase_enter ../hw/core/resettable.c:129
#10 0x55d6899b7bfa in resettable_assert_reset ../hw/core/resettable.c:55
#11 0x55d6899b8666 in resettable_reset ../hw/core/resettable.c:45
#12 0x55d688d15cd2 in qemu_system_reset ../system/runstate.c:527
#13 0x55d687fc5edd in qdev_machine_creation_done ../hw/core/machine.c:1738
#14 0x55d688d209bd in qemu_machine_creation_done ../system/vl.c:2779
#15 0x55d688d209bd in qmp_x_exit_preconfig ../system/vl.c:2807
#16 0x55d688d281fb in qemu_init ../system/vl.c:3838
#17 0x55d687ceab12 in main ../system/main.c:68
#18 0x7fcaef006249 (/lib/x86_64-linux-gnu/libc.so.6+0x27249)
#19 0x7fcaef006304 in __libc_start_main
(/lib/x86_64-linux-gnu/libc.so.6+0x27304)
#20 0x55d687cf0010 in _start
(/home/runner/work/qemu-ci/qemu-ci/build/qemu-system-arm+0x371c010)
0x55d68a3e97f0 is located 0 bytes to the right of global variable
'npcm7xx_cold_reset_values' defined in '../hw/misc/npcm_clk.c:134:23'
(0x55d68a3e9780) of size 112
Impacted tests:
Summary of Failures:
check:
2/747 qemu:qtest+qtest-aarch64 / qtest-aarch64/qom-test
ERROR 9.28s killed by signal 6 SIGABRT
4/747 qemu:qtest+qtest-arm / qtest-arm/qom-test
ERROR 7.82s killed by signal 6 SIGABRT
32/747 qemu:qtest+qtest-aarch64 / qtest-aarch64/device-introspect-test
ERROR 10.91s killed by signal 6 SIGABRT
35/747 qemu:qtest+qtest-arm / qtest-arm/device-introspect-test
ERROR 11.33s killed by signal 6 SIGABRT
114/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_pwm-test
ERROR 0.98s killed by signal 6 SIGABRT
115/747 qemu:qtest+qtest-aarch64 / qtest-aarch64/test-hmp
ERROR 2.95s killed by signal 6 SIGABRT
117/747 qemu:qtest+qtest-arm / qtest-arm/test-hmp
ERROR 2.54s killed by signal 6 SIGABRT
151/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_watchdog_timer-test
ERROR 0.96s killed by signal 6 SIGABRT
247/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_adc-test
ERROR 0.96s killed by signal 6 SIGABRT
248/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_gpio-test
ERROR 1.05s killed by signal 6 SIGABRT
249/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_rng-test
ERROR 0.97s killed by signal 6 SIGABRT
250/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_sdhci-test
ERROR 0.97s killed by signal 6 SIGABRT
251/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_smbus-test
ERROR 0.89s killed by signal 6 SIGABRT
252/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_timer-test
ERROR 1.09s killed by signal 6 SIGABRT
253/747 qemu:qtest+qtest-arm / qtest-arm/npcm_gmac-test
ERROR 1.12s killed by signal 6 SIGABRT
255/747 qemu:qtest+qtest-arm / qtest-arm/npcm7xx_emc-test
ERROR 1.05s killed by signal 6 SIGABRT
check-functional:
22/203 qemu:func-thorough+func-arm-thorough+thorough / func-arm-arm_quanta_gsj
ERROR 0.79s exit status 1
38/203 qemu:func-quick+func-aarch64 / func-aarch64-migration
ERROR 1.97s exit status 1
45/203 qemu:func-quick+func-arm / func-arm-migration
ERROR 1.90s exit status 1
Fixes: cf76c4e174e1 ("hw/misc: Add nr_regs and cold_reset_values to NPCM CLK")
Signed-off-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Hao Wu <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: b513766ee968dbfca31034b185f0a0fcf99f4269
https://github.com/qemu/qemu/commit/b513766ee968dbfca31034b185f0a0fcf99f4269
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/usb/hcd-dwc3.c
M include/hw/usb/hcd-dwc3.h
Log Message:
-----------
hw/usb/hcd-dwc3: Align global registers size with Linux
While at it add missing GUSB2RHBCTL register as found in i.MX 8M Plus reference
manual.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: faa2150a527b1919646316dba268b71ced8762a6
https://github.com/qemu/qemu/commit/faa2150a527b1919646316dba268b71ced8762a6
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/pci-host/designware.c
M include/hw/pci-host/designware.h
Log Message:
-----------
hw/pci-host/designware: Prevent device attachment on internal PCIe root bus
On the real device, the PCIe root bus is only connected to a PCIe bridge and
does not allow for direct attachment of devices. Doing so in QEMU results in no
PCI devices being detected by Linux. Instead, PCI devices should plug into the
secondary PCIe bus spawned by the internal PCIe bridge.
Unfortunately, QEMU defaults to plugging devices into the PCIe root bus. To work
around this, every PCI device created on the command line needs an extra
`bus=dw-pcie` option which is error prone. Fix that by marking the PCIe root bus
as full which makes QEMU decend into the child PCIe bus.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 0f520f0a9d9516fb3563a9b69c820ac73d2017aa
https://github.com/qemu/qemu/commit/0f520f0a9d9516fb3563a9b69c820ac73d2017aa
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/gpio/Kconfig
M hw/misc/Kconfig
Log Message:
-----------
hw/gpio/pca955*: Move Kconfig switches next to implementations
The move of the Kconfig bits to hw/gpio is fixing a bug in 6328d8ffa6cb9d
("misc/pca955*: Move models under hw/gpio"), which moved the code but forgot to
move the Kconfig sections.
Fixes: 6328d8ffa6cb9d "misc/pca955*: Move models under hw/gpio"
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: a4eefc69b23713c4e5981d9d91a6e15dfd4496fe
https://github.com/qemu/qemu/commit/a4eefc69b23713c4e5981d9d91a6e15dfd4496fe
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M MAINTAINERS
A docs/system/arm/imx8mp-evk.rst
M docs/system/target-arm.rst
M hw/arm/Kconfig
A hw/arm/fsl-imx8mp.c
A hw/arm/imx8mp-evk.c
M hw/arm/meson.build
A include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm: Add i.MX 8M Plus EVK board
As a first step, implement the bare minimum: CPUs, RAM, interrupt controller,
serial. All other devices of the A53 memory map are represented as
TYPE_UNIMPLEMENTED_DEVICE, i.e. the whole memory map is provided. This allows
for running Linux without it crashing due to invalid memory accesses.
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
[PMM: drop 'static const' from serial_table[] definition to avoid
compile failure on GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 86c2dff9552ad5a9b2febf329a2dbd2620bc2145
https://github.com/qemu/qemu/commit/86c2dff9552ad5a9b2febf329a2dbd2620bc2145
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M MAINTAINERS
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M hw/misc/Kconfig
A hw/misc/imx8mp_analog.c
A hw/misc/imx8mp_ccm.c
M hw/misc/meson.build
M include/hw/arm/fsl-imx8mp.h
A include/hw/misc/imx8mp_analog.h
A include/hw/misc/imx8mp_ccm.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Implement clock tree
Fixes quite a few stack traces during the Linux boot process. Also provides the
clocks for devices added later, e.g. enet1.
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: 487967bed65083db33561edc1255ced422bfbff5
https://github.com/qemu/qemu/commit/487967bed65083db33561edc1255ced422bfbff5
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add SNVS
SNVS contains an RTC which allows Linux to deal correctly with time. This is
particularly useful when handling persistent storage which will be done in the
next patch.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: a81193c3e9a8220862120d8d4114191f3899f4b3
https://github.com/qemu/qemu/commit/a81193c3e9a8220862120d8d4114191f3899f4b3
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M hw/arm/imx8mp-evk.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add USDHC storage controllers
The USDHC emulation allows for running real-world images such as those generated
by Buildroot. Convert the board documentation accordingly instead of running a
Linux kernel with ephemeral storage.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop 'static const' from usdhc_table[] for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: fd1deb5301f89eb86c0eecadb670beb98aa74ac5
https://github.com/qemu/qemu/commit/fd1deb5301f89eb86c0eecadb670beb98aa74ac5
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M MAINTAINERS
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M hw/pci-host/Kconfig
A hw/pci-host/fsl_imx8m_phy.c
M hw/pci-host/meson.build
M include/hw/arm/fsl-imx8mp.h
A include/hw/pci-host/fsl_imx8m_phy.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add PCIe support
Linux checks for the PLLs in the PHY to be locked, so implement a model
emulating that.
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Peter Maydell <[email protected]>
Commit: a17c1d932ec6ae1a3364eaf34c0660f01f806267
https://github.com/qemu/qemu/commit/a17c1d932ec6ae1a3364eaf34c0660f01f806267
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add GPIO controllers
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop static const from gpio_table for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 764f18afb2b749a9dcfd37bac5709e7a7bcd2589
https://github.com/qemu/qemu/commit/764f18afb2b749a9dcfd37bac5709e7a7bcd2589
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add I2C controllers
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop static const from i2c_table for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 06908a84f036d7cefb834f8d67cf8b80a1791838
https://github.com/qemu/qemu/commit/06908a84f036d7cefb834f8d67cf8b80a1791838
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add SPI controllers
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop static const from spi_table for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 1ac21eb8fbb0297716a6c525e91196a247302b2b
https://github.com/qemu/qemu/commit/1ac21eb8fbb0297716a6c525e91196a247302b2b
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add watchdog support
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop static const from wdog_table for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: f8b26121762c17af9869b0ec7ccbda6df4ea37f8
https://github.com/qemu/qemu/commit/f8b26121762c17af9869b0ec7ccbda6df4ea37f8
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M hw/timer/imx_gpt.c
M include/hw/arm/fsl-imx8mp.h
M include/hw/timer/imx_gpt.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Implement general purpose timers
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop static const from gpt_attrs for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 0c105b261551a9b9fed086a7b9ecd0b6d6063bc4
https://github.com/qemu/qemu/commit/0c105b261551a9b9fed086a7b9ecd0b6d6063bc4
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M hw/arm/imx8mp-evk.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add Ethernet controller
The i.MX 8M Plus SoC actually has two ethernet controllers, the usual ENET one
and a Designware one. There is no device model for the latter, so only add the
ENET one.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 4226c39fea1490060163339ae45500bda1b1be05
https://github.com/qemu/qemu/commit/4226c39fea1490060163339ae45500bda1b1be05
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M docs/system/arm/imx8mp-evk.rst
M hw/arm/Kconfig
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add USB support
Split the USB MMIO regions to better keep track of the implemented vs.
unimplemented regions.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
[PMM: drop "static const" from usb_table for GCC 7.5]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 1aaf3478684ff1cd02d1b36c32a00bfac9a5dbd5
https://github.com/qemu/qemu/commit/1aaf3478684ff1cd02d1b36c32a00bfac9a5dbd5
Author: Bernhard Beschow <[email protected]>
Date: 2025-02-25 (Tue, 25 Feb 2025)
Changed paths:
M hw/arm/fsl-imx8mp.c
M include/hw/arm/fsl-imx8mp.h
Log Message:
-----------
hw/arm/fsl-imx8mp: Add on-chip RAM
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Bernhard Beschow <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
Commit: 006453f4003aa376086aa1faa13f96e624fdc940
https://github.com/qemu/qemu/commit/006453f4003aa376086aa1faa13f96e624fdc940
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/functional/replay_kernel.py
Log Message:
-----------
tests/functional: Provide a proper name for the VMs in the replay tests
With a proper name the log files get a more meaningful name.
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 6e52e84df990755b5e5cb6e9804c6c4e567adb52
https://github.com/qemu/qemu/commit/6e52e84df990755b5e5cb6e9804c6c4e567adb52
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_xtensa_replay.py
Log Message:
-----------
tests/functional: Convert the xtensa replay test to the functional framework
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: a14dfd93b55cb9545a510ac0e008479ada25ef94
https://github.com/qemu/qemu/commit/a14dfd93b55cb9545a510ac0e008479ada25ef94
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_sparc_replay.py
Log Message:
-----------
tests/functional: Convert the sparc replay avocado test
While we're at it, change the machine from SS-20 to SS-10 to
increase the test coverage a little bit (SS-20 is already
tested in the test_sparc_sun4m.py file).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 9917e06cd24dc260467aeccc1d1b9b6c15a0a0d8
https://github.com/qemu/qemu/commit/9917e06cd24dc260467aeccc1d1b9b6c15a0a0d8
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_ppc_replay.py
Log Message:
-----------
tests/functional: Convert the 32-bit ppc replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 52ec5f51996b5669fadaabb336dddfec77561941
https://github.com/qemu/qemu/commit/52ec5f51996b5669fadaabb336dddfec77561941
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_or1k_replay.py
Log Message:
-----------
tests/functional: Convert the or1k replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 221620b79e8f380a3a3d65bddde067ad284d08aa
https://github.com/qemu/qemu/commit/221620b79e8f380a3a3d65bddde067ad284d08aa
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_ppc64_replay.py
Log Message:
-----------
tests/functional: Convert the ppc64 replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 6674fa9c345d95f0d15b64d3d553334e773255d7
https://github.com/qemu/qemu/commit/6674fa9c345d95f0d15b64d3d553334e773255d7
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_microblaze_replay.py
Log Message:
-----------
tests/functional: Convert the microblaze replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: ec971d8554f620fda648d681467b1e10c086a8aa
https://github.com/qemu/qemu/commit/ec971d8554f620fda648d681467b1e10c086a8aa
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_m68k_replay.py
Log Message:
-----------
tests/functional: Convert the m68k replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 8a145225c296006efc28c4c4cf90b9e0b334ec87
https://github.com/qemu/qemu/commit/8a145225c296006efc28c4c4cf90b9e0b334ec87
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_arm_replay.py
Log Message:
-----------
tests/functional: Convert the arm replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 7472862965f77d10b44eba0d9efa9cfb47c94651
https://github.com/qemu/qemu/commit/7472862965f77d10b44eba0d9efa9cfb47c94651
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_alpha_replay.py
Log Message:
-----------
tests/functional: Convert the alpha replay avocado tests
Put the tests into a separate file now (since in the functional
framework, each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 504248520316ac72f11855e14766e6658ec486d4
https://github.com/qemu/qemu/commit/504248520316ac72f11855e14766e6658ec486d4
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_s390x_replay.py
Log Message:
-----------
tests/functional: Convert the s390x replay avocado tests
Put the tests into a separate file now (in the functional framework,
each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 4d75a3743a04a4a3db7f339eee159068fa8757b6
https://github.com/qemu/qemu/commit/4d75a3743a04a4a3db7f339eee159068fa8757b6
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_aarch64_replay.py
Log Message:
-----------
tests/functional: Convert the aarch64 replay avocado tests
Put the tests into a separate file now (in the functional framework,
each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Commit: 0f31f0f53c45e248b1d361699210019ec867c22b
https://github.com/qemu/qemu/commit/0f31f0f53c45e248b1d361699210019ec867c22b
Author: Thomas Huth <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
A tests/functional/test_x86_64_replay.py
Log Message:
-----------
tests/functional: Convert the x86_64 replay avocado tests
Put the tests into a separate file now (in the functional framework,
each file is run with one specific qemu-system-* binary).
Signed-off-by: Thomas Huth <[email protected]
Message-ID: <[email protected]>
Commit: fe95724da2180681b7d78e9c2b9fd8438023f9ce
https://github.com/qemu/qemu/commit/fe95724da2180681b7d78e9c2b9fd8438023f9ce
Author: Peter Maydell <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/functional/meson.build
M tests/functional/test_arm_sx1.py
Log Message:
-----------
tests/functional: Bump some arm test timeouts
On my local machine, for a debug build, sbsaref_alpine takes
nearly 900s:
$ (cd build/x86 && ./pyvenv/bin/meson test --setup thorough --suite
func-thorough func-aarch64-aarch64_sbsaref_alpine
)
1/1 qemu:func-thorough+func-aarch64-thorough+thorough /
func-aarch64-aarch64_sbsaref_alpine
OK 896.90s
arm_aspeed_rainier can also run close to its current timeout:
6/44 qemu:func-thorough+func-arm-thorough+thorough /
func-arm-arm_aspeed_rainier
OK 215.75s
and arm_aspeed_ast2500 and arm_aspeed_ast2600 can go over:
13/44 qemu:func-thorough+func-arm-thorough+thorough /
func-arm-arm_aspeed_ast2600
OK 792.94s
27/44 qemu:func-thorough+func-arm-thorough+thorough /
func-arm-arm_aspeed_ast2500
TIMEOUT 480.01s
The sx1 test fails not on the overall meson timeout but on the
60 second timeout in some of the subtests.
Bump all these timeouts up a bit.
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: d5d028eee38d4107821c0d2cfdb0dd04b9ba5ca3
https://github.com/qemu/qemu/commit/d5d028eee38d4107821c0d2cfdb0dd04b9ba5ca3
Author: Daniel P. Berrangé <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M .gitlab-ci.d/check-dco.py
M .gitlab-ci.d/check-patch.py
Log Message:
-----------
gitlab: use --refetch in check-patch/check-dco jobs
When gitlab initializes the repo checkout for a CI job, it will have
done a shallow clone with only partial history. Periodically the objects
that are omitted cause trouble with the check-patch/check-dco jobs. This
is exhibited as reporting strange errors being unable to fetch certain
objects that are known to exist.
Passing the --refetch flag to 'git fetch' causes it to not assume the
local checkout has all common objects and thus re-fetch everything that
is needed. This appears to solve the check-patch/check-dco job failures.
Signed-off-by: Daniel P. Berrangé <[email protected]>
Acked-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Thomas Huth <[email protected]>
Commit: 72cdd672e18c486db7c54a7b33c8b4fe7a0026e6
https://github.com/qemu/qemu/commit/72cdd672e18c486db7c54a7b33c8b4fe7a0026e6
Author: Cédric Le Goater <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M tests/functional/test_ppc64_e500.py
Log Message:
-----------
tests/functional: Replace the ppc64 e500 advent calendar test
Replace the advent calendar test with a buildroot image built with
qemu_ppc64_e5500_defconfig. Unlike the advent calendar image, this
newer buildroot image supports networking, too. Thus boot a ppce500
machine from kernel and disk, test network and poweroff.
Add '-no-shutdown' to the command line to avoid exiting from QEMU
as it seems to bother the functional framework.
Signed-off-by: Cédric Le Goater <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
[thuth: Add some wording about network support to the commit message]
Signed-off-by: Thomas Huth <[email protected]>
Commit: 5d20aa540b6991c0dbeef933d2055e5372f52e0e
https://github.com/qemu/qemu/commit/5d20aa540b6991c0dbeef933d2055e5372f52e0e
Author: EwanHai <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M target/i386/cpu.h
Log Message:
-----------
target/i386: Add support for Zhaoxin CPU vendor identification
Zhaoxin currently uses two vendors: "Shanghai" and "Centaurhauls".
It is important to note that the latter now belongs to Zhaoxin. Therefore,
this patch replaces CPUID_VENDOR_VIA with CPUID_VENDOR_ZHAOXIN1.
The previous CPUID_VENDOR_VIA macro was only defined but never used in
QEMU, making this change straightforward.
Additionally, the IS_ZHAOXIN_CPU macro has been added to simplify the
checks for Zhaoxin CPUs.
Signed-off-by: EwanHai <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: c0799e8b003713e07b546faba600363eccd179ee
https://github.com/qemu/qemu/commit/c0799e8b003713e07b546faba600363eccd179ee
Author: EwanHai <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M target/i386/cpu.h
Log Message:
-----------
target/i386: Add CPUID leaf 0xC000_0001 EDX definitions
Add new CPUID feature flags for various Zhaoxin PadLock extensions.
These definitions will be used for Zhaoxin CPU models.
Signed-off-by: EwanHai <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: ff04bc1ac478656e5d6a255bf4069edb3f55bc58
https://github.com/qemu/qemu/commit/ff04bc1ac478656e5d6a255bf4069edb3f55bc58
Author: EwanHai <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
target/i386: Introduce Zhaoxin Yongfeng CPU model
Introduce support for the Zhaoxin Yongfeng CPU model.
The Zhaoxin Yongfeng CPU is Zhaoxin's latest server CPU.
This new cpu model ensure that QEMU can correctly emulate the Zhaoxin
Yongfeng CPU, providing accurate functionality and performance characteristics.
Signed-off-by: EwanHai <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: a4e749780bd20593c0c386612a51bf4d64a80132
https://github.com/qemu/qemu/commit/a4e749780bd20593c0c386612a51bf4d64a80132
Author: EwanHai <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M target/i386/cpu.c
Log Message:
-----------
target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs
Zhaoxin CPUs (including vendors "Shanghai" and "Centaurhauls") handle the
CMPLegacy bit similarly to Intel CPUs. Therefore, this commit masks the
CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs, just as it is done
for Intel CPUs.
AMD uses the CMPLegacy bit (CPUID[0x80000001].ECX.bit1) along with other CPUID
information to enumerate platform topology (e.g., the number of logical
processors per package). However, for Intel and other CPUs that follow Intel's
behavior, CPUID[0x80000001].ECX.bit1 is reserved.
- Impact on Intel and similar CPUs:
This change has no effect on Intel and similar CPUs, as the goal is to
accurately emulate CPU CPUID information.
- Impact on Linux Guests running on Intel (and similar) vCPUs:
During boot, Linux checks if the CPU supports Hyper-Threading. For the Linux
kernel before v6.9, if it detects X86_FEATURE_CMP_LEGACY, it assumes
Hyper-Threading is not supported. For Intel and similar vCPUs, if the
CMPLegacy bit is not masked in CPUID[0x80000001].ECX, Linux will incorrectly
assume that Hyper-Threading is not supported, even if the vCPU does support it.
Signed-off-by: EwanHai <[email protected]>
Reviewed-by: Zhao Liu <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Paolo Bonzini <[email protected]>
Commit: ad1e6843632555c771dda6a9425930fa25b71fb3
https://github.com/qemu/qemu/commit/ad1e6843632555c771dda6a9425930fa25b71fb3
Author: Konstantin Kostiuk <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M qga/commands-posix.c
M qga/commands-win32.c
Log Message:
-----------
qga: Add log to guest-fsfreeze-thaw command
Reviewed-by: Daniel P. Berrangé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Konstantin Kostiuk <[email protected]>
Commit: 5b567c21c6d517beeb1087399f733662d7e8ff62
https://github.com/qemu/qemu/commit/5b567c21c6d517beeb1087399f733662d7e8ff62
Author: Michal Privoznik <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M qga/main.c
Log Message:
-----------
qga: Invert logic on return value in main()
Current logic on return value ('ret' variable) in main() is error
prone. The variable is initialized to EXIT_SUCCESS and then set
to EXIT_FAILURE on error paths. This makes it very easy to forget
to set the variable to indicate error when adding new error path,
as is demonstrated by handling of initialize_agent() failure.
It's simply lacking setting of the variable.
There's just one case where success should be indicated: when
dumping the config ('-D' cmd line argument).
To resolve this, initialize the variable to failure value and set
it explicitly to success value in that one specific case.
Signed-off-by: Michal Privoznik <[email protected]>
Reviewed-by: Ján Tomko <[email protected]>
Reviewed-by: Konstantin Kostiuk <[email protected]>
Message-ID:
<8a28265f50177a8dc4c10fcf4146e85a7fd748ee.1736261360.git.mpriv...@redhat.com>
Signed-off-by: Konstantin Kostiuk <[email protected]>
Commit: c6f5dd7ac8ef62dcdec4cdeda1467c658161afff
https://github.com/qemu/qemu/commit/c6f5dd7ac8ef62dcdec4cdeda1467c658161afff
Author: Michal Privoznik <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M qga/main.c
Log Message:
-----------
qga: Don't daemonize before channel is initialized
If the agent is set to daemonize but for whatever reason fails to
init the channel, the error message is lost. Worse, the agent
daemonizes needlessly and returns success. For instance:
# qemu-ga -m virtio-serial \
-p /dev/nonexistent_device \
-f /run/qemu-ga.pid \
-t /run \
-d
# echo $?
0
This makes it needlessly hard for init scripts to detect a
failure in qemu-ga startup. Though, they shouldn't pass '-d' in
the first place.
Let's open the channel first and only after that become a daemon.
Related bug: https://bugs.gentoo.org/810628
Signed-off-by: Michal Privoznik <[email protected]>
Reviewed-by: Ján Tomko <[email protected]>
Reviewed-by: Konstantin Kostiuk <[email protected]>
Message-ID:
<7a42b0cbda5c7e01cf76bc1b29a1210cd018fa78.1736261360.git.mpriv...@redhat.com>
Signed-off-by: Konstantin Kostiuk <[email protected]>
Commit: 6ccca4b6bb9f994cc04e71004e1767a3476d2b23
https://github.com/qemu/qemu/commit/6ccca4b6bb9f994cc04e71004e1767a3476d2b23
Author: Klaus Jensen <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M hw/nvme/ns.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
hw/nvme: rework csi handling
The controller incorrectly allows a zoned namespace to be attached even
if CS.CSS is configured to only support the NVM command set for I/O
queues.
Rework handling of namespace command sets in general by attaching
supported namespaces when the controller is started instead of, like
now, statically when realized.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: 304babd9401d8ce8fe139a70fe464332eef2cee0
https://github.com/qemu/qemu/commit/304babd9401d8ce8fe139a70fe464332eef2cee0
Author: Klaus Jensen <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
Log Message:
-----------
hw/nvme: only set command abort requested when cancelled due to Abort
The Command Abort Requested status code should only be set if the
command was explicitly cancelled due to an Abort command. Or, in the
case the cancel was due to Submission Queue deletion, set the status
code to Command Aborted due to SQ Deletion.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: 6fc39228ffe9d54388f6d1080b502634df13bb72
https://github.com/qemu/qemu/commit/6fc39228ffe9d54388f6d1080b502634df13bb72
Author: Klaus Jensen <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
M include/block/nvme.h
Log Message:
-----------
hw/nvme: set error status code explicitly for misc commands
The nvme_aio_err() does not handle Verify, Compare, Copy and other misc
commands and defaults to setting the error status code to Internal
Device Error. For some of these commands, we know better, so set it
explicitly.
For the commands using the nvme_misc_cb() callback (Copy, Flush, ...),
if no status code has explicitly been set by the lower handlers, default
to Internal Device Error as previously.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: cad58ada8f104bf342097a7a683ef594ac949c8d
https://github.com/qemu/qemu/commit/cad58ada8f104bf342097a7a683ef594ac949c8d
Author: Klaus Jensen <[email protected]>
Date: 2025-02-26 (Wed, 26 Feb 2025)
Changed paths:
M hw/nvme/ctrl.c
Log Message:
-----------
hw/nvme: remove nvme_aio_err()
nvme_rw_complete_cb() is the only remaining user of nvme_aio_err(), so
open code the status code setting instead.
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>
Commit: fa4d79c64dae03ffa269e42e21822453856618b7
https://github.com/qemu/qemu/commit/fa4d79c64dae03ffa269e42e21822453856618b7
Author: Daniel P. Berrangé <[email protected]>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M scripts/checkpatch.pl
Log Message:
-----------
scripts: mandate that new files have SPDX-License-Identifier
Going forward we want all newly created source files to have an
SPDX-License-Identifier tag present.
Initially mandate this for C, Python, Perl, Shell source files,
as well as JSON (QAPI) and Makefiles, while encouraging users
to consider it for other file types.
Reviewed-by: Brian Cain <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Daniel P. Berrangé <[email protected]>
Commit: 2b96c1a4931e3b4e0294761c16759bcbb2652df4
https://github.com/qemu/qemu/commit/2b96c1a4931e3b4e0294761c16759bcbb2652df4
Author: Daniel P. Berrangé <[email protected]>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M scripts/checkpatch.pl
Log Message:
-----------
scripts: validate SPDX license choices
We expect all new code to be contributed with the "GPL-2.0-or-later"
license tag. Divergence is permitted if the new file is derived from
pre-existing code under a different license, whether from elsewhere
in QEMU codebase, or outside.
Issue a warning if the declared license is not "GPL-2.0-or-later",
and an error if the license is not one of the handful of the
expected licenses to prevent unintended proliferation. The warning
asks users to explain their unusual choice of license in the commit
message.
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Daniel P. Berrangé <[email protected]>
Commit: 6b7521818b26134726b3494cd06f04e30659ce2c
https://github.com/qemu/qemu/commit/6b7521818b26134726b3494cd06f04e30659ce2c
Author: Daniel P. Berrangé <[email protected]>
Date: 2025-02-28 (Fri, 28 Feb 2025)
Changed paths:
M scripts/checkpatch.pl
Log Message:
-----------
scripts: forbid use of arbitrary SPDX tags besides license identifiers
While SPDX-License-Identifier is a well known SPDX tag, there are a
great many more besides that[1]. These are mostly focused on making
machine readable metadata available to the 'reuse' tool and similar.
They cover concepts like author names, copyright owners, and much
more. It is even possible to define source file line groups and apply
different SPDX tags to regions of code within a file.
At this time we're only interested in adopting SPDX for recording the
file global licensing info, so detect & reject any other SPDX metadata.
If we want to explicitly collect extra data in SPDX format, we can
evaluate each data item on its merits when someone wants to propose it
at a later date.
[1] https://spdx.github.io/spdx-spec/v2.2.2/file-tags/
https://spdx.github.io/spdx-spec/v2.2.2/file-information/
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Daniel P. Berrangé <[email protected]>
Commit: 09951f5a27a7f8633118c1808cf17e66b30c3c62
https://github.com/qemu/qemu/commit/09951f5a27a7f8633118c1808cf17e66b30c3c62
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M MAINTAINERS
A docs/system/arm/imx8mp-evk.rst
M docs/system/arm/virt.rst
M docs/system/target-arm.rst
M fpu/meson.build
M fpu/softfloat-parts.c.inc
M fpu/softfloat-specialize.c.inc
M fpu/softfloat.c
M hw/arm/Kconfig
M hw/arm/boot.c
A hw/arm/fsl-imx8mp.c
A hw/arm/imx8mp-evk.c
M hw/arm/meson.build
M hw/arm/smmuv3.c
M hw/arm/virt.c
M hw/core/loader-fit.c
M hw/core/machine.c
M hw/gpio/Kconfig
M hw/loongarch/virt-fdt-build.c
M hw/mips/boston.c
M hw/misc/Kconfig
A hw/misc/imx8mp_analog.c
A hw/misc/imx8mp_ccm.c
M hw/misc/meson.build
M hw/misc/npcm_clk.c
M hw/openrisc/boot.c
M hw/openrisc/openrisc_sim.c
M hw/openrisc/virt.c
M hw/pci-host/Kconfig
M hw/pci-host/designware.c
A hw/pci-host/fsl_imx8m_phy.c
M hw/pci-host/meson.build
M hw/ppc/e500.c
M hw/ppc/pegasos2.c
M hw/ppc/pnv.c
M hw/ppc/spapr.c
M hw/riscv/boot.c
M hw/timer/imx_gpt.c
M hw/usb/hcd-dwc3.c
M include/fpu/softfloat-helpers.h
M include/fpu/softfloat-types.h
M include/fpu/softfloat.h
A include/hw/arm/fsl-imx8mp.h
M include/hw/loader-fit.h
A include/hw/misc/imx8mp_analog.h
A include/hw/misc/imx8mp_ccm.h
M include/hw/openrisc/boot.h
M include/hw/pci-host/designware.h
A include/hw/pci-host/fsl_imx8m_phy.h
M include/hw/timer/imx_gpt.h
M include/hw/usb/hcd-dwc3.h
M include/system/device_tree.h
M monitor/hmp-cmds.c
M system/device_tree-stub.c
M system/device_tree.c
M target/arm/hvf/hvf.c
M target/arm/internals.h
M target/arm/meson.build
M target/arm/tcg-stubs.c
M target/arm/tcg/meson.build
A target/arm/tcg/vfp_helper.c
A target/arm/vfp_fpscr.c
R target/arm/vfp_helper.c
M target/hppa/fpu_helper.c
M target/i386/tcg/fpu_helper.c
M target/m68k/cpu.c
M target/m68k/fpu_helper.c
M target/m68k/softfloat.c
M target/sh4/cpu.c
Log Message:
-----------
Merge tag 'pull-target-arm-20250225' of
https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue:
* hw/arm/smmuv3: Fill u.f_cd_fetch.addr for SMMU_EVT_F_CD_FETCH
* hw/arm/virt: Support larger highmem MMIO regions
* machine: Centralize -machine dumpdtb option handling and report
attempt to dump nonexistent DTB as an error
* fpu: remove target ifdefs and build it only once
* target/arm: Refactor to move TCG-only vfp_helper code into tcg/
* target/arm/hvf: Disable SME feature
* target/arm/hvf: sign extend the data for a load operation when SSE=1
* hw/misc/npcm_clk: fix buffer-overflow
* hw/arm: Add i.MX 8M Plus EVK board ("imx8mp-evk")
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# gpg: Good signature from "Peter Maydell <[email protected]>" [full]
# gpg: aka "Peter Maydell <[email protected]>" [full]
# gpg: aka "Peter Maydell <[email protected]>"
[full]
# gpg: aka "Peter Maydell <[email protected]>" [unknown]
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* tag 'pull-target-arm-20250225' of
https://git.linaro.org/people/pmaydell/qemu-arm: (43 commits)
hw/arm/fsl-imx8mp: Add on-chip RAM
hw/arm/fsl-imx8mp: Add USB support
hw/arm/fsl-imx8mp: Add Ethernet controller
hw/arm/fsl-imx8mp: Implement general purpose timers
hw/arm/fsl-imx8mp: Add watchdog support
hw/arm/fsl-imx8mp: Add SPI controllers
hw/arm/fsl-imx8mp: Add I2C controllers
hw/arm/fsl-imx8mp: Add GPIO controllers
hw/arm/fsl-imx8mp: Add PCIe support
hw/arm/fsl-imx8mp: Add USDHC storage controllers
hw/arm/fsl-imx8mp: Add SNVS
hw/arm/fsl-imx8mp: Implement clock tree
hw/arm: Add i.MX 8M Plus EVK board
hw/gpio/pca955*: Move Kconfig switches next to implementations
hw/pci-host/designware: Prevent device attachment on internal PCIe root bus
hw/usb/hcd-dwc3: Align global registers size with Linux
hw/misc/npcm_clk: fix buffer-overflow
target/arm/hvf: sign extend the data for a load operation when SSE=1
target/arm/hvf: Disable SME feature
target/arm: Rename vfp_helper.c to vfp_fpscr.c
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: ee376948ebd9cf74b4456a7422e5073a72e4486a
https://github.com/qemu/qemu/commit/ee376948ebd9cf74b4456a7422e5073a72e4486a
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M .gitlab-ci.d/check-dco.py
M .gitlab-ci.d/check-patch.py
M tests/avocado/replay_kernel.py
M tests/functional/meson.build
M tests/functional/replay_kernel.py
A tests/functional/test_aarch64_replay.py
A tests/functional/test_alpha_replay.py
A tests/functional/test_arm_replay.py
M tests/functional/test_arm_sx1.py
A tests/functional/test_m68k_replay.py
A tests/functional/test_microblaze_replay.py
M tests/functional/test_microblaze_s3adsp1800.py
M tests/functional/test_microblazeel_s3adsp1800.py
A tests/functional/test_or1k_replay.py
M tests/functional/test_ppc64_e500.py
A tests/functional/test_ppc64_replay.py
A tests/functional/test_ppc_replay.py
A tests/functional/test_s390x_replay.py
A tests/functional/test_sparc_replay.py
A tests/functional/test_x86_64_replay.py
A tests/functional/test_xtensa_replay.py
M tests/qtest/qom-test.c
Log Message:
-----------
Merge tag 'pull-request-2025-02-26' of https://gitlab.com/thuth/qemu into
staging
* Convert more avocado tests to the functional framework
* Fix a problem with the check-patch/check-dco CI jobs
* Replace the ppc64 e500 functional test with a better one
* Test retrieval of machine class properties
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# AZf9kGVE2/g=
# =KMhF
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 26 Feb 2025 17:56:07 HKT
# gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "[email protected]"
# gpg: Good signature from "Thomas Huth <[email protected]>" [full]
# gpg: aka "Thomas Huth <[email protected]>" [full]
# gpg: aka "Thomas Huth <[email protected]>" [full]
# gpg: aka "Thomas Huth <[email protected]>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2025-02-26' of https://gitlab.com/thuth/qemu:
tests/functional: Replace the ppc64 e500 advent calendar test
gitlab: use --refetch in check-patch/check-dco jobs
tests/functional: Bump some arm test timeouts
tests/functional: Convert the x86_64 replay avocado tests
tests/functional: Convert the aarch64 replay avocado tests
tests/functional: Convert the s390x replay avocado tests
tests/functional: Convert the alpha replay avocado tests
tests/functional: Convert the arm replay avocado tests
tests/functional: Convert the m68k replay avocado tests
tests/functional: Convert the microblaze replay avocado tests
tests/functional: Convert the ppc64 replay avocado tests
tests/functional: Convert the or1k replay avocado tests
tests/functional: Convert the 32-bit ppc replay avocado tests
tests/functional: Convert the sparc replay avocado test
tests/functional: Convert the xtensa replay test to the functional framework
tests/functional: Provide a proper name for the VMs in the replay tests
tests/qtest/qom-test: Test retrieval of machine class properties
tests/functional: Have microblaze tests inherit common parent class
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: ef3b5f5cd89fb573729a6dc10f1a1c49b20d0113
https://github.com/qemu/qemu/commit/ef3b5f5cd89fb573729a6dc10f1a1c49b20d0113
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M qga/commands-posix.c
M qga/commands-win32.c
M qga/main.c
Log Message:
-----------
Merge tag 'qga-pull-2025-02-26' of https://github.com/kostyanf14/qemu into
staging
qga-pull-2025-02-26
# -----BEGIN PGP SIGNATURE-----
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# =kmxC
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 26 Feb 2025 20:19:06 HKT
# gpg: using RSA key C2C2C109EA43C63C1423EB84EF5D5E8161BA84E7
# gpg: Good signature from "Kostiantyn Kostiuk (Upstream PR sign)
<[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: C2C2 C109 EA43 C63C 1423 EB84 EF5D 5E81 61BA 84E7
* tag 'qga-pull-2025-02-26' of https://github.com/kostyanf14/qemu:
qga: Don't daemonize before channel is initialized
qga: Invert logic on return value in main()
qga: Add log to guest-fsfreeze-thaw command
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 70fc2bde913ef8a6b77ded6831534d9c79541e17
https://github.com/qemu/qemu/commit/70fc2bde913ef8a6b77ded6831534d9c79541e17
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M docs/system/devices/nvme.rst
M hw/nvme/ctrl.c
M hw/nvme/ns.c
M hw/nvme/nvme.h
M include/block/nvme.h
Log Message:
-----------
Merge tag 'pull-nvme-20250227' of https://gitlab.com/birkelund/qemu into
staging
nvme queue
# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 27 Feb 2025 17:28:49 HKT
# gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <[email protected]>" [unknown]
# gpg: aka "Klaus Jensen <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838
# Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9
* tag 'pull-nvme-20250227' of https://gitlab.com/birkelund/qemu:
hw/nvme: remove nvme_aio_err()
hw/nvme: set error status code explicitly for misc commands
hw/nvme: only set command abort requested when cancelled due to Abort
hw/nvme: rework csi handling
hw/nvme: be compliant wrt. dsm processing limits
nvme: fix iocs status code values
hw/nvme: add knob for doorbell buffer config support
hw/nvme: make oacs dynamic
hw/nvme: always initialize a subsystem
hw/nvme: Add OCP SMART / Health Information Extended Log Page
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 8d56d0fd2fcb5a99cd2f722d983c9c1199ff19b0
https://github.com/qemu/qemu/commit/8d56d0fd2fcb5a99cd2f722d983c9c1199ff19b0
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M Kconfig.host
M docs/devel/rust.rst
M hw/core/machine-smp.c
M hw/display/Kconfig
M hw/display/meson.build
M hw/i386/pc.c
M hw/timer/hpet.c
M include/hw/boards.h
M meson.build
M meson_options.txt
M qemu-options.hx
M qom/object_interfaces.c
M rust/Cargo.lock
M rust/hw/char/pl011/src/device.rs
M rust/hw/char/pl011/src/device_class.rs
M rust/hw/timer/Kconfig
M rust/hw/timer/hpet/src/hpet.rs
M rust/qemu-api/Cargo.toml
M rust/qemu-api/meson.build
M rust/qemu-api/src/assertions.rs
A rust/qemu-api/src/errno.rs
M rust/qemu-api/src/irq.rs
M rust/qemu-api/src/lib.rs
M rust/qemu-api/src/prelude.rs
M rust/qemu-api/src/qdev.rs
M rust/qemu-api/src/qom.rs
M rust/qemu-api/src/sysbus.rs
M rust/qemu-api/tests/tests.rs
M scripts/archive-source.sh
M scripts/make-release
M scripts/meson-buildoptions.sh
M stubs/meson.build
R stubs/monitor-fd.c
M subprojects/.gitignore
A subprojects/libc-0.2-rs.wrap
A subprojects/packagefiles/libc-0.2-rs/meson.build
M system/physmem.c
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/hvf/hvf-i386.h
M target/i386/hvf/hvf.c
M target/i386/hvf/x86.c
M target/i386/hvf/x86.h
M target/i386/hvf/x86_decode.c
M target/i386/hvf/x86_descr.c
M target/i386/hvf/x86_descr.h
M target/i386/hvf/x86_emu.c
M target/i386/hvf/x86_emu.h
M target/i386/hvf/x86_task.c
M target/i386/hvf/x86_task.h
M target/i386/hvf/x86hvf.h
M target/riscv/cpu.c
M target/riscv/tcg/tcg-cpu.c
Log Message:
-----------
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* qom: Use command line syntax for default values in help
* i386: support cache topology with machine's configuration
* rust: fix duplicate symbols from monitor-fd.c
* rust: add module to convert between success/-errno and io::Result
* rust: move class_init implementation from trait to method
* pvg: configuration improvements
* kvm guestmemfd: replace assertion with error
* riscv: cleanups
* target/i386/hvf: cleanups to emulation
* target/i386: add Zhaoxin and Yongfeng CPU model
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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 26 Feb 2025 16:56:43 HKT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "[email protected]"
# gpg: Good signature from "Paolo Bonzini <[email protected]>" [full]
# gpg: aka "Paolo Bonzini <[email protected]>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (34 commits)
target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs
target/i386: Introduce Zhaoxin Yongfeng CPU model
target/i386: Add CPUID leaf 0xC000_0001 EDX definitions
target/i386: Add support for Zhaoxin CPU vendor identification
target/riscv: move 128-bit check to TCG realize
target/riscv: remove unused macro DEFINE_CPU
i386/cpu: add has_caches flag to check smp_cache configuration
i386/pc: Support cache topology in -machine for PC machine
i386/cpu: Update cache topology with machine's configuration
i386/cpu: Support module level cache topology
rust: qom: get rid of ClassInitImpl
rust: pl011, qemu_api tests: do not use ClassInitImpl
rust: qom: add ObjectImpl::CLASS_INIT
rust: add SysBusDeviceImpl
rust: add IsA bounds to QOM implementation traits
target/i386/hvf: drop some dead code
target/i386/hvf: move and rename simulate_{rdmsr, wrmsr}
target/i386/hvf: move and rename {load, store}_regs
target/i386/hvf: use x86_segment in x86_decode.c
target/i386/hvf: fix the declaration of hvf_handle_io
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 354925d42252f6f36a9e1e4a6b929aaafb2eaf45
https://github.com/qemu/qemu/commit/354925d42252f6f36a9e1e4a6b929aaafb2eaf45
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-03-03 (Mon, 03 Mar 2025)
Changed paths:
M scripts/checkpatch.pl
Log Message:
-----------
Merge tag 'spdx-check-pull-request' of https://gitlab.com/berrange/qemu into
staging
SPDX support for checkpatch
* Mandate use of SPDX-License-Identifier in new files
* Validate SPDX license choices
* Forbid other SPDX tags
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# =eGL+
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 28 Feb 2025 23:43:50 HKT
# gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF
# gpg: Good signature from "Daniel P. Berrange <[email protected]>" [full]
# gpg: aka "Daniel P. Berrange <[email protected]>" [full]
# Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF
* tag 'spdx-check-pull-request' of https://gitlab.com/berrange/qemu:
scripts: forbid use of arbitrary SPDX tags besides license identifiers
scripts: validate SPDX license choices
scripts: mandate that new files have SPDX-License-Identifier
Signed-off-by: Stefan Hajnoczi <[email protected]>
Compare: https://github.com/qemu/qemu/compare/50d38b892183...354925d42252
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