Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: d576b65ebaf15240bd98ddc6264bfd0b0ea4fd65
      
https://github.com/qemu/qemu/commit/d576b65ebaf15240bd98ddc6264bfd0b0ea4fd65
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/intc/loongarch_ipi.c
    M include/hw/intc/loongarch_ipi.h

  Log Message:
  -----------
  hw/intc/loongarch_ipi: Add reset support

Add reset support with ipi object, register reset callback and clear
internal registers when virt machine resets.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: d050daa6b9f8cb98a2f59a53a8e3cca1268adfe5
      
https://github.com/qemu/qemu/commit/d050daa6b9f8cb98a2f59a53a8e3cca1268adfe5
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/intc/loongarch_extioi_common.c
    M include/hw/intc/loongarch_extioi_common.h

  Log Message:
  -----------
  hw/intc/loongarch_extioi: Add reset support

Add reset support with extioi irqchip, and register reset callback
support with new API resettable_class_set_parent_phases(). Clear
internal HW registers and SW state when virt machine resets.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 679297b455b75fa496723636c28714dfa6e872be
      
https://github.com/qemu/qemu/commit/679297b455b75fa496723636c28714dfa6e872be
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/intc/loongarch_extioi.c
    M include/hw/intc/loongarch_extioi.h

  Log Message:
  -----------
  hw/intc/loongarch_extioi: Replace legacy reset callback with new api

Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object and then itself.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 3a04af2ee05b23879fbb73b66c6e79a56a6c276c
      
https://github.com/qemu/qemu/commit/3a04af2ee05b23879fbb73b66c6e79a56a6c276c
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/intc/loongarch_pic_common.c
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Add reset support

Add reset support with LoongArch pci irqchip, and register reset
callback support with new API resettable_class_set_parent_phases().
Clear internal HW registers and SW state when virt machine resets.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 612c998467790b503d49f6ae6649ab1d2d70a741
      
https://github.com/qemu/qemu/commit/612c998467790b503d49f6ae6649ab1d2d70a741
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/intc/loongarch_pch_pic.c
    M include/hw/intc/loongarch_pch_pic.h

  Log Message:
  -----------
  hw/intc/loongarch_pch: Replace legacy reset callback with new api

Replace legacy reset callback register device_class_set_legacy_reset()
with new function resettable_class_set_parent_phases(). With new API,
it will call reset callback of parent object.

The internal state has been cleared in parent object
LOONGARCH_PIC_COMMON, here parent_phases.hold() is directly called.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 8374eaec745aa84d269e8f2531ef9ebb7ab4aa78
      
https://github.com/qemu/qemu/commit/8374eaec745aa84d269e8f2531ef9ebb7ab4aa78
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/loongarch/boot.c

  Log Message:
  -----------
  hw/loongarch/virt: Get physical entry address with elf file

With load_elf() api, image load low address and high address is converted
to physical address if parameter translate_fn is provided. However
executing entry address is still virtual address. Here convert entry
address into physical address, since MMU is disabled when system power on,
the first PC instruction should be physical address.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>


  Commit: e31260198c19486a28b4a757b7b21f6b463af551
      
https://github.com/qemu/qemu/commit/e31260198c19486a28b4a757b7b21f6b463af551
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/loongarch/virt-acpi-build.c

  Log Message:
  -----------
  hw/loongarch/virt: Replace RSDT with XSDT table

XSDT table is introduced in ACPI Specification 5.0, it supports 64-bit
address in the table. There is LoongArch system support from ACPI
Specification 6.4 and later, XSDT is supported by LoongArch system.

Here replace RSDT with XSDT table.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 55985a3fd236acab9e4c16c198246fcace766155
      
https://github.com/qemu/qemu/commit/55985a3fd236acab9e4c16c198246fcace766155
  Author: Bibo Mao <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/loongarch/virt.c

  Log Message:
  -----------
  hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID

On LoongArch virt machine, the default OEM ID and OEM table ID is
"BOCHS " and "BXPC    ". Here property x-oem-id and x-oem-table-id
is added on virt machine to set customized OEM ID and OEM table ID.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 432af6ed67273ab59036d6c9620e3af02b7430ce
      
https://github.com/qemu/qemu/commit/432af6ed67273ab59036d6c9620e3af02b7430ce
  Author: Stefan Hajnoczi <[email protected]>
  Date:   2025-04-28 (Mon, 28 Apr 2025)

  Changed paths:
    M hw/intc/loongarch_extioi.c
    M hw/intc/loongarch_extioi_common.c
    M hw/intc/loongarch_ipi.c
    M hw/intc/loongarch_pch_pic.c
    M hw/intc/loongarch_pic_common.c
    M hw/loongarch/boot.c
    M hw/loongarch/virt-acpi-build.c
    M hw/loongarch/virt.c
    M include/hw/intc/loongarch_extioi.h
    M include/hw/intc/loongarch_extioi_common.h
    M include/hw/intc/loongarch_ipi.h
    M include/hw/intc/loongarch_pch_pic.h
    M include/hw/intc/loongarch_pic_common.h

  Log Message:
  -----------
  Merge tag 'pull-loongarch-20250428' of https://github.com/bibo-mao/qemu into 
staging

loongarch queue

# -----BEGIN PGP SIGNATURE-----
#
# iHUEABYKAB0WIQQNhkKjomWfgLCz0aQfewwSUazn0QUCaA74fwAKCRAfewwSUazn
# 0U5dAQDRhyw7Ako1Da1gO4iwvKnwQYL1bl08OQaO4x4fgxGXawEAmgjzg1QiE+PQ
# 7Vbi9drO9Jqo3tLmO7kbm5tdwCVsLww=
# =JmGP
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 27 Apr 2025 23:39:43 EDT
# gpg:                using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7  13C4 8E86 8FB7 A176 9D4C
#      Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3  D1A4 1F7B 0C12 51AC E7D1

* tag 'pull-loongarch-20250428' of https://github.com/bibo-mao/qemu:
  hw/loongarch/virt: Allow user to customize OEM ID and OEM table ID
  hw/loongarch/virt: Replace RSDT with XSDT table
  hw/loongarch/virt: Get physical entry address with elf file
  hw/intc/loongarch_pch: Replace legacy reset callback with new api
  hw/intc/loongarch_pch: Add reset support
  hw/intc/loongarch_extioi: Replace legacy reset callback with new api
  hw/intc/loongarch_extioi: Add reset support
  hw/intc/loongarch_ipi: Add reset support

Signed-off-by: Stefan Hajnoczi <[email protected]>


Compare: https://github.com/qemu/qemu/compare/73d29ea2417b...432af6ed6727

To unsubscribe from these emails, change your notification settings at 
https://github.com/qemu/qemu/settings/notifications

Reply via email to