Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: f88934b61ee0dc1d583f0a576ce87ed2ff9c116b
https://github.com/qemu/qemu/commit/f88934b61ee0dc1d583f0a576ce87ed2ff9c116b
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M target/sparc/fop_helper.c
Log Message:
-----------
Merge tag 'qemu-sparc-20250527' of https://github.com/mcayland/qemu into
staging
qemu-sparc queue
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# gpg: Signature made Tue 27 May 2025 17:16:20 EDT
# gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F
# gpg: issuer "[email protected]"
# gpg: Good signature from "Mark Cave-Ayland <[email protected]>"
[full]
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* tag 'qemu-sparc-20250527' of https://github.com/mcayland/qemu:
target/sparc: don't set FSR_NVA when comparing unordered floats
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 3072961b6edc99abfbd87caac3de29bb58a52ccf
https://github.com/qemu/qemu/commit/3072961b6edc99abfbd87caac3de29bb58a52ccf
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M accel/tcg/cpu-exec.c
M accel/tcg/cputlb.c
M accel/tcg/translate-all.c
M configs/targets/microblaze-softmmu.mak
M configs/targets/microblazeel-softmmu.mak
M include/accel/tcg/cpu-ops.h
M include/tcg/tcg.h
M linux-user/syscall.c
M system/main.c
M target/alpha/cpu.c
M target/arm/cpu.c
M target/arm/tcg/cpu-v7m.c
M target/avr/cpu.c
M target/hppa/cpu.c
M target/i386/tcg/tcg-cpu.c
M target/loongarch/cpu.c
M target/m68k/cpu.c
M target/microblaze/cpu.c
M target/microblaze/cpu.h
M target/microblaze/helper.c
M target/microblaze/helper.h
M target/microblaze/mmu.c
M target/microblaze/op_helper.c
M target/microblaze/translate.c
M target/mips/cpu.c
M target/openrisc/cpu.c
M target/ppc/cpu_init.c
M target/riscv/tcg/tcg-cpu.c
M target/rx/cpu.c
M target/s390x/cpu.c
M target/sh4/cpu.c
M target/sh4/translate.c
M target/sparc/cpu.c
M target/tricore/cpu.c
M target/xtensa/cpu.c
M tcg/aarch64/tcg-target.c.inc
M tcg/arm/tcg-target.c.inc
M tcg/i386/tcg-target.c.inc
M tcg/loongarch64/tcg-target.c.inc
M tcg/mips/tcg-target.c.inc
M tcg/perf.c
M tcg/ppc/tcg-target.c.inc
M tcg/riscv/tcg-target.c.inc
M tcg/s390x/tcg-target.c.inc
M tcg/sparc64/tcg-target.c.inc
M tcg/tcg-op-ldst.c
M tcg/tcg.c
Log Message:
-----------
Merge tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu into staging
accel/tcg: Fix atomic_mmu_lookup vs TLB_FORCE_SLOW
linux-user: implement pgid field of /proc/self/stat
target/sh4: Use MO_ALIGN for system UNALIGN()
target/microblaze: Use TARGET_LONG_BITS == 32 for system mode
accel/tcg: Add TCGCPUOps.pointer_wrap
target/*: Populate TCGCPUOps.pointer_wrap
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# gpg: Signature made Wed 28 May 2025 04:13:04 EDT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "[email protected]"
# gpg: Good signature from "Richard Henderson <[email protected]>"
[full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-tcg-20250528' of https://gitlab.com/rth7680/qemu: (28 commits)
accel/tcg: Assert TCGCPUOps.pointer_wrap is set
target/sparc: Fill in TCGCPUOps.pointer_wrap
target/s390x: Fill in TCGCPUOps.pointer_wrap
target/riscv: Fill in TCGCPUOps.pointer_wrap
target/ppc: Fill in TCGCPUOps.pointer_wrap
target/mips: Fill in TCGCPUOps.pointer_wrap
target/loongarch: Fill in TCGCPUOps.pointer_wrap
target/i386: Fill in TCGCPUOps.pointer_wrap
target/arm: Fill in TCGCPUOps.pointer_wrap
target: Use cpu_pointer_wrap_uint32 for 32-bit targets
target: Use cpu_pointer_wrap_notreached for strict align targets
accel/tcg: Add TCGCPUOps.pointer_wrap
target/sh4: Use MO_ALIGN for system UNALIGN()
tcg: Drop TCGContext.page_{mask,bits}
tcg: Drop TCGContext.tlb_dyn_max_bits
target/microblaze: Simplify compute_ldst_addr_type{a,b}
target/microblaze: Drop DisasContext.r0
target/microblaze: Use TARGET_LONG_BITS == 32 for system mode
target/microblaze: Fix printf format in mmu_translate
target/microblaze: Use TCGv_i64 for compute_ldst_addr_ea
...
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: a5519f27a243d11191d462ef4f5b5d71aeef2271
https://github.com/qemu/qemu/commit/a5519f27a243d11191d462ef4f5b5d71aeef2271
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-05-28 (Wed, 28 May 2025)
Changed paths:
M docs/about/deprecated.rst
M docs/about/removed-features.rst
M qapi/migration.json
Log Message:
-----------
Merge tag 'pull-misc-2025-05-28' of https://repo.or.cz/qemu/armbru into
staging
Miscellaneous patches for 2025-05-28
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# gpg: Signature made Wed 28 May 2025 08:03:30 EDT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "[email protected]"
# gpg: Good signature from "Markus Armbruster <[email protected]>" [full]
# gpg: aka "Markus Armbruster <[email protected]>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* tag 'pull-misc-2025-05-28' of https://repo.or.cz/qemu/armbru:
docs/about/removed-features: Move removal notes to tidy up order
docs/about/deprecated: Move deprecation notes to tidy up order
qapi/migration: Deprecate migrate argument @detach
docs/about: Belatedly document tightening of QMP device_add checking
Signed-off-by: Stefan Hajnoczi <[email protected]>
Compare: https://github.com/qemu/qemu/compare/90441ed4cb30...a5519f27a243
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