Branch: refs/heads/staging-7.2
  Home:   https://github.com/qemu/qemu
  Commit: 5c8b55967f269b71f307d6643cdc48fecc6dfa31
      
https://github.com/qemu/qemu/commit/5c8b55967f269b71f307d6643cdc48fecc6dfa31
  Author: minglei.liu <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M qga/commands.c

  Log Message:
  -----------
  qga: Fix truncated output handling in guest-exec status reporting

Signed-off-by: minglei.liu <[email protected]>
Fixes: a1853dca743
Reviewed-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Kostiantyn Kostiuk <[email protected]>
Link: 
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Kostiantyn Kostiuk <[email protected]>
(cherry picked from commit 28c5d27dd4dc4100a96ff4c9e5871dd23c6b02ec)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: ee2a2c7d5449c427b9d45cfbbfb65810664a1492
      
https://github.com/qemu/qemu/commit/ee2a2c7d5449c427b9d45cfbbfb65810664a1492
  Author: Laurent Vivier <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M hw/net/e1000e_core.c

  Log Message:
  -----------
  e1000e: Prevent crash from legacy interrupt firing after MSI-X enable

A race condition between guest driver actions and QEMU timers can lead
to an assertion failure when the guest switches the e1000e from legacy
interrupt mode to MSI-X. If a legacy interrupt delay timer (TIDV or
RDTR) is active, but the guest enables MSI-X before the timer fires,
the pending interrupt cause can trigger an assert in
e1000e_intmgr_collect_delayed_causes().

This patch removes the assertion and executes the code that clears the
pending legacy causes. This change is safe and introduces no unintended
behavioral side effects, as it only alters a state that previously led
to termination.

- when core->delayed_causes == 0 the function was already a no-op and
  remains so.

- when core->delayed_causes != 0 the function would previously
  crash due to the assertion failure. The patch now defines a safe
  outcome by clearing the cause and returning. Since behavior after
  the assertion never existed, this simply corrects the crash.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1863
Suggested-by: Akihiko Odaki <[email protected]>
Signed-off-by: Laurent Vivier <[email protected]>
Acked-by: Jason Wang <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
(cherry picked from commit 8e4649cac9bcddc050d2df07908075e9e69bccc7)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: d790ae865c9ccdd347e453499700d4479e7e1a6a
      
https://github.com/qemu/qemu/commit/d790ae865c9ccdd347e453499700d4479e7e1a6a
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M linux-user/mips/target_elf.h

  Log Message:
  -----------
  linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries

Per the release 6.06 revision history:

 5.03 August 21, 2013

 • ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField
   Descriptions” were optional in release 3 and could be R/W,
   but as of release 5 are required, read-only, and preset by
   hardware.

The P5600 core implements the release 5, and has the ABS2008
and NAN2008 bits set in CP1_fcr31. Therefore it is able to run
ELF binaries compiled with EF_MIPS_NAN2008, such the CIP United
Debian NaN2008 distribution:
http://repo.oss.cipunited.com/mipsel-nan2008/README.txt

In order to run such compiled binaries, select by default the
P5600 core when the ELF 'MIPS_NAN2008' flag is set.

Reported-by: Jiaxun Yang <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Acked-by: Laurent Vivier <[email protected]>
Message-Id: <[email protected]>
(cherry picked from commit 450cb7ec2c5fda51b9650ca25e59ac9deeb60d1b)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: 8a9322814e9704001ed8fb6dd086abf11494912d
      
https://github.com/qemu/qemu/commit/8a9322814e9704001ed8fb6dd086abf11494912d
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M linux-user/mips/target_elf.h
    M linux-user/mips64/target_elf.h

  Log Message:
  -----------
  linux-user/mips: Do not try to use removed R5900 CPU

R5900 emulation was removed in commit 823f2897bd.
Remove it from ELF parsing in order to avoid:

  $ qemu-mipsn32 ./test5900
  qemu-mipsn32: unable to find CPU model 'R5900'

This reverts commit 4d9e5a0eb7df6e98ac6cf5e16029f35dd05b9537.

Fixes: 823f2897bd ("target/mips: Disable R5900 support")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
(cherry picked from commit f7e3d7521b41ada97c5344914d3c9bc6ed04c82a)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: 41e2ed199ef3a1ef0b6d163f4e72f4e1e9b9ab8c
      
https://github.com/qemu/qemu/commit/41e2ed199ef3a1ef0b6d163f4e72f4e1e9b9ab8c
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M include/elf.h

  Log Message:
  -----------
  elf: Add EF_MIPS_ARCH_ASE definitions

Include MIPS ASE ELF definitions from binutils:
https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=include/elf/mips.h;h=4fc190f404d828ded84e621bfcece5fa9f9c23c8;hb=HEAD#l210

Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
(cherry picked from commit 14ab44b96d5bf761af81cc723314ef5ecf73ed17)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: 2d035553f30e39f0122d583e4f1121dafeb9a6e3
      
https://github.com/qemu/qemu/commit/2d035553f30e39f0122d583e4f1121dafeb9a6e3
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M linux-user/mips/target_elf.h

  Log Message:
  -----------
  linux-user/mips: Select 74Kf CPU to run MIPS16e binaries

The 74Kf is our latest CPU supporting MIPS16e ASE.

Note, currently QEMU doesn't have 64-bit CPU supporting MIPS16e ASE.

Cc: [email protected]
Fixes: 6ea219d0196..d19954f46df ("target-mips: MIPS16 support")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3054
Reported-by: Justin Applegate <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
(cherry picked from commit 7a09b3cc70ab6d717b18dec5c5995f7a06af4593)
(Mjt: in 10.1 and before the code is in linux-user/mips/target_elf.h)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: 2c2da6ecf81ccdebcd730356047844301800a761
      
https://github.com/qemu/qemu/commit/2c2da6ecf81ccdebcd730356047844301800a761
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M linux-user/mips/target_elf.h

  Log Message:
  -----------
  linux-user/mips: Select M14Kc CPU to run microMIPS binaries

The M14Kc is our latest CPU supporting the microMIPS ASE.

Note, currently QEMU doesn't have 64-bit CPU supporting microMIPS ASE.

Cc: [email protected]
Fixes: 3c824109da0 ("target-mips: microMIPS ASE support")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3054
Reported-by: Justin Applegate <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Message-Id: <[email protected]>
(cherry picked from commit 51c3aebfda6489b49cebef593a1ceb597cb97a7e)
(Mjt: in 10.1 and before, the code is in linux-user/mips/target_elf.h)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: cb72e6e4456541033a397e1f4d46d66c24cf9086
      
https://github.com/qemu/qemu/commit/cb72e6e4456541033a397e1f4d46d66c24cf9086
  Author: Denis Rastyogin <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M target/mips/tcg/sysemu/tlb_helper.c

  Log Message:
  -----------
  target/mips: fix TLB huge page check to use 64-bit shift

Use extract64(entry, psn, 1) instead of (entry & (1 << psn)) to avoid
undefined behavior for shifts by 32–63 and to make bit extraction intent 
explicit.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Denis Rastyogin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
(cherry picked from commit 1f82ca723478f44823a18e7151e487d58da03659)
Signed-off-by: Michael Tokarev <[email protected]>


  Commit: 9ac9b7ea53ac7b9c6fcca5f732d6bf59709e4338
      
https://github.com/qemu/qemu/commit/9ac9b7ea53ac7b9c6fcca5f732d6bf59709e4338
  Author: Michael Tokarev <[email protected]>
  Date:   2025-09-06 (Sat, 06 Sep 2025)

  Changed paths:
    M block/curl.c

  Log Message:
  -----------
  block/curl: fix curl internal handles handling

block/curl.c uses CURLMOPT_SOCKETFUNCTION to register a socket callback.
According to the documentation, this callback is called not just with
application-created sockets but also with internal curl sockets, - and
for such sockets, user data pointer is not set by the application, so
the result qemu crashing.

Pass BDRVCURLState directly to the callback function as user pointer,
instead of relying on CURLINFO_PRIVATE.

This problem started happening with update of libcurl from 8.9 to 8.10 --
apparently with this change curl started using private handles more.

(CURLINFO_PRIVATE is used in one more place, in curl_multi_check_completion() -
it might need a similar fix too)

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3081
Cc: [email protected]
Reviewed-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
(cherry picked from commit 606978500c3d18fb89a49844f253097b17f757de)
Signed-off-by: Michael Tokarev <[email protected]>


Compare: https://github.com/qemu/qemu/compare/679606038b8d...9ac9b7ea53ac

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