Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: c187a67c9dcdece58138f4df5ca4dd846934eddc
https://github.com/qemu/qemu/commit/c187a67c9dcdece58138f4df5ca4dd846934eddc
Author: Filip Hejsek <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M ui/gtk.c
Log Message:
-----------
ui/gtk: Fix callback function signature
The correct type for opaque pointer is gpointer,
not gpointer * (which is a pointer to a pointer).
Signed-off-by: Filip Hejsek <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: d56a30a7bba66de1b796af775928f77da25ca89b
https://github.com/qemu/qemu/commit/d56a30a7bba66de1b796af775928f77da25ca89b
Author: SillyZ <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/net/can/can_sja1000.c
Log Message:
-----------
hw/net/can: Remove redundant status bit setting in can_sja1000
In PeliCAN mode reception, the RBS (Receive Buffer Status) bit
is set twice at line 842 and 845 with identical operations:
s->status_pel |= 0x01;
s->status_pel |= (1 << 0);
Between these two operations, only interrupt_pel is modified and
status_pel bit 4 is cleared, neither affecting bit 0. The second
operation is redundant.
This cleanup aligns PeliCAN mode with BasicCAN mode, which correctly
sets this bit only once (line 883).
Signed-off-by: SillyZ <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: 383c7224839cf3acd8f1a609ad394daf7cfc8b6d
https://github.com/qemu/qemu/commit/383c7224839cf3acd8f1a609ad394daf7cfc8b6d
Author: Michael Tokarev <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M tests/qtest/vhost-user-test.c
Log Message:
-----------
vhost-user-test: remove trailing newlines in g_test_message() calls
Fixes: c9a1ea9c52 Revert "tests/qtest: use qos_printf instead of g_test_message"
Reviewed-by: Laurent Vivier <[email protected]>
Reviewed-by: Markus Armbruster <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: 1c0f5142d921525f1023152eac63d2ff3d33e3b2
https://github.com/qemu/qemu/commit/1c0f5142d921525f1023152eac63d2ff3d33e3b2
Author: ShengYi Hung <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/input/hid.c
Log Message:
-----------
hid: fix incorrect return value for hid
The return value of hid_keyboard_write is used to set the packet's actual_length
and pass to xhci directly to allow guest know how many byte actually processed.
Therefore, return 1 to indicate a successful transfer or it will be
considered as a wrong xfer.
Signed-off-by: ShengYi Hung <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: 5240186e82b9d0f8e81f1e8f74348a4fa089998a
https://github.com/qemu/qemu/commit/5240186e82b9d0f8e81f1e8f74348a4fa089998a
Author: ShengYi Hung <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/watchdog/wdt_i6300esb.c
Log Message:
-----------
wdt_i6300esb: fix incorrect mask for interrupt type
According to Intel 6300ESB Controller Hub Datasheet 14.4.15, the interrupt
type mask should be 0x03 (0b11) instead of 0x11. In the original
implementation, when we want to disable all interrupt by setting the
value to 0x03, we will get 0x01 which is incorrect when we want to read
the value again. However, there is no problem when considering the correct
behavior since 0x01 is reserved and unused just like 0x03. This patch is
just a fix to return the register value.
Signed-off-by: ShengYi Hung <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: f65918497cc6b9034ce8f81a4df1d6407e110367
https://github.com/qemu/qemu/commit/f65918497cc6b9034ce8f81a4df1d6407e110367
Author: nanliu <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M docs/devel/uefi-vars.rst
Log Message:
-----------
docs/devel: Correct uefi-vars-x64 device name
The documentation for UEFI variable storage in uefi-vars.rst
incorrectly listed the device name as `uefi-vars-x86`.
The correct device name as implemented in the source code is
`uefi-vars-x64`.
This commit updates the documentation to use the correct name,
aligning it with the implementation.
Signed-off-by: Nana Liu <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: 9348c33779a7313c5fc8b24935d71f920138e3d7
https://github.com/qemu/qemu/commit/9348c33779a7313c5fc8b24935d71f920138e3d7
Author: Peter Maydell <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M docs/specs/spdm.rst
Log Message:
-----------
docs/specs/spdm.rst: Fix typo in x86_64 architecture name
The spdm.rst docs call the 64-bit x86 architecture "x64-64".
This is a typo; correct it to our canonical name for the
architecture, "x86_64".
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Alex Bennée <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: 0af5926a0feb0b69a127f5c24eaa605408fed2ec
https://github.com/qemu/qemu/commit/0af5926a0feb0b69a127f5c24eaa605408fed2ec
Author: Marco Cavenati <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M system/runstate.c
Log Message:
-----------
system/runstate: remove duplicate in runstate transitions
Remove duplicate entry PRELAUNCH->INMIGRATE from runstate_transitions_def.
Move PRELAUNCH->SUSPENDED entry with all the other PRELAUNCH->XXX entries.
Signed-off-by: Marco Cavenati <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Signed-off-by: Michael Tokarev <[email protected]>
Commit: 1245f601d374d03a0b30a943c6a2f8db253cc45c
https://github.com/qemu/qemu/commit/1245f601d374d03a0b30a943c6a2f8db253cc45c
Author: Richard Henderson <[email protected]>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M docs/devel/uefi-vars.rst
M docs/specs/spdm.rst
M hw/input/hid.c
M hw/net/can/can_sja1000.c
M hw/watchdog/wdt_i6300esb.c
M system/runstate.c
M tests/qtest/vhost-user-test.c
M ui/gtk.c
Log Message:
-----------
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2025-10-05
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# gpg: Signature made Sat 04 Oct 2025 11:54:29 PM PDT
# gpg: using RSA key 64AA2AB531D56903366BFEF982AA4A243B1E9478
# gpg: Good signature from "Michael Tokarev <[email protected]>" [unknown]
# gpg: aka "Michael Tokarev <[email protected]>" [unknown]
# gpg: aka "Michael Tokarev <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 9D8B E14E 3F2A 9DD7 9199 28F1 61AD 3D98 ECDF 2C8E
# Subkey fingerprint: 64AA 2AB5 31D5 6903 366B FEF9 82AA 4A24 3B1E 9478
* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu:
system/runstate: remove duplicate in runstate transitions
docs/specs/spdm.rst: Fix typo in x86_64 architecture name
docs/devel: Correct uefi-vars-x64 device name
wdt_i6300esb: fix incorrect mask for interrupt type
hid: fix incorrect return value for hid
vhost-user-test: remove trailing newlines in g_test_message() calls
hw/net/can: Remove redundant status bit setting in can_sja1000
ui/gtk: Fix callback function signature
Signed-off-by: Richard Henderson <[email protected]>
Commit: 6d10e021318b16e3e90f98b7b2fa187826e26c0a
https://github.com/qemu/qemu/commit/6d10e021318b16e3e90f98b7b2fa187826e26c0a
Author: Viktor Kurilko <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M docs/system/devices/net.rst
M hmp-commands.hx
M net/slirp.c
M qapi/net.json
M qemu-options.hx
Log Message:
-----------
Add a feature for mapping a host unix socket to a guest tcp socket
This patch adds the ability to map a host unix socket to a guest tcp socket when
using the slirp backend. This feature was added in libslirp version 4.7.0.
A new syntax for unix socket: -hostfwd=unix:hostpath-[guestaddr]:guestport
Signed-off-by: Viktor Kurilko <[email protected]>
Signed-off-by: Samuel Thibault <[email protected]>
Message-ID: <[email protected]>
Commit: d9b32f457f153bdb0478321edf4f637270bebb37
https://github.com/qemu/qemu/commit/d9b32f457f153bdb0478321edf4f637270bebb37
Author: Richard Henderson <[email protected]>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M docs/system/devices/net.rst
M hmp-commands.hx
M net/slirp.c
M qapi/net.json
M qemu-options.hx
Log Message:
-----------
Merge tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu into
staging
Add a feature for mapping a host unix socket to a guest tcp socket
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# gpg: Signature made Sun 05 Oct 2025 12:17:24 PM PDT
# gpg: using RSA key E2F46417B3BC6AC01EAB1D85DCFCAD349BA2D52F
# gpg: Good signature from "Samuel Thibault <[email protected]>"
[unknown]
# gpg: aka "Samuel Thibault <[email protected]>" [unknown]
# gpg: aka "Samuel Thibault <[email protected]>" [unknown]
# gpg: aka "Samuel Thibault <[email protected]>"
[unknown]
# gpg: aka "Samuel Thibault <[email protected]>"
[unknown]
# gpg: aka "Samuel Thibault <[email protected]>"
[unknown]
# gpg: aka "Samuel Thibault <[email protected]>"
[unknown]
# gpg: aka "Samuel Thibault <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 900C B024 B679 31D4 0F82 304B D017 8C76 7D06 9EE6
# Subkey fingerprint: E2F4 6417 B3BC 6AC0 1EAB 1D85 DCFC AD34 9BA2 D52F
* tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu:
Add a feature for mapping a host unix socket to a guest tcp socket
Signed-off-by: Richard Henderson <[email protected]>
Commit: 21659e726e3832b33d108faa1046db79eb6f611c
https://github.com/qemu/qemu/commit/21659e726e3832b33d108faa1046db79eb6f611c
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M scripts/checkpatch.pl
Log Message:
-----------
scripts/checkpatch: Avoid recommending legacy qemu_bh_new_guarded()
qemu_bh_new_guarded() is considered legacy since commit 9c86c97f12c
("async: Add an optional reentrancy guard to the BH API"); recommend
the new API: aio_bh_new_guarded().
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Stefan Hajnoczi <[email protected]>
Commit: 5cbb72eef0bd78be04cc1abbfbf5a0e00d807a23
https://github.com/qemu/qemu/commit/5cbb72eef0bd78be04cc1abbfbf5a0e00d807a23
Author: Richard Henderson <[email protected]>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M scripts/checkpatch.pl
Log Message:
-----------
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into
staging
Pull request
A checkpatch.pl improvement for the QEMU BH APIs.
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# gpg: Signature made Mon 06 Oct 2025 07:58:57 AM PDT
# gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <[email protected]>" [unknown]
# gpg: aka "Stefan Hajnoczi <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8
* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
scripts/checkpatch: Avoid recommending legacy qemu_bh_new_guarded()
Signed-off-by: Richard Henderson <[email protected]>
Commit: e5fd02d8253abdc25c0eb145765734890c256b71
https://github.com/qemu/qemu/commit/e5fd02d8253abdc25c0eb145765734890c256b71
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/net/e1000e_core.c
M hw/net/igb_core.c
M hw/net/virtio-net.c
M hw/net/vmxnet3.c
M include/net/net.h
M net/net.c
M net/netmap.c
M net/tap-bsd.c
M net/tap-linux.c
M net/tap-solaris.c
M net/tap-stub.c
M net/tap.c
M net/tap_int.h
Log Message:
-----------
net: bundle all offloads in a single struct
The set_offload() argument list is already pretty long and
we are going to introduce soon a bunch of additional offloads.
Replace the offload arguments with a single struct and update
all the relevant call-sites.
No functional changes intended.
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<a9d4dd043b8c71b791e9ff05e17ef06072d9714e.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: c3d9dcd87f0d228ea3ac5a42076da829cff401f0
https://github.com/qemu/qemu/commit/c3d9dcd87f0d228ea3ac5a42076da829cff401f0
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M scripts/update-linux-headers.sh
Log Message:
-----------
linux-headers: deal with counted_by annotation
Such annotation is present into the kernel uAPI headers since
v6.7, and will be used soon by the vhost_type.h. Deal with it
just stripping it.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<a1430f43cc954d2a931fa60581bda6d6af4bc771.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 8de6cd5452eb9c58c0d105dbc9718bd0e83cc70f
https://github.com/qemu/qemu/commit/8de6cd5452eb9c58c0d105dbc9718bd0e83cc70f
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M include/standard-headers/drm/drm_fourcc.h
M include/standard-headers/linux/ethtool.h
M include/standard-headers/linux/input-event-codes.h
M include/standard-headers/linux/input.h
M include/standard-headers/linux/pci_regs.h
M include/standard-headers/linux/vhost_types.h
M include/standard-headers/linux/virtio_net.h
M linux-headers/LICENSES/preferred/GPL-2.0
M linux-headers/asm-arm64/unistd_64.h
M linux-headers/asm-generic/unistd.h
M linux-headers/asm-loongarch/unistd_64.h
M linux-headers/asm-mips/unistd_n32.h
M linux-headers/asm-mips/unistd_n64.h
M linux-headers/asm-mips/unistd_o32.h
M linux-headers/asm-powerpc/kvm.h
M linux-headers/asm-powerpc/unistd_32.h
M linux-headers/asm-powerpc/unistd_64.h
M linux-headers/asm-riscv/kvm.h
M linux-headers/asm-riscv/unistd_32.h
M linux-headers/asm-riscv/unistd_64.h
M linux-headers/asm-s390/unistd_32.h
M linux-headers/asm-s390/unistd_64.h
M linux-headers/asm-x86/unistd_32.h
M linux-headers/asm-x86/unistd_64.h
M linux-headers/asm-x86/unistd_x32.h
M linux-headers/linux/iommufd.h
M linux-headers/linux/kvm.h
M linux-headers/linux/vfio.h
M linux-headers/linux/vhost.h
Log Message:
-----------
linux-headers: Update to Linux v6.17-rc1
Update headers to include the virtio GSO over UDP tunnel features
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<0b1f3c011f90583ab52aa4fef04df6db35cc4a69.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: b15a61fdae976eb1ca8f2deee6a63dc3407d7ec6
https://github.com/qemu/qemu/commit/b15a61fdae976eb1ca8f2deee6a63dc3407d7ec6
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
A include/hw/virtio/virtio-features.h
M include/hw/virtio/virtio.h
Log Message:
-----------
virtio: introduce extended features type
The virtio specifications allows for up to 128 bits for the
device features. Soon we are going to use some of the 'extended'
bits features (bit 64 and above) for the virtio net driver.
Represent the virtio features bitmask with a fixed size array, and
introduce a few helpers to help manipulate them.
Most drivers will keep using only 64 bits features space: use union
to allow them access the lower part of the extended space without any
per driver change.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<6a9bbb5eb33830f20afbcb7e64d300af4126dd98.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 0a49a97433279512a03f3d9f36164a46caf498c6
https://github.com/qemu/qemu/commit/0a49a97433279512a03f3d9f36164a46caf498c6
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/virtio/virtio.c
Log Message:
-----------
virtio: serialize extended features state
If the driver uses any of the extended features (i.e. 64 or above),
store the extended features range (64-127 bits).
At load time, let legacy features initialize the full features range
and pass it to the set helper; sub-states loading will have filled-up
the extended part as needed.
This is one of the few spots that need explicitly to know and set
in stone the extended features array size; add a build bug to prevent
breaking the migration should such size change again in the future:
more serialization plumbing will be needed.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<d5d9d398675bee6c4c7d7308c5d3d5d3c6d17d87.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 64a6a336f42bc6305ab7589fd874cb4a3d403bd0
https://github.com/qemu/qemu/commit/64a6a336f42bc6305ab7589fd874cb4a3d403bd0
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/virtio/virtio-bus.c
M hw/virtio/virtio.c
M include/hw/virtio/virtio.h
Log Message:
-----------
virtio: add support for negotiating extended features
The virtio specifications allows for a device features space up
to 128 bits and more. Soon we are going to use some of the 'extended'
bits features for the virtio net driver.
Add support to allow extended features negotiation on a per
devices basis. Devices willing to negotiated extended features
need to implemented a new pair of features getter/setter, the
core will conditionally use them instead of the basic one.
Note that 'bad_features' don't need to be extended, as they are
bound to the 64 bits limit.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<9bb29d70adc3f2b8c7756d4e3cd076cffee87826.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 712c79d6d374e7abe94599de5ba2d155d5a79955
https://github.com/qemu/qemu/commit/712c79d6d374e7abe94599de5ba2d155d5a79955
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/virtio/virtio-pci.c
M include/hw/virtio/virtio-pci.h
Log Message:
-----------
virtio-pci: implement support for extended features
Extend the features configuration space to 128 bits. If the virtio
device supports any extended features, allow the common read/write
operation to access all of it, otherwise keep exposing only the
lower 64 bits.
On migration, save the 128 bit version of the features only if the
upper bits are non zero. Relay on reset to clear all the feature
space before load.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<c0b81601f65b41ca8310eba8f05e2dcf3702de89.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 9f979ef0e01a2dd47d167c482a9e2d1dcdff2d3f
https://github.com/qemu/qemu/commit/9f979ef0e01a2dd47d167c482a9e2d1dcdff2d3f
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/virtio/vhost.c
M include/hw/virtio/vhost-backend.h
M include/hw/virtio/vhost.h
Log Message:
-----------
vhost: add support for negotiating extended features
Similar to virtio infra, vhost core maintains the features status
in the full extended format and allows the devices to implement
extended version of the getter/setter.
Note that 'protocol_features' are not extended: they are only
used by vhost-user, and the latter device is not going to implement
extended features soon.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<a0062c3b1847fb2baedd6cd8f6ef13b051d6beb2.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: a76f5b795cab8ea0654e4813caa694470d7250a9
https://github.com/qemu/qemu/commit/a76f5b795cab8ea0654e4813caa694470d7250a9
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/virtio/virtio-hmp-cmds.c
M hw/virtio/virtio-qmp.c
M hw/virtio/virtio-qmp.h
M qapi/virtio.json
Log Message:
-----------
qmp: update virtio features map to support extended features
Extend the VirtioDeviceFeatures struct with an additional u64
to track unknown features in the 64-127 bit range and decode
the full virtio features spaces for vhost and virtio devices.
Also add entries for the soon-to-be-supported virtio net GSO over
UDP features.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<e51969f94d89045b333f1bc5ef5fca9e12fc371a.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: f412c1f57ab58fd595efee26264193759220ca6f
https://github.com/qemu/qemu/commit/f412c1f57ab58fd595efee26264193759220ca6f
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/virtio/vhost-backend.c
Log Message:
-----------
vhost-backend: implement extended features support
Leverage the kernel extended features manipulation ioctls(), if
available, and fallback to old ops otherwise. Error out when setting
extended features but kernel support is not available.
Note that extended support for get/set backend features is not needed,
as the only feature that can be changed belongs to the 64 bit range.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<150daade3d59e77629276920e014ee8e5fc12121.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: d55ad8c9a9a5edd8152f13fc97879d66972f103e
https://github.com/qemu/qemu/commit/d55ad8c9a9a5edd8152f13fc97879d66972f103e
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/net/vhost_net-stub.c
M hw/net/vhost_net.c
M include/net/vhost_net.h
Log Message:
-----------
vhost-net: implement extended features support
Provide extended version of the features manipulation helpers,
and let the device initialization deal with the full features space,
adjusting the relevant format strings accordingly.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<69c78c432e28e146a8874b2a7d00e9cbd111b1ba.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 3a7741c3bdc3537de4159418d712debbd22e4df6
https://github.com/qemu/qemu/commit/3a7741c3bdc3537de4159418d712debbd22e4df6
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/net/virtio-net.c
M include/hw/virtio/virtio-net.h
Log Message:
-----------
virtio-net: implement extended features support
Use the extended types and helpers to manipulate the virtio_net
features.
Note that offloads are still 64bits wide, as per specification,
and extended offloads will be mapped into such range.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<bc5afdc5c1cb1a37238dd2b36004db3d46cbf211.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: fffac046282c99801b62fa7fa1032cdc261bca6d
https://github.com/qemu/qemu/commit/fffac046282c99801b62fa7fa1032cdc261bca6d
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/net/virtio-net.c
M include/net/net.h
M net/net.c
M net/tap-bsd.c
M net/tap-linux.c
M net/tap-linux.h
M net/tap-solaris.c
M net/tap-stub.c
M net/tap.c
M net/tap_int.h
Log Message:
-----------
net: implement tunnel probing
Tap devices support GSO over UDP tunnel offload. Probe for such
feature in a similar manner to other offloads.
GSO over UDP tunnel needs to be enabled in addition to a "plain"
offload (TSO or USO).
No need to check separately for the outer header checksum offload:
the kernel is going to support both of them or none.
The new features are disabled by default to avoid compat issues,
and could be enabled, after that hw_compat_10_1 will be added,
together with the related compat entries.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<a987a8a7613cbf33bb2209c7c7f5889b512638a7.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: a5289563ad74a2a37e8d2101d82935454c71fef4
https://github.com/qemu/qemu/commit/a5289563ad74a2a37e8d2101d82935454c71fef4
Author: Paolo Abeni <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/net/virtio-net.c
M include/net/net.h
M net/net.c
M net/tap-linux.c
M net/tap.c
Log Message:
-----------
net: implement UDP tunnel features offloading
When any host or guest GSO over UDP tunnel offload is enabled the
virtio net header includes the additional tunnel-related fields,
update the size accordingly.
Push the GSO over UDP tunnel offloads all the way down to the tap
device extending the newly introduced NetFeatures struct, and
eventually enable the associated features.
As per virtio specification, to convert features bit to offload bit,
map the extended features into the reserved range.
Finally, make the vhost backend aware of the exact header layout, to
copy it correctly. The tunnel-related field are present if either
the guest or the host negotiated any UDP tunnel related feature:
add them to the kernel supported features list, to allow qemu
transfer to the backend the needed information.
Reviewed-by: Akihiko Odaki <[email protected]>
Acked-by: Jason Wang <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Tested-by: Lei Yang <[email protected]>
Acked-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<093b4bc68368046bffbcab2202227632d6e4e83b.1758549625.git.pab...@redhat.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 6d65290d83919267a7775bd4877d923a505aae9a
https://github.com/qemu/qemu/commit/6d65290d83919267a7775bd4877d923a505aae9a
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes.c
M include/hw/acpi/ghes.h
Log Message:
-----------
Revert "hw/acpi/ghes: Make ghes_record_cper_errors() static"
The ghes_record_cper_errors() function was introduced to be used
by other types of errors, as part of the error injection
patch series. That's why it is not static.
Make it non-static again to allow its usage outside ghes.c
This reverts commit 611f3bdb20f7828b0813aa90d47d1275ef18329b.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<14f2a888cfbf922d5f2bf94d7612114f25107d59.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 1547c5a5ff894eac9d3666ded3cbf80ce82a28e4
https://github.com/qemu/qemu/commit/1547c5a5ff894eac9d3666ded3cbf80ce82a28e4
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes-stub.c
M hw/acpi/ghes.c
M include/hw/acpi/ghes.h
M target/arm/kvm.c
Log Message:
-----------
acpi/ghes: Cleanup the code which gets ghes ged state
Move the check logic into a common function and simplify the
code which checks if GHES is enabled and was properly setup.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<2bbb1d3eb88b0a668114adef2f1c2a94deebba0e.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 2e9c5c5bc85a4f79a5e5c9d52df6c62bd1b2e116
https://github.com/qemu/qemu/commit/2e9c5c5bc85a4f79a5e5c9d52df6c62bd1b2e116
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes.c
M hw/arm/virt-acpi-build.c
M include/hw/acpi/ghes.h
Log Message:
-----------
acpi/ghes: prepare to change the way HEST offsets are calculated
Add a new ags flag to change the way HEST offsets are calculated.
Currently, offsets needed to store ACPI HEST offsets and read ack
are calculated based on a previous knowledge from the logic
which creates the HEST table.
Such logic is not generic, not allowing to easily add more HEST
entries nor replicates what OSPM does.
As the next patches will be adding a more generic logic, add a
new use_hest_addr, set to false, in preparation for such changes.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<f5de17bf04b27828e1a439ad396b4f7982eaf156.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: db16153f196f0ed7560aa138f08e2ef312ecf005
https://github.com/qemu/qemu/commit/db16153f196f0ed7560aa138f08e2ef312ecf005
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes.c
M include/hw/acpi/ghes.h
Log Message:
-----------
acpi/ghes: add a firmware file with HEST address
Store HEST table address at GPA, placing its the start of the table at
hest_addr_le variable.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<c29aa5e6ab9b2d93dd5328481630c3b03da86261.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: b74d843f7bf43f5e7e1e5b9c34da2034d622cf78
https://github.com/qemu/qemu/commit/b74d843f7bf43f5e7e1e5b9c34da2034d622cf78
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes.c
M include/hw/acpi/ghes.h
Log Message:
-----------
acpi/ghes: Use HEST table offsets when preparing GHES records
There are two pointers that are needed during error injection:
1. The start address of the CPER block to be stored;
2. The address of the read ack.
It is preferable to calculate them from the HEST table. This allows
checking the source ID, the size of the table and the type of the
HEST error block structures.
Yet, keep the old code, as this is needed for migration purposes
from older QEMU versions.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<d4344e8dbe66372e1e093d968eda2e8b0527ba48.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 2c5a2616ed047e9d5e70970af5c4b2a54e9fa290
https://github.com/qemu/qemu/commit/2c5a2616ed047e9d5e70970af5c4b2a54e9fa290
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes.c
M hw/arm/virt-acpi-build.c
M include/hw/acpi/ghes.h
M target/arm/kvm.c
Log Message:
-----------
acpi/ghes: don't hard-code the number of sources for HEST table
The current code is actually dependent on having just one error
structure with a single source, as any change there would cause
migration issues.
As the number of sources should be arch-dependent, as it will depend on
what kind of notifications will exist, and how many errors can be
reported at the same time, change the logic to be more flexible,
allowing the number of sources to be defined when building the
HEST table by the caller.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<1698680848c11d6f26368426f1657e14faaf55c4.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 7a857a8933e073d6e0c5ae2c09ff6c45751be3d7
https://github.com/qemu/qemu/commit/7a857a8933e073d6e0c5ae2c09ff6c45751be3d7
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/ghes.c
M include/hw/acpi/ghes.h
Log Message:
-----------
acpi/ghes: add a notifier to notify when error data is ready
Some error injection notify methods are async, like GPIO
notify. Add a notifier to be used when the error record is
ready to be sent to the guest OS.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Acked-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<edf9c6e5b80dc57e3443893bf9e1eb25cb9d266b.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: d238dedae699a924c92228cb8b3bb8dc861008b5
https://github.com/qemu/qemu/commit/d238dedae699a924c92228cb8b3bb8dc861008b5
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/generic_event_device.c
Log Message:
-----------
acpi/generic_event_device: Update GHES migration to cover hest addr
The GHES migration logic should now support HEST table location too.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<ede7ddf4b10f34094a4327dc458d630ad319bd1c.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: f3f747ddcfc9af2c2c58f70a68723b99db82f778
https://github.com/qemu/qemu/commit/f3f747ddcfc9af2c2c58f70a68723b99db82f778
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/generic_event_device.c
M hw/arm/virt-acpi-build.c
M hw/core/machine.c
Log Message:
-----------
acpi/generic_event_device: add logic to detect if HEST addr is available
Create a new property (x-has-hest-addr) and use it to detect if
the GHES table offsets can be calculated from the HEST address
(qemu 10.0 and upper) or via the legacy way via an offset obtained
from the hardware_errors firmware file.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<c4eb3cf32a3f158ae62dac29e866ac3f373956c3.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: c498a36bcb59d1f96faf4771efe8f655ff5faa20
https://github.com/qemu/qemu/commit/c498a36bcb59d1f96faf4771efe8f655ff5faa20
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-04 (Sat, 04 Oct 2025)
Changed paths:
M hw/acpi/aml-build.c
M hw/acpi/generic_event_device.c
M include/hw/acpi/acpi_dev_interface.h
M include/hw/acpi/aml-build.h
M include/hw/acpi/generic_event_device.h
Log Message:
-----------
acpi/generic_event_device: add an APEI error device
Adds a generic error device to handle generic hardware error
events as specified at ACPI 6.5 specification at 18.3.2.7.2:
https://uefi.org/specs/ACPI/6.5/18_Platform_Error_Interfaces.html#event-notification-for-generic-error-sources
using HID PNP0C33.
The PNP0C33 device is used to report hardware errors to
the guest via ACPI APEI Generic Hardware Error Source (GHES).
Co-authored-by: Mauro Carvalho Chehab <[email protected]>
Co-authored-by: Jonathan Cameron <[email protected]>
Signed-off-by: Jonathan Cameron <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<2790f664c849d53de0ce3049fa8c7950c1de1f86.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 79b10b6639456d244118cf564214495637494931
https://github.com/qemu/qemu/commit/79b10b6639456d244118cf564214495637494931
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/acpi: virt: allow acpi table changes at DSDT and HEST tables
We'll be adding a new GED device for HEST GPIO notification and
increasing the number of entries at the HEST table.
Blocklist testing HEST and DSDT tables until such changes
are completed.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Acked-by: Igor Mammedov <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<7fca7eb9b801f1b196210f66538234b94bd31c23.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: d352e33e1f92e60e12a00be1ea80f47b4e024c88
https://github.com/qemu/qemu/commit/d352e33e1f92e60e12a00be1ea80f47b4e024c88
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M include/hw/arm/virt.h
Log Message:
-----------
arm/virt: Wire up a GED error device for ACPI / GHES
Adds support to ARM virtualization to allow handling
generic error ACPI Event via GED & error source device.
It is aligned with Linux Kernel patch:
https://lore.kernel.org/lkml/[email protected]/
Co-authored-by: Mauro Carvalho Chehab <[email protected]>
Co-authored-by: Jonathan Cameron <[email protected]>
Signed-off-by: Jonathan Cameron <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Acked-by: Igor Mammedov <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<3237a76b1469d669436399495825348bf34122cd.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: ddd8f3baa27dc05251f52e94d1b643bfb93cbc83
https://github.com/qemu/qemu/commit/ddd8f3baa27dc05251f52e94d1b643bfb93cbc83
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M MAINTAINERS
M hw/acpi/Kconfig
M hw/acpi/ghes.c
A hw/acpi/ghes_cper.c
A hw/acpi/ghes_cper_stub.c
M hw/acpi/meson.build
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M include/hw/acpi/ghes.h
M include/hw/arm/virt.h
A qapi/acpi-hest.json
M qapi/meson.build
M qapi/qapi-schema.json
Log Message:
-----------
qapi/acpi-hest: add an interface to do generic CPER error injection
Create a QMP command to be used for generic ACPI APEI hardware error
injection (HEST) via GHESv2, and add support for it for ARM guests.
Error injection uses ACPI_HEST_SRC_ID_QMP source ID to be platform
independent. This is mapped at arch virt bindings, depending on the
types supported by QEMU and by the BIOS. So, on ARM, this is supported
via ACPI_GHES_NOTIFY_GPIO notification type.
This patch was co-authored:
- original ghes logic to inject a simple ARM record by Shiju Jose;
- generic logic to handle block addresses by Jonathan Cameron;
- generic GHESv2 error inject by Mauro Carvalho Chehab;
Co-authored-by: Jonathan Cameron <[email protected]>
Co-authored-by: Shiju Jose <[email protected]>
Co-authored-by: Mauro Carvalho Chehab <[email protected]>
Signed-off-by: Jonathan Cameron <[email protected]>
Signed-off-by: Shiju Jose <[email protected]>
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Acked-by: Igor Mammedov <[email protected]>
Acked-by: Markus Armbruster <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<81e2118b3c8b7e5da341817f277d61251655e0db.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: ecd06271dc3ec2e1963f9c294201fc6337ca7779
https://github.com/qemu/qemu/commit/ecd06271dc3ec2e1963f9c294201fc6337ca7779
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/acpi/generic_event_device.c
Log Message:
-----------
acpi/generic_event_device.c: enable use_hest_addr for QEMU 10.x
Now that we have everything in place, enable using HEST GPA
instead of etc/hardware_errors GPA.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<ad77b64aa1f09141efe942539445908631423975.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 237ca3d57898e4438bc3af6cd87f0a3279198bae
https://github.com/qemu/qemu/commit/237ca3d57898e4438bc3af6cd87f0a3279198bae
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M tests/data/acpi/aarch64/virt/DSDT
M tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
M tests/data/acpi/aarch64/virt/DSDT.acpipcihp
M tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex
M tests/data/acpi/aarch64/virt/DSDT.memhp
M tests/data/acpi/aarch64/virt/DSDT.pxb
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy
M tests/data/acpi/aarch64/virt/DSDT.topology
M tests/data/acpi/aarch64/virt/DSDT.viot
M tests/data/acpi/aarch64/virt/HEST
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/acpi: virt: update HEST and DSDT tables
The following changes for DSDT affecting all files
under tests/data/acpi/aarch64/virt/DSDT* :
-"tests/data/acpi/aarch64/virt/DSDT",
-"tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt",
-"tests/data/acpi/aarch64/virt/DSDT.acpipcihp",
-"tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex",
-"tests/data/acpi/aarch64/virt/DSDT.memhp",
-"tests/data/acpi/aarch64/virt/DSDT.pxb",
-"tests/data/acpi/aarch64/virt/DSDT.topology",
-"tests/data/acpi/aarch64/virt/DSDT.viot",
-"tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev",
-"tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy",
--- /tmp/DSDT_old.dsl 2025-09-05 15:03:18.964968499 +0200
+++ /tmp/DSDT.dsl 2025-09-05 15:03:18.966968470 +0200
@@ -1886,6 +1886,11 @@
{
Notify (PWRB, 0x80) // Status Change
}
+
+ If (((Local0 & 0x20) == 0x20))
+ {
+ Notify (GEDD, 0x80) // Status Change
+ }
}
}
@@ -1894,6 +1899,12 @@
Name (_HID, "PNP0C0C" /* Power Button Device */) // _HID:
Hardware ID
Name (_UID, Zero) // _UID: Unique ID
}
+
+ Device (GEDD)
+ {
+ Name (_HID, "PNP0C33" /* Error Device */) // _HID: Hardware ID
+ Name (_UID, Zero) // _UID: Unique ID
+ }
}
Scope (\_SB.PCI0)
Additionally, HEST changes:
-"tests/data/acpi/aarch64/virt/HEST",
--- /tmp/HEST_old.dsl 2025-09-05 15:03:19.078653625 +0200
+++ /tmp/HEST.dsl 2025-09-05 15:03:19.079511472 +0200
@@ -3,7 +3,7 @@
* AML/ASL+ Disassembler version 20240322 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
- * Disassembly of /tmp/HEST_old
+ * Disassembly of /tmp/HEST
*
* ACPI Data Table [HEST]
*
@@ -11,16 +11,16 @@
*/
[000h 0000 004h] Signature : "HEST" [Hardware Error
Source Table]
-[004h 0004 004h] Table Length : 00000084
+[004h 0004 004h] Table Length : 000000E0
[008h 0008 001h] Revision : 01
-[009h 0009 001h] Checksum : E2
+[009h 0009 001h] Checksum : 6C
[00Ah 0010 006h] Oem ID : "BOCHS "
[010h 0016 008h] Oem Table ID : "BXPC "
[018h 0024 004h] Oem Revision : 00000001
[01Ch 0028 004h] Asl Compiler ID : "BXPC"
[020h 0032 004h] Asl Compiler Revision : 00000001
-[024h 0036 004h] Error Source Count : 00000001
+[024h 0036 004h] Error Source Count : 00000002
[028h 0040 002h] Subtable Type : 000A [Generic Hardware
Error Source V2]
[02Ah 0042 002h] Source Id : 0000
@@ -55,19 +55,62 @@
[069h 0105 001h] Bit Width : 40
[06Ah 0106 001h] Bit Offset : 00
[06Bh 0107 001h] Encoded Access Width : 04 [QWord Access:64]
-[06Ch 0108 008h] Address : 0000000043DA0008
+[06Ch 0108 008h] Address : 0000000043DA0010
[074h 0116 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE
[07Ch 0124 008h] Read Ack Write : 0000000000000001
-Raw Table Data: Length 132 (0x84)
+[084h 0132 002h] Subtable Type : 000A [Generic Hardware
Error Source V2]
+[086h 0134 002h] Source Id : 0001
+[088h 0136 002h] Related Source Id : FFFF
+[08Ah 0138 001h] Reserved : 00
+[08Bh 0139 001h] Enabled : 01
+[08Ch 0140 004h] Records To Preallocate : 00000001
+[090h 0144 004h] Max Sections Per Record : 00000001
+[094h 0148 004h] Max Raw Data Length : 00000400
+
+[098h 0152 00Ch] Error Status Address : [Generic Address Structure]
+[098h 0152 001h] Space ID : 00 [SystemMemory]
+[099h 0153 001h] Bit Width : 40
+[09Ah 0154 001h] Bit Offset : 00
+[09Bh 0155 001h] Encoded Access Width : 04 [QWord Access:64]
+[09Ch 0156 008h] Address : 0000000043DA0008
+
+[0A4h 0164 01Ch] Notify : [Hardware Error
Notification Structure]
+[0A4h 0164 001h] Notify Type : 07 [GPIO]
+[0A5h 0165 001h] Notify Length : 1C
+[0A6h 0166 002h] Configuration Write Enable : 0000
+[0A8h 0168 004h] PollInterval : 00000000
+[0ACh 0172 004h] Vector : 00000000
+[0B0h 0176 004h] Polling Threshold Value : 00000000
+[0B4h 0180 004h] Polling Threshold Window : 00000000
+[0B8h 0184 004h] Error Threshold Value : 00000000
+[0BCh 0188 004h] Error Threshold Window : 00000000
+
+[0C0h 0192 004h] Error Status Block Length : 00000400
+[0C4h 0196 00Ch] Read Ack Register : [Generic Address Structure]
+[0C4h 0196 001h] Space ID : 00 [SystemMemory]
+[0C5h 0197 001h] Bit Width : 40
+[0C6h 0198 001h] Bit Offset : 00
+[0C7h 0199 001h] Encoded Access Width : 04 [QWord Access:64]
+[0C8h 0200 008h] Address : 0000000043DA0018
- 0000: 48 45 53 54 84 00 00 00 01 E2 42 4F 43 48 53 20 //
HEST......BOCHS
+[0D0h 0208 008h] Read Ack Preserve : FFFFFFFFFFFFFFFE
+[0D8h 0216 008h] Read Ack Write : 0000000000000001
+
+Raw Table Data: Length 224 (0xE0)
+
+ 0000: 48 45 53 54 E0 00 00 00 01 6C 42 4F 43 48 53 20 //
HEST.....lBOCHS
0010: 42 58 50 43 20 20 20 20 01 00 00 00 42 58 50 43 // BXPC
....BXPC
- 0020: 01 00 00 00 01 00 00 00 0A 00 00 00 FF FF 00 01 //
................
+ 0020: 01 00 00 00 02 00 00 00 0A 00 00 00 FF FF 00 01 //
................
0030: 01 00 00 00 01 00 00 00 00 04 00 00 00 40 00 04 //
.............@..
0040: 00 00 DA 43 00 00 00 00 08 1C 00 00 00 00 00 00 //
...C............
0050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 //
................
- 0060: 00 00 00 00 00 04 00 00 00 40 00 04 08 00 DA 43 //
[email protected]
+ 0060: 00 00 00 00 00 04 00 00 00 40 00 04 10 00 DA 43 //
[email protected]
0070: 00 00 00 00 FE FF FF FF FF FF FF FF 01 00 00 00 //
................
- 0080: 00 00 00 00 // ....
+ 0080: 00 00 00 00 0A 00 01 00 FF FF 00 01 01 00 00 00 //
................
+ 0090: 01 00 00 00 00 04 00 00 00 40 00 04 08 00 DA 43 //
[email protected]
+ 00A0: 00 00 00 00 07 1C 00 00 00 00 00 00 00 00 00 00 //
................
+ 00B0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 //
................
+ 00C0: 00 04 00 00 00 40 00 04 18 00 DA 43 00 00 00 00 //
[email protected]....
+ 00D0: FE FF FF FF FF FF FF FF 01 00 00 00 00 00 00 00 //
................
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Acked-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<2253eb50df797ab320b4ca610bd22a38e5cfd17a.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 92aad3fc4a0f511819a18a443797069aff77b9ba
https://github.com/qemu/qemu/commit/92aad3fc4a0f511819a18a443797069aff77b9ba
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M docs/specs/acpi_hest_ghes.rst
Log Message:
-----------
docs: hest: add new "etc/acpi_table_hest_addr" and update workflow
While the HEST layout didn't change, there are some internal
changes related to how offsets are calculated and how memory error
events are triggered.
Update specs to reflect such changes.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Igor Mammedov <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<e3e8bd92ce40d997c67ac1d4d973c0041b8f59fc.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 4cc103081b170a80afe3344da4899b525fd4d0a8
https://github.com/qemu/qemu/commit/4cc103081b170a80afe3344da4899b525fd4d0a8
Author: Mauro Carvalho Chehab <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M MAINTAINERS
A scripts/arm_processor_error.py
A scripts/ghes_inject.py
A scripts/qmp_helper.py
Log Message:
-----------
scripts/ghes_inject: add a script to generate GHES error inject
Using the QMP GHESv2 API requires preparing a raw data array
containing a CPER record.
Add a helper script with subcommands to prepare such data.
Currently, only ARM Processor error CPER record is supported, by
using:
$ ghes_inject.py arm
which produces those warnings on Linux:
[ 705.032426] [Firmware Warn]: GHES: Unhandled processor error type 0x02:
cache error
[ 774.866308] {4}[Hardware Error]: Hardware error from APEI Generic Hardware
Error Source: 1
[ 774.866583] {4}[Hardware Error]: event severity: recoverable
[ 774.866738] {4}[Hardware Error]: Error 0, type: recoverable
[ 774.866889] {4}[Hardware Error]: section_type: ARM processor error
[ 774.867048] {4}[Hardware Error]: MIDR: 0x00000000000f0510
[ 774.867189] {4}[Hardware Error]: running state: 0x0
[ 774.867321] {4}[Hardware Error]: Power State Coordination Interface state: 0
[ 774.867511] {4}[Hardware Error]: Error info structure 0:
[ 774.867679] {4}[Hardware Error]: num errors: 2
[ 774.867801] {4}[Hardware Error]: error_type: 0x02: cache error
[ 774.867962] {4}[Hardware Error]: error_info: 0x000000000091000f
[ 774.868124] {4}[Hardware Error]: transaction type: Data Access
[ 774.868280] {4}[Hardware Error]: cache error, operation type: Data write
[ 774.868465] {4}[Hardware Error]: cache level: 2
[ 774.868592] {4}[Hardware Error]: processor context not corrupted
[ 774.868774] [Firmware Warn]: GHES: Unhandled processor error type 0x02:
cache error
Such script allows customizing the error data, allowing to change
all fields at the record. Please use:
$ ghes_inject.py arm -h
For more details about its usage.
Signed-off-by: Mauro Carvalho Chehab <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<5ea174638e33d23635332fa6d4ae9d751355f127.1758610789.git.mchehab+hua...@kernel.org>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: d285591d29e28abe2841ecec9a82f57fc773719f
https://github.com/qemu/qemu/commit/d285591d29e28abe2841ecec9a82f57fc773719f
Author: Daniil Tatianin <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/smbios/smbios.c
M include/hw/firmware/smbios.h
M qemu-options.hx
Log Message:
-----------
hw/smbios: allow clearing the VM bit in SMBIOS table 0
This is useful to be able to freeze a specific version of SeaBIOS to
prevent guest visible changes between BIOS updates. This is currently
not possible since the extension byte 2 provided by SeaBIOS does not
set the VM bit, whereas QEMU sets it unconditionally.
Allowing to clear it also seems useful if we want to hide the fact that
the guest system is running inside a virtual machine.
Signed-off-by: Daniil Tatianin <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: d1193481dee63442fc41e47ca6ebc4cd34f1f69c
https://github.com/qemu/qemu/commit/d1193481dee63442fc41e47ca6ebc4cd34f1f69c
Author: peng guo <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/pc.c
Log Message:
-----------
hw/i386/pc: Avoid overlap between CXL window and PCI 64bit BARs in QEMU
When using a CXL Type 3 device together with a virtio 9p device in QEMU on a
physical server, the 9p device fails to initialize properly. The kernel reports
the following error:
virtio: device uses modern interface but does not have VIRTIO_F_VERSION_1
9pnet_virtio virtio0: probe with driver 9pnet_virtio failed with error -22
Further investigation revealed that the 64-bit BAR space assigned to the 9pnet
device was overlapped by the memory window allocated for the CXL devices. As a
result, the kernel could not correctly access the BAR region, causing the
virtio device to malfunction.
An excerpt from /proc/iomem shows:
480010000-cffffffff : CXL Window 0
480010000-4bfffffff : PCI Bus 0000:00
4c0000000-4c01fffff : PCI Bus 0000:0c
4c0000000-4c01fffff : PCI Bus 0000:0d
4c0200000-cffffffff : PCI Bus 0000:00
4c0200000-4c0203fff : 0000:00:03.0
4c0200000-4c0203fff : virtio-pci-modern
To address this issue, this patch adds the reserved memory end calculation
for cxl devices to reserve sufficient address space and ensure that CXL memory
windows are allocated beyond all PCI 64-bit BARs. This prevents overlap with
64-bit BARs regions such as those used by virtio or other pcie devices,
resolving the conflict.
QEMU Build Configuration:
./configure --prefix=/home/work/qemu_master/build/ \
--target-list=x86_64-softmmu \
--enable-kvm \
--enable-virtfs
QEMU Boot Command:
sudo /home/work/qemu_master/qemu/build/qemu-system-x86_64 \
-nographic -machine q35,cxl=on -enable-kvm -m 16G -smp 8 \
-hda /home/work/gp_qemu/rootfs.img \
-virtfs
local,path=/home/work/gp_qemu/share,mount_tag=host0,security_model=passthrough,id=host0
\
-kernel /home/work/linux_output/arch/x86/boot/bzImage \
--append "console=ttyS0 crashkernel=256M root=/dev/sda rootfstype=ext4
rw loglevel=8" \
-object memory-backend-ram,id=vmem0,share=on,size=4096M \
-device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \
-device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \
-device
cxl-type3,bus=root_port13,volatile-memdev=vmem0,id=cxl-vmem0,sn=0x123456789 \
-M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G
Fixes: 03b39fcf64bc ("hw/cxl: Make the CXL fixed memory window setup a machine
parameter")
Signed-off-by: peng guo <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 2e54e5fda779a7ba45578884276dca62462f7a06
https://github.com/qemu/qemu/commit/2e54e5fda779a7ba45578884276dca62462f7a06
Author: Damien Bergamini <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M docs/pcie_sriov.txt
M hw/net/igbvf.c
M hw/nvme/ctrl.c
M hw/pci/pci.c
M hw/pci/pcie_sriov.c
M include/hw/pci/pcie_sriov.h
Log Message:
-----------
pcie_sriov: Fix broken MMIO accesses from SR-IOV VFs
Starting with commit cab1398a60eb, SR-IOV VFs are realized as soon as
pcie_sriov_pf_init() is called. Because pcie_sriov_pf_init() must be
called before pcie_sriov_pf_init_vf_bar(), the VF BARs types won't be
known when the VF realize function calls pcie_sriov_vf_register_bar().
This breaks the memory regions of the VFs (for instance with igbvf):
$ lspci
...
Region 0: Memory at 281a00000 (64-bit, prefetchable) [virtual] [size=16K]
Region 3: Memory at 281a20000 (64-bit, prefetchable) [virtual] [size=16K]
$ info mtree
...
address-space: pci_bridge_pci_mem
0000000000000000-ffffffffffffffff (prio 0, i/o): pci_bridge_pci
0000000081a00000-0000000081a03fff (prio 1, i/o): igbvf-mmio
0000000081a20000-0000000081a23fff (prio 1, i/o): igbvf-msix
and causes MMIO accesses to fail:
Invalid write at addr 0x281A01520, size 4, region '(null)', reason: rejected
Invalid read at addr 0x281A00C40, size 4, region '(null)', reason: rejected
To fix this, VF BARs are now registered with pci_register_bar() which
has a type parameter and pcie_sriov_vf_register_bar() is removed.
Fixes: cab1398a60eb ("pcie_sriov: Reuse SR-IOV VF device instances")
Signed-off-by: Damien Bergamini <[email protected]>
Signed-off-by: Clement Mathieu--Drif <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 722e9022a0b6db175209bad75aa52b24033249e3
https://github.com/qemu/qemu/commit/722e9022a0b6db175209bad75aa52b24033249e3
Author: Alex Bennée <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M docs/system/devices/vhost-user.rst
M hw/virtio/Kconfig
M hw/virtio/meson.build
R hw/virtio/vhost-user-device-pci.c
R hw/virtio/vhost-user-device.c
A hw/virtio/vhost-user-test-device-pci.c
A hw/virtio/vhost-user-test-device.c
M include/hw/virtio/vhost-user-base.h
Log Message:
-----------
hw/virtio: rename vhost-user-device and make user creatable
We didn't make the device user creatable in the first place because we
were worried users might get confused. Rename the device to make its
nature as a test device even more explicit. While we are at it add a
Kconfig variable so it can be skipped for those that want to thin out
their build configuration even further.
Acked-by: Stefano Garzarella <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Stefan Hajnoczi <[email protected]>
Signed-off-by: Alex Bennée <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: fa82ce2ddee8208c83a5a10bf3ab7348ad3d334a
https://github.com/qemu/qemu/commit/fa82ce2ddee8208c83a5a10bf3ab7348ad3d334a
Author: Igor Mammedov <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/arm/virt.c
M hw/core/machine.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
Log Message:
-----------
smbios: cap DIMM size to 2Tb as workaround for broken Windows
With current limit set to match max spec size (2PTb),
Windows fails to parse type 17 records when DIMM size reaches 4Tb+.
Failure happens in GetPhysicallyInstalledSystemMemory() function,
and fails "Check SMBIOS System Memory Tables" SVVP test.
Though not fatal, it might cause issues for userspace apps,
something like [1].
Lets cap default DIMM size to 2Tb for now, until MS fixes it.
1)
https://issues.redhat.com/browse/RHEL-81999?focusedId=27731200&page=com.atlassian.jira.plugin.system.issuetabpanels:comment-tabpanel#comment-27731200
PS: It's obvious 32 int overflow math somewhere in Windows,
MS admitted that it's Windows bug and in a process of fixing it.
However it's unclear if W10 and earlier would get the fix.
So however I dislike changing defaults, we heed to work around
the issue (it looks like QEMU regression while not being it).
Hopefully 2Tb/DIMM split will last longer until VM memory size
will become large enough to cause to many type 17 records issue
again.
PPS:
Alternatively, instead of messing with defaults, we can create
a dedicated knob to ask for desired DIMM size cap explicitly
on CLI. That will let users to enable workaround when they
hit this corner case. Downside is that knob has to be propagated
up all mgmt stack, which might be not desirable.
PPPS:
Yet alternatively, users can configure initial RAM to be less
than 4Tb and all additional RAM add as DIMMs on QEMU CLI.
(however it's the job to be done by mgmt which could know
Windows version and total amount of RAM)
Signed-off-by: Igor Mammedov <[email protected]>
Fixes: 62f182c97b ("smbios: make memory device size configurable per Machine")
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: ec450d185e4c885396a8e9b9bd2a435c9e0c118f
https://github.com/qemu/qemu/commit/ec450d185e4c885396a8e9b9bd2a435c9e0c118f
Author: CLEMENT MATHIEU--DRIF <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/pci/pcie.c
M include/hw/pci/pcie.h
Log Message:
-----------
pcie: Add a way to get the outstanding page request allocation (pri) from the
config space.
Signed-off-by: Clement Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 57ac646a2ecb2967c46febcfd0f40d396868b4dc
https://github.com/qemu/qemu/commit/57ac646a2ecb2967c46febcfd0f40d396868b4dc
Author: CLEMENT MATHIEU--DRIF <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu.c
Log Message:
-----------
intel_iommu: Bypass barrier wait descriptor
wait_desc with SW=0,IF=0,FN=1 must not be considered as an
invalid descriptor as it is used to implement section 7.10 of
the VT-d spec.
Signed-off-by: Clement Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: fadc6b0402b6e3edc941b638dfca11789d07d730
https://github.com/qemu/qemu/commit/fadc6b0402b6e3edc941b638dfca11789d07d730
Author: CLEMENT MATHIEU--DRIF <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu_internal.h
Log Message:
-----------
intel_iommu: Declare PRI constants and structures
Signed-off-by: Clement Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: b84e1e0730f3063fc453ce2d0a77136f101467a2
https://github.com/qemu/qemu/commit/b84e1e0730f3063fc453ce2d0a77136f101467a2
Author: CLEMENT MATHIEU--DRIF <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu.c
Log Message:
-----------
intel_iommu: Declare registers for PRI
Signed-off-by: Clement Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 676757e50ce0ce206969b02dc2433c9e825e55f5
https://github.com/qemu/qemu/commit/676757e50ce0ce206969b02dc2433c9e825e55f5
Author: CLEMENT MATHIEU--DRIF <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
M include/hw/i386/intel_iommu.h
Log Message:
-----------
intel_iommu: Add PRI operations support
Implement the PRI callbacks in vtd_iommu_ops.
Signed-off-by: Clement Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: b10166b104fad54d5d79024beafe1bcfe8a35c4a
https://github.com/qemu/qemu/commit/b10166b104fad54d5d79024beafe1bcfe8a35c4a
Author: Igor Mammedov <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/isa/lpc_ich9.c
M include/hw/southbridge/ich9.h
Log Message:
-----------
x86: ich9: fix default value of 'No Reboot' bit in GCS
[2] initialized 'No Reboot' bit to 1 by default. And due to quirk it happened
to work with linux iTCO_wdt driver (which clears it on module load).
However spec [1] states:
"
R/W. This bit is set when the “No Reboot” strap (SPKR pin on
ICH9) is sampled high on PWROK.
"
So it should be set only when '-global ICH9-LPC.noreboot=true' and cleared
when it's false (which should be default).
Fix it to behave according to spec and set 'No Reboot' bit only when
'-global ICH9-LPC.noreboot=true'.
1)
Intel I/O Controller Hub 9 (ICH9) Family Datasheet (rev: 004)
2)
Fixes: 920557971b6 (ich9: add TCO interface emulation)
Signed-off-by: Igor Mammedov <[email protected]>
Tested-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 2e41580328a9cdfffce3ee496857c1b2d6ed365e
https://github.com/qemu/qemu/commit/2e41580328a9cdfffce3ee496857c1b2d6ed365e
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/virtio/vhost.c
Log Message:
-----------
vhost: use virtio_config_get_guest_notifier()
There is a getter function so avoid accessing the ->config_notifier
field directly.
Signed-off-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 1e9181dc5277f27fcda21f64a399f12bbf578e5e
https://github.com/qemu/qemu/commit/1e9181dc5277f27fcda21f64a399f12bbf578e5e
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/block/virtio-blk.c
M hw/scsi/virtio-scsi.c
M hw/virtio/trace-events
M hw/virtio/virtio.c
M include/hw/virtio/virtio.h
Log Message:
-----------
virtio: unify virtio_notify_irqfd() and virtio_notify()
The difference between these two functions:
- virtio_notify() uses the interrupt code path (MSI or classic IRQs)
- virtio_notify_irqfd() uses guest notifiers (irqfds)
virtio_notify() can only be called with the BQL held because the
interrupt code path requires the BQL. Device models use
virtio_notify_irqfd() from IOThreads since the BQL is not held.
The two functions can be unified by pushing down the if
(qemu_in_iothread()) check from virtio-blk and virtio-scsi into core
virtio code. This is in preparation for the next commit that will add
irqfd support to virtio_notify_config() and where it's unattractive to
introduce another irqfd-only API for device model callers.
Signed-off-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 3b11003fa67b3f055637ff52e1fe8327f7590ee1
https://github.com/qemu/qemu/commit/3b11003fa67b3f055637ff52e1fe8327f7590ee1
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/virtio/virtio.c
Log Message:
-----------
virtio: support irqfd in virtio_notify_config()
virtio_error() calls virtio_notify_config() to inject a VIRTIO
Configuration Change Notification. This doesn't work from IOThreads
because the BQL is not held and the interrupt code path requires the
BQL.
Follow the same approach as virtio_notify() and use ->config_notifier
(an irqfd) when called from the IOThread.
Signed-off-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: e06d96d5a9f81608ede08576445ac20ac2e73dcc
https://github.com/qemu/qemu/commit/e06d96d5a9f81608ede08576445ac20ac2e73dcc
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M tests/qtest/libqos/virtio.c
M tests/qtest/libqos/virtio.h
Log Message:
-----------
tests/libqos: extract qvirtqueue_set_avail_idx()
Setting the vring's avail.idx can be useful for low-level VIRTIO tests,
especially for testing error scenarios with invalid vrings. Extract it
into a new function so that the next commit can add a test that uses
this new test API.
Signed-off-by: Stefan Hajnoczi <[email protected]>
Acked-by: Fabiano Rosas <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: acaa3be3f7f73d9aafeb2454c01fe50eb8b4a807
https://github.com/qemu/qemu/commit/acaa3be3f7f73d9aafeb2454c01fe50eb8b4a807
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M tests/qtest/virtio-scsi-test.c
Log Message:
-----------
tests/virtio-scsi: add a virtio_error() IOThread test
Now that virtio_error() calls should work in an IOThread, add a
virtio-scsi IOThread test cases that triggers virtio_error().
Signed-off-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: bab681f752048c3bc22d561b1d314c7ec16419c9
https://github.com/qemu/qemu/commit/bab681f752048c3bc22d561b1d314c7ec16419c9
Author: Stefan Hajnoczi <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/pci/pcie_sriov.c
Log Message:
-----------
pcie_sriov: make pcie_sriov_pf_exit() safe on non-SR-IOV devices
Commit 3f9cfaa92c96 ("virtio-pci: Implement SR-IOV PF") added an
unconditional call from virtio_pci_exit() to pcie_sriov_pf_exit().
pcie_sriov_pf_exit() reads from the SR-IOV Capability in Configuration
Space:
uint8_t *cfg = dev->config + dev->exp.sriov_cap;
...
unparent_vfs(dev, pci_get_word(cfg + PCI_SRIOV_TOTAL_VF));
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
This results in undefined behavior when dev->exp.sriov_cap is 0 because
this is not an SR-IOV device. For example, unparent_vfs() segfaults when
total_vfs happens to be non-zero.
Fix this by returning early from pcie_sriov_pf_exit() when
dev->exp.sriov_cap is 0 because this is not an SR-IOV device.
Cc: Akihiko Odaki <[email protected]>
Cc: Michael S. Tsirkin <[email protected]>
Reported-by: Qing Wang <[email protected]>
Buglink: https://issues.redhat.com/browse/RHEL-116443
Signed-off-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Akihiko Odaki <[email protected]>
Fixes: cab1398a60eb ("pcie_sriov: Reuse SR-IOV VF device instances")
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: bc54fb0168961fc61f8752ecdf979e4ab4e2439d
https://github.com/qemu/qemu/commit/bc54fb0168961fc61f8752ecdf979e4ab4e2439d
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M system/memory.c
Log Message:
-----------
memory: Adjust event ranges to fit within notifier boundaries
Invalidating the entire address space (i.e. range of [0, ~0ULL]) is a
valid and required operation by vIOMMU implementations. However, such
invalidations currently trigger an assertion unless they originate from
device IOTLB invalidations.
Although in recent Linux guests this case is not exercised by the VTD
implementation due to various optimizations, the assertion will be hit
by upcoming AMD vIOMMU changes to support DMA address translation. More
specifically, when running a Linux guest with VFIO passthrough device,
and a kernel that does not contain commmit 3f2571fed2fa ("iommu/amd:
Remove redundant domain flush from attach_device()").
Remove the assertion altogether and adjust the range to ensure it does
not cross notifier boundaries.
Signed-off-by: Alejandro Jimenez <[email protected]>
Acked-by: Michael S. Tsirkin <[email protected]>
Acked-by: David Hildenbrand <[email protected]>
Acked-by: Peter Xu <[email protected]>
Message-Id: <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 918973f1d476a62922761c9a5484b309491b652c
https://github.com/qemu/qemu/commit/918973f1d476a62922761c9a5484b309491b652c
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M qemu-options.hx
Log Message:
-----------
amd_iommu: Document '-device amd-iommu' common options
Document the common parameters used when emulating AMD vIOMMU.
Besides the two amd-iommu specific options: 'xtsup' and 'dma-remap', the
the generic x86 IOMMU option 'intremap' is also included, since it is
typically specified in QEMU command line examples and mailing list threads.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: f76fc5d4ca54ea27597b3f0503ddb6e9030bb52d
https://github.com/qemu/qemu/commit/f76fc5d4ca54ea27597b3f0503ddb6e9030bb52d
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Reorder device and page table helpers
Move code related to Device Table and Page Table to an earlier location in
the file, where it does not require forward declarations to be used by the
various invalidation functions that will need to query the DTE and walk the
page table in upcoming changes.
This change consist of code movement only, no functional change intended.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: e8992fee661ace87c4e871f29f5b2caab1153327
https://github.com/qemu/qemu/commit/e8992fee661ace87c4e871f29f5b2caab1153327
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Helper to decode size of page invalidation command
The size of the region to invalidate depends on the S bit and address
encoded in the command. Add a helper to extract this information, which
will be used to sync shadow page tables in upcoming changes.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 786d11853095af9c935aab19d5fd341cfb118feb
https://github.com/qemu/qemu/commit/786d11853095af9c935aab19d5fd341cfb118feb
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Add helper function to extract the DTE
Extracting the DTE from a given AMDVIAddressSpace pointer structure is a
common operation required for syncing the shadow page tables. Implement a
helper to do it and check for common error conditions.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 0f13cc5642ea81fc952ef20515891d12c5193d24
https://github.com/qemu/qemu/commit/0f13cc5642ea81fc952ef20515891d12c5193d24
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Return an error when unable to read PTE from guest memory
Make amdvi_get_pte_entry() return an error value (-1) in cases where the
memory read fails, versus the current return of 0 to indicate failure.
The reason is that 0 is also a valid value to have stored in the PTE in
guest memory i.e. the guest does not have a mapping. Before this change,
amdvi_get_pte_entry() returned 0 for both an error and for empty PTEs, but
the page walker implementation that will be introduced in upcoming changes
needs a method to differentiate between the two scenarios.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: a74bb3110a5b7b5da51ada160732cfc2c83d80d7
https://github.com/qemu/qemu/commit/a74bb3110a5b7b5da51ada160732cfc2c83d80d7
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Add helpers to walk AMD v1 Page Table format
The current amdvi_page_walk() is designed to be called by the replay()
method. Rather than drastically altering it, introduce helpers to fetch
guest PTEs that will be used by a page walker implementation.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 7a2ce64950fbe43038eeba1889a142c5784f5021
https://github.com/qemu/qemu/commit/7a2ce64950fbe43038eeba1889a142c5784f5021
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Add a page walker to sync shadow page tables on invalidation
For the specified address range, walk the page table identifying regions
as mapped or unmapped and invoke registered notifiers with the
corresponding event type.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 557f4cda12da8cd4c77af3a2b41c8331116996af
https://github.com/qemu/qemu/commit/557f4cda12da8cd4c77af3a2b41c8331116996af
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Add basic structure to support IOMMU notifier updates
Add the minimal data structures required to maintain a list of address
spaces (i.e. devices) with registered notifiers, and to update the type of
events that require notifications.
Note that the ability to register for MAP notifications is not available.
It will be unblocked by following changes that enable the synchronization of
guest I/O page tables with host IOMMU state, at which point an amd-iommu
device property will be introduced to control this capability.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: a1c97c395729164747f2f30e9b8ec5d497af95c9
https://github.com/qemu/qemu/commit/a1c97c395729164747f2f30e9b8ec5d497af95c9
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Sync shadow page tables on page invalidation
When the guest issues an INVALIDATE_IOMMU_PAGES command, decode the address
and size of the invalidation and sync the guest page table state with the
host. This requires walking the guest page table and calling notifiers
registered for address spaces matching the domain ID encoded in the command.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: fe0a58f770330165c885d323632541c4d9f2983d
https://github.com/qemu/qemu/commit/fe0a58f770330165c885d323632541c4d9f2983d
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Use iova_tree records to determine large page size on UNMAP
Keep a record of mapped IOVA ranges per address space, using the iova_tree
implementation. Besides enabling optimizations like avoiding unnecessary
notifications, a record of existing <IOVA, size> mappings makes it possible
to determine if a specific IOVA is mapped by the guest using a large page,
and adjust the size when notifying UNMAP events.
When unmapping a large page, the information in the guest PTE encoding the
page size is lost, since the guest clears the PTE before issuing the
invalidation command to the IOMMU. In such case, the size of the original
mapping can be retrieved from the iova_tree and used to issue the UNMAP
notification. Using the correct size is essential since the VFIO IOMMU
Type1v2 driver in the host kernel will reject unmap requests that do not
fully cover previous mappings.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 63e39ec114d51c15f2b76709e874bef5bbd413cb
https://github.com/qemu/qemu/commit/63e39ec114d51c15f2b76709e874bef5bbd413cb
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Unmap all address spaces under the AMD IOMMU on reset
Support dropping all existing mappings on reset. When the guest kernel
reboots it will create new ones, but other components that run before
the kernel (e.g. OVMF) should not be able to use existing mappings from
the previous boot.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 1221c4a44902ed6162b06b30b7fcc245c39c2006
https://github.com/qemu/qemu/commit/1221c4a44902ed6162b06b30b7fcc245c39c2006
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Add replay callback
A replay() method is necessary to efficiently synchronize the host page
tables after VFIO registers a notifier for IOMMU events. It is called to
ensure that existing mappings from an IOMMU memory region are "replayed" to
a specified notifier, initializing or updating the shadow page tables on the
host.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: b6a59a2ebf13df35370440b63ea1b8cf0f06435b
https://github.com/qemu/qemu/commit/b6a59a2ebf13df35370440b63ea1b8cf0f06435b
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL
When the kernel IOMMU driver issues an INVALIDATE_IOMMU_ALL, the address
translation and interrupt remapping information must be cleared for all
Device IDs and all domains. Introduce a helper to sync the shadow page table
for all the address spaces with registered notifiers, which replays both MAP
and UNMAP events.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: cb906e6f69d9ac7de819ad83a0e8a89d836a6bb8
https://github.com/qemu/qemu/commit/cb906e6f69d9ac7de819ad83a0e8a89d836a6bb8
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Toggle memory regions based on address translation mode
Enable the appropriate memory region for an address space depending on the
address translation mode selected for it. This is currently based on a
generic x86 IOMMU property, and only done during the address space
initialization. Extract the code into a helper and toggle the regions based
on whether the specific address space is using address translation (via the
newly introduced addr_translation field). Later, region activation will also
be controlled by availability of DMA remapping capability (via dma-remap
property to be introduced in follow up changes).
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 01f599d39c0e845d1cd0f7521aac7d409a3a6ad7
https://github.com/qemu/qemu/commit/01f599d39c0e845d1cd0f7521aac7d409a3a6ad7
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Set all address spaces to use passthrough mode on reset
On reset, restore the default address translation mode (passthrough) for all
the address spaces managed by the vIOMMU.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 7e24cddf1f7941825e195e3239f0345d81927c14
https://github.com/qemu/qemu/commit/7e24cddf1f7941825e195e3239f0345d81927c14
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Add dma-remap property to AMD vIOMMU device
In order to enable device assignment with IOMMU protection and guest DMA
address translation, IOMMU MAP notifier support is necessary to allow users
like VFIO to synchronize the shadow page tables i.e. to receive
notifications when the guest updates its I/O page tables and replay the
mappings onto host I/O page tables.
Provide a new dma-remap property to govern the ability to register for MAP
notifications, effectively providing global control over the DMA address
translation functionality that was implemented in previous changes.
Note that DMA remapping support also requires the vIOMMU is configured with
the NpCache capability, so a guest driver issues IOMMU invalidations for
both map() and unmap() operations. This capability is already set by default
and written to the configuration in amdvi_pci_realize() as part of
AMDVI_CAPAB_FEATURES.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: a9721c5d80ff23a018f40cc3693678a60630c659
https://github.com/qemu/qemu/commit/a9721c5d80ff23a018f40cc3693678a60630c659
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Toggle address translation mode on devtab entry invalidation
A guest must issue an INVALIDATE_DEVTAB_ENTRY command after changing a
Device Table entry (DTE) e.g. after attaching a device and setting up its
DTE. When intercepting this event, determine if the DTE has been configured
for paging or not, and toggle the appropriate memory regions to allow DMA
address translation for the address space if needed. Requires dma-remap=on.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: f6b5644c90847a9a7b9d2926556e1e71c4d1c797
https://github.com/qemu/qemu/commit/f6b5644c90847a9a7b9d2926556e1e71c4d1c797
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Do not assume passthrough translation when DTE[TV]=0
The AMD I/O Virtualization Technology (IOMMU) Specification (see Table
8: V, TV, and GV Fields in Device Table Entry), specifies that a DTE
with V=1, TV=0 does not contain a valid address translation information.
If a request requires a table walk, the walk is terminated when this
condition is encountered.
Do not assume that addresses for a device with DTE[TV]=0 are passed
through (i.e. not remapped) and instead terminate the page table walk
early.
Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU")
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: de83472bee07aea583b777dce4666faa677d1c18
https://github.com/qemu/qemu/commit/de83472bee07aea583b777dce4666faa677d1c18
Author: Alejandro Jimenez <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/amd_iommu.c
Log Message:
-----------
amd_iommu: Refactor amdvi_page_walk() to use common code for page walk
Simplify amdvi_page_walk() by making it call the fetch_pte() helper that is
already in use by the shadow page synchronization code. Ensures all code
uses the same page table walking algorithm.
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: b6b49c2cd6c2be8aac80f7563950398c7128f19e
https://github.com/qemu/qemu/commit/b6b49c2cd6c2be8aac80f7563950398c7128f19e
Author: Joao Martins <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/x86-iommu.c
M include/hw/i386/x86-iommu.h
Log Message:
-----------
intel-iommu: Move dma_translation to x86-iommu
To be later reused by AMD, now that it shares similar property.
Signed-off-by: Joao Martins <[email protected]>
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: d9ec848fb515f4c98f5737ad1f788ef06887fc2c
https://github.com/qemu/qemu/commit/d9ec848fb515f4c98f5737ad1f788ef06887fc2c
Author: Joao Martins <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/acpi-build.c
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: HATDis/HATS=11 support
Add a way to disable DMA translation support in AMD IOMMU by
allowing to set IVHD HATDis to 1, and exposing HATS (Host Address
Translation Size) as Reserved value.
Signed-off-by: Joao Martins <[email protected]>
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 221e59e3835c71bd3a09d05a39cd192e772aaec3
https://github.com/qemu/qemu/commit/221e59e3835c71bd3a09d05a39cd192e772aaec3
Author: Li Zhaoxin <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/virtio/vdpa-dev.c
Log Message:
-----------
vdpa-dev: add get_vhost() callback for vhost-vdpa device
Commit c255488d67 "virtio: add vhost support for virtio devices"
added the get_vhost() function, but it did not include vhost-vdpa devices.
So when I use the vdpa device and query the status of the vdpa device
with the x-query-virtio-status qmp command, since vdpa does not implement
vhost_get, it will cause qemu to crash.
Therefore, in order to obtain the status of the virtio device under vhost-vdpa,
we need to add a vhost_get implement for the vdpa device.
Co-developed-by: Miao Kezhan <[email protected]>
Signed-off-by: Miao Kezhan <[email protected]>
Signed-off-by: Li Zhaoxin <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID:
<2778f817cb6740a15ecb37927804a67288b062d1.1758860411.git.lizhaoxi...@baidu.com>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 0305eceecdf100b98e4f230bf5a821621815a026
https://github.com/qemu/qemu/commit/0305eceecdf100b98e4f230bf5a821621815a026
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
Log Message:
-----------
intel_iommu: Enable Enhanced Set Root Table Pointer Support (ESRTPS)
According to VTD spec rev 4.1 section 6.6:
"For implementations reporting the Enhanced Set Root Table Pointer Support
(ESRTPS) field as Clear, on a 'Set Root Table Pointer' operation, software
must perform a global invalidate of the context cache, PASID-cache (if
applicable), and IOTLB, in that order. This is required to ensure hardware
references only the remapping structures referenced by the new root table
pointer and not stale cached entries.
For implementations reporting the Enhanced Set Root Table Pointer Support
(ESRTPS) field as Set, as part of 'Set Root Table Pointer' operation,
hardware performs global invalidation on all DMA remapping translation
caches and hence software is not required to perform additional
invalidations"
We already implemented ESRTPS capability in vtd_handle_gcmd_srtp() by
calling vtd_reset_caches(), just set ESRTPS in DMAR_CAP_REG to avoid
unnecessary global invalidation requests of context, PASID-cache and
IOTLB from guest.
This change doesn't impact migration as the content of DMAR_CAP_REG is
migrated too.
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 3cda33e06e72412512c0f376a5261e0ff6ebe73f
https://github.com/qemu/qemu/commit/3cda33e06e72412512c0f376a5261e0ff6ebe73f
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/pc.c
Log Message:
-----------
intel_iommu: Simplify caching mode check with VFIO device
In early days, we had different tricks to ensure caching-mode=on with VFIO
device:
28cf553afe ("intel_iommu: Sanity check vfio-pci config on machine init done")
c6cbc29d36 ("pc/q35: Disallow vfio-pci hotplug without VT-d caching mode")
There is also a patch with the same purpose but for VDPA device:
b8d78277c0 ("intel-iommu: fail MAP notifier without caching mode")
Because without caching mode, MAP notifier won't work correctly since guest
won't send IOTLB update event when it establishes new mappings in the I/O page
tables.
Now with host IOMMU device interface between VFIO and vIOMMU, we can simplify
first two commits above with a small check in set_iommu_device(). This also
works for future IOMMUFD backed VDPA implementation which may also need caching
mode on. But for legacy VDPA we still need commit b8d78277c0 as it doesn't
use the host IOMMU device interface.
For coldplug VFIO device:
qemu-system-x86_64: -device
vfio-pci,host=0000:3b:00.0,id=hostdev3,bus=root0,iommufd=iommufd0: vfio
0000:3b:00.0: Failed to set vIOMMU: Device assignment is not allowed without
enabling caching-mode=on for Intel IOMMU.
For hotplug VFIO device:
if "iommu=off" is configured in guest,
Error: vfio 0000:3b:00.0: Failed to set vIOMMU: Device assignment is not
allowed without enabling caching-mode=on for Intel IOMMU.
else
Error: vfio 0000:3b:00.0: memory listener initialization failed: Region
vtd-00.0-dmar: device 01.00.0 requires caching mode: Operation not supported
The specialty for hotplug is due to the check in commit b8d78277c0 happen before
the check in set_iommu_device.
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 5c1ded52ac04ee818f642766e3f3b69c78fa160f
https://github.com/qemu/qemu/commit/5c1ded52ac04ee818f642766e3f3b69c78fa160f
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/pci/pci.c
Log Message:
-----------
pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn()
The 2nd parameter of pci_device_get_iommu_bus_devfn() about root PCIBus
backed by an IOMMU for the PCI device, the 3rd is about aliased PCIBus
of the PCI device.
Meanwhile the 3rd and 4th parameters are optional, pass NULL if they
are not needed.
Reviewed-by: Clément Mathieu--Drif <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-ID: <[email protected]>
Fixes: a849ff5d6f ("pci: Add a pci-level initialization function for IOMMU
notifiers")
Fixes: f0f37daf8e ("pci: Add a PCI-level API for PRI")
Fixes: e9b457500a ("pci: Add a pci-level API for ATS")
Fixes: 042cbc9aec ("pci: Add an API to get IOMMU's min page size and virtual
address width")
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: e209d4d7a31b9f82925a2205e6e19e61a3facbe0
https://github.com/qemu/qemu/commit/e209d4d7a31b9f82925a2205e6e19e61a3facbe0
Author: Alessandro Ratti <[email protected]>
Date: 2025-10-05 (Sun, 05 Oct 2025)
Changed paths:
M hw/core/qdev.c
M hw/virtio/virtio.c
M include/hw/qdev-core.h
Log Message:
-----------
virtio: improve virtqueue mapping error messages
Improve error reporting when virtqueue ring mapping fails by including a
device identifier in the error message.
Introduce a helper qdev_get_printable_name() in qdev-core, which returns
either:
- the device ID, if explicitly provided (e.g. -device ...,id=foo)
- the QOM path from qdev_get_dev_path(dev) otherwise
- "<unknown device>" as a fallback when no identifier is present
This makes it easier to identify which device triggered the error in
multi-device setups or when debugging complex guest configurations.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/230
Buglink: https://bugs.launchpad.net/qemu/+bug/1919021
Suggested-by: Markus Armbruster <[email protected]>
Signed-off-by: Alessandro Ratti <[email protected]>
Message-Id: <[email protected]>
Reviewed-by: Daniel P. Berrangé <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Commit: 92a0dcbd751d771512b9dedd97e00553181b7699
https://github.com/qemu/qemu/commit/92a0dcbd751d771512b9dedd97e00553181b7699
Author: Richard Henderson <[email protected]>
Date: 2025-10-06 (Mon, 06 Oct 2025)
Changed paths:
M MAINTAINERS
M docs/pcie_sriov.txt
M docs/specs/acpi_hest_ghes.rst
M docs/system/devices/vhost-user.rst
M hw/acpi/Kconfig
M hw/acpi/aml-build.c
M hw/acpi/generic_event_device.c
M hw/acpi/ghes-stub.c
M hw/acpi/ghes.c
A hw/acpi/ghes_cper.c
A hw/acpi/ghes_cper_stub.c
M hw/acpi/meson.build
M hw/arm/virt-acpi-build.c
M hw/arm/virt.c
M hw/block/virtio-blk.c
M hw/core/machine.c
M hw/core/qdev.c
M hw/i386/acpi-build.c
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
M hw/i386/pc.c
M hw/i386/pc_piix.c
M hw/i386/pc_q35.c
M hw/i386/x86-iommu.c
M hw/isa/lpc_ich9.c
M hw/net/e1000e_core.c
M hw/net/igb_core.c
M hw/net/igbvf.c
M hw/net/vhost_net-stub.c
M hw/net/vhost_net.c
M hw/net/virtio-net.c
M hw/net/vmxnet3.c
M hw/nvme/ctrl.c
M hw/pci/pci.c
M hw/pci/pcie.c
M hw/pci/pcie_sriov.c
M hw/scsi/virtio-scsi.c
M hw/smbios/smbios.c
M hw/virtio/Kconfig
M hw/virtio/meson.build
M hw/virtio/trace-events
M hw/virtio/vdpa-dev.c
M hw/virtio/vhost-backend.c
R hw/virtio/vhost-user-device-pci.c
R hw/virtio/vhost-user-device.c
A hw/virtio/vhost-user-test-device-pci.c
A hw/virtio/vhost-user-test-device.c
M hw/virtio/vhost.c
M hw/virtio/virtio-bus.c
M hw/virtio/virtio-hmp-cmds.c
M hw/virtio/virtio-pci.c
M hw/virtio/virtio-qmp.c
M hw/virtio/virtio-qmp.h
M hw/virtio/virtio.c
M include/hw/acpi/acpi_dev_interface.h
M include/hw/acpi/aml-build.h
M include/hw/acpi/generic_event_device.h
M include/hw/acpi/ghes.h
M include/hw/arm/virt.h
M include/hw/firmware/smbios.h
M include/hw/i386/intel_iommu.h
M include/hw/i386/x86-iommu.h
M include/hw/pci/pcie.h
M include/hw/pci/pcie_sriov.h
M include/hw/qdev-core.h
M include/hw/southbridge/ich9.h
M include/hw/virtio/vhost-backend.h
M include/hw/virtio/vhost-user-base.h
M include/hw/virtio/vhost.h
A include/hw/virtio/virtio-features.h
M include/hw/virtio/virtio-net.h
M include/hw/virtio/virtio-pci.h
M include/hw/virtio/virtio.h
M include/net/net.h
M include/net/vhost_net.h
M include/standard-headers/drm/drm_fourcc.h
M include/standard-headers/linux/ethtool.h
M include/standard-headers/linux/input-event-codes.h
M include/standard-headers/linux/input.h
M include/standard-headers/linux/pci_regs.h
M include/standard-headers/linux/vhost_types.h
M include/standard-headers/linux/virtio_net.h
M linux-headers/LICENSES/preferred/GPL-2.0
M linux-headers/asm-arm64/unistd_64.h
M linux-headers/asm-generic/unistd.h
M linux-headers/asm-loongarch/unistd_64.h
M linux-headers/asm-mips/unistd_n32.h
M linux-headers/asm-mips/unistd_n64.h
M linux-headers/asm-mips/unistd_o32.h
M linux-headers/asm-powerpc/kvm.h
M linux-headers/asm-powerpc/unistd_32.h
M linux-headers/asm-powerpc/unistd_64.h
M linux-headers/asm-riscv/kvm.h
M linux-headers/asm-riscv/unistd_32.h
M linux-headers/asm-riscv/unistd_64.h
M linux-headers/asm-s390/unistd_32.h
M linux-headers/asm-s390/unistd_64.h
M linux-headers/asm-x86/unistd_32.h
M linux-headers/asm-x86/unistd_64.h
M linux-headers/asm-x86/unistd_x32.h
M linux-headers/linux/iommufd.h
M linux-headers/linux/kvm.h
M linux-headers/linux/vfio.h
M linux-headers/linux/vhost.h
M net/net.c
M net/netmap.c
M net/tap-bsd.c
M net/tap-linux.c
M net/tap-linux.h
M net/tap-solaris.c
M net/tap-stub.c
M net/tap.c
M net/tap_int.h
A qapi/acpi-hest.json
M qapi/meson.build
M qapi/qapi-schema.json
M qapi/virtio.json
M qemu-options.hx
A scripts/arm_processor_error.py
A scripts/ghes_inject.py
A scripts/qmp_helper.py
M scripts/update-linux-headers.sh
M system/memory.c
M target/arm/kvm.c
M tests/data/acpi/aarch64/virt/DSDT
M tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
M tests/data/acpi/aarch64/virt/DSDT.acpipcihp
M tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex
M tests/data/acpi/aarch64/virt/DSDT.memhp
M tests/data/acpi/aarch64/virt/DSDT.pxb
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy
M tests/data/acpi/aarch64/virt/DSDT.topology
M tests/data/acpi/aarch64/virt/DSDT.viot
M tests/data/acpi/aarch64/virt/HEST
M tests/qtest/libqos/virtio.c
M tests/qtest/libqos/virtio.h
M tests/qtest/virtio-scsi-test.c
Log Message:
-----------
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu
into staging
virtio,pci,pc: features, fixes
users can now control VM bit in smbios.
vhost-user-device is now user-createable.
intel_iommu now supports PRI
virtio-net now supports GSO over UDP tunnel
ghes now supports error injection
amd iommu now supports dma remapping for vfio
better error messages for virtio
small fixes all over the place.
Signed-off-by: Michael S. Tsirkin <[email protected]>
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# gpg: Signature made Sun 05 Oct 2025 01:19:25 PM PDT
# gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469
# gpg: issuer "[email protected]"
# gpg: Good signature from "Michael S. Tsirkin <[email protected]>" [unknown]
# gpg: aka "Michael S. Tsirkin <[email protected]>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (75
commits)
virtio: improve virtqueue mapping error messages
pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn()
intel_iommu: Simplify caching mode check with VFIO device
intel_iommu: Enable Enhanced Set Root Table Pointer Support (ESRTPS)
vdpa-dev: add get_vhost() callback for vhost-vdpa device
amd_iommu: HATDis/HATS=11 support
intel-iommu: Move dma_translation to x86-iommu
amd_iommu: Refactor amdvi_page_walk() to use common code for page walk
amd_iommu: Do not assume passthrough translation when DTE[TV]=0
amd_iommu: Toggle address translation mode on devtab entry invalidation
amd_iommu: Add dma-remap property to AMD vIOMMU device
amd_iommu: Set all address spaces to use passthrough mode on reset
amd_iommu: Toggle memory regions based on address translation mode
amd_iommu: Invalidate address translations on INVALIDATE_IOMMU_ALL
amd_iommu: Add replay callback
amd_iommu: Unmap all address spaces under the AMD IOMMU on reset
amd_iommu: Use iova_tree records to determine large page size on UNMAP
amd_iommu: Sync shadow page tables on page invalidation
amd_iommu: Add basic structure to support IOMMU notifier updates
amd_iommu: Add a page walker to sync shadow page tables on invalidation
...
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/5ec7136ddd5e...92a0dcbd751d
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