Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: d9a8e9d79ade5b82d9ba467fbcb49a9003b88e28
https://github.com/qemu/qemu/commit/d9a8e9d79ade5b82d9ba467fbcb49a9003b88e28
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/virtio/virtio-mem.c
Log Message:
-----------
hw/virtio/virtio-mem: Convert VIRTIO_MEM_USABLE_EXTENT to runtime
Use target_arch() to check at runtime which target architecture
is being run.
Note, since TARGET_ARM is defined for TARGET_AARCH64, we
check for both ARM & AARCH64 enum values.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Acked-by: David Hildenbrand <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 0d9468ba523431794b0d11da64a7f67b95fe3ed4
https://github.com/qemu/qemu/commit/0d9468ba523431794b0d11da64a7f67b95fe3ed4
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/virtio/virtio-mem.c
Log Message:
-----------
hw/virtio/virtio-mem: Convert VIRTIO_MEM_HAS_LEGACY_GUESTS to runtime
Check legacy guests support at runtime: instead of evaluating
the VIRTIO_MEM_HAS_LEGACY_GUESTS definition at compile time,
call target_arch() to detect which target is being run at runtime.
Register virtio_mem_legacy_guests_properties[] at runtime.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Acked-by: David Hildenbrand <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: f1ee11469318a1e5d9da16b6c6c6b51c99b3edf5
https://github.com/qemu/qemu/commit/f1ee11469318a1e5d9da16b6c6c6b51c99b3edf5
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/virtio/meson.build
Log Message:
-----------
hw/virtio: Compile virtio-mem.c once
Remove unused "system/ram_addr.h" header. This file doesn't
use any target specific definitions anymore, compile it once
by moving it to system_virtio_ss[].
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: David Hildenbrand <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Acked-by: David Hildenbrand <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 62ef928312a981d0e25672f72dd467f4a0c05463
https://github.com/qemu/qemu/commit/62ef928312a981d0e25672f72dd467f4a0c05463
Author: BALATON Zoltan <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/pci-host/raven.c
Log Message:
-----------
hw/pci-host/raven: Simplify direct config access address decoding
Use ctz instead of an open coded version and rename function to better
show what it does.
Signed-off-by: BALATON Zoltan <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID:
<68c038fd225463db282d0277d80cb525e0551413.1760795082.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 046d2e21fcf6a8b0dca8555da2d5684ca8a4dd82
https://github.com/qemu/qemu/commit/046d2e21fcf6a8b0dca8555da2d5684ca8a4dd82
Author: BALATON Zoltan <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/pci-host/raven.c
Log Message:
-----------
hw/pci-host/raven: Rename direct config access ops
Rename memory io ops implementing PCI configuration direct access to
mmcfg which describes better what these are for.
Signed-off-by: BALATON Zoltan <[email protected]>
Reviewed-by: Mark Cave-Ayland <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID:
<74fcd70106289663ea426161aada78e879995d6c.1760795082.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: dcff29f4cca2090d8454aa8a6ba23511e4758ff4
https://github.com/qemu/qemu/commit/dcff29f4cca2090d8454aa8a6ba23511e4758ff4
Author: BALATON Zoltan <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/pci-host/raven.c
Log Message:
-----------
hw/pci-host/raven: Use correct parameter in direct access ops
Instead of passing unneeded enclosing objects to the config direct
access ops that only need the bus we can pass that directly thus
simplifying the functions.
Signed-off-by: BALATON Zoltan <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID:
<226e0756661e72a03ba363887730112a58acde85.1760795082.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 2c6fab1c143059e59128b805f4e6a6796eedee43
https://github.com/qemu/qemu/commit/2c6fab1c143059e59128b805f4e6a6796eedee43
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/core/machine-qmp-cmds.c
M monitor/qemu-config-qmp.c
M system/vl.c
Log Message:
-----------
hw/core: Filter machine list available for a particular target binary
Binaries can register a QOM type to filter their machines
by filling their TargetInfo::machine_typename field.
Commit 28502121be7 ("system/vl: Filter machine list available
for a particular target binary") added the filter to
machine_help_func() but missed the other places where the machine
list must be filtered, such QMP 'query-machines' command used by
QTests, and select_machine(). Fix that.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Message-Id: <[email protected]>
Commit: 42a4700bb9c6e9424b3ed12f041209e0770f971c
https://github.com/qemu/qemu/commit/42a4700bb9c6e9424b3ed12f041209e0770f971c
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/core/machine.c
M include/hw/boards.h
Log Message:
-----------
hw/core/machine: Allow dynamic registration of valid CPU types
Add MachineClass::get_valid_cpu_types(), a helper that
returns a dynamic list of CPU types. Since the helper
takes a MachineState argument, we know the machine is
created by the time we call it.
Suggested-by: Pierrick Bouvier <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Message-Id: <[email protected]>
Commit: 6d06b1e3f6b2f906767e2faa1b781dcef2308bd0
https://github.com/qemu/qemu/commit/6d06b1e3f6b2f906767e2faa1b781dcef2308bd0
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/core/machine.c
M include/hw/boards.h
M system/vl.c
Log Message:
-----------
hw/core: Introduce MachineClass::get_default_cpu_type() helper
MachineClass::get_default_cpu_type() runs once the machine is
created, being able to evaluate runtime checks; it returns the
machine default CPU type.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Message-Id: <[email protected]>
Commit: 0f212b0d12cc35d4600d08d4a337f4b6c243f07b
https://github.com/qemu/qemu/commit/0f212b0d12cc35d4600d08d4a337f4b6c243f07b
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M include/hw/boards.h
Log Message:
-----------
hw/boards: Move DEFINE_MACHINE() definition closer to its doc string
Code movement to have the DEFINE_MACHINE() definition follow
its usage documentation comment.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Message-Id: <[email protected]>
Commit: ce837a4fd65dedf04abb3fac7f69c26c69dfbe9a
https://github.com/qemu/qemu/commit/ce837a4fd65dedf04abb3fac7f69c26c69dfbe9a
Author: BALATON Zoltan <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M include/hw/boards.h
Log Message:
-----------
hw/boards: Extend DEFINE_MACHINE macro to cover more use cases
Add a more general DEFINE_MACHINE_EXTENDED macro and define simpler
versions with less parameters based on that. This is inspired by how
the OBJECT_DEFINE macros do this in a similar way to allow using the
shortened definition in more complex cases too.
Signed-off-by: BALATON Zoltan <[email protected]>
Message-ID:
<d75c8bbed97650f1a4d2d675444582a240a335b4.1760798392.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Commit: a4d934ea079563a38cc6ea4a556da3fb14a2b753
https://github.com/qemu/qemu/commit/a4d934ea079563a38cc6ea4a556da3fb14a2b753
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M include/hw/boards.h
Log Message:
-----------
hw/boards: Introduce DEFINE_MACHINE_WITH_INTERFACE_ARRAY() macro
DEFINE_MACHINE_WITH_INTERFACE_ARRAY() is similar to
DEFINE_MACHINE_WITH_INTERFACES() but allows to pass
an InterfaceInfo[] pointer.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Message-Id: <[email protected]>
Commit: 40eed74cc9deaa4343b31e49a6fbf7f037e8d841
https://github.com/qemu/qemu/commit/40eed74cc9deaa4343b31e49a6fbf7f037e8d841
Author: BALATON Zoltan <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/i2c/smbus_eeprom.c
Log Message:
-----------
hw/i2c/smbus_eeprom: Add minimum write recovery time for DDR2
This is needed for newer u-boot-sam460ex versions to pass the DRAM
setup.
Signed-off-by: BALATON Zoltan <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 270b28681e369082dc17f58eae2871b75d3e8e6c
https://github.com/qemu/qemu/commit/270b28681e369082dc17f58eae2871b75d3e8e6c
Author: Thomas Huth <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/ppc/e500.c
Log Message:
-----------
hw/ppc/e500: Check for compatible CPU type instead of aborting ungracefully
When using the ppce500 machine with an embedded CPU type that has
the right MMU model, but is not part of the e500 CPU family, QEMU
currently aborts ungracefully:
$ ./qemu-system-ppc -machine ppce500 -cpu e200z5 -nographic
qemu-system-ppc: ../qemu/hw/core/gpio.c:108: qdev_get_gpio_in_named:
Assertion `n >= 0 && n < gpio_list->num_in' failed.
Aborted (core dumped)
The ppce500 machine expects a CPU with certain GPIO interrupt pins,
so let's replace the coarse check for the MMU_BOOKE206 model with
a more precise check that only allows CPUs from the e500 family.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3162
Signed-off-by: Thomas Huth <[email protected]>
Acked-by: Bernhard Beschow <[email protected]>
Reviewed-by: Harsh Prateek Bora <[email protected]>
Reviewed-by: BALATON Zoltan <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 6095c7dd3b6750eaac7eee7a6327ae68af19097e
https://github.com/qemu/qemu/commit/6095c7dd3b6750eaac7eee7a6327ae68af19097e
Author: Jan Kiszka <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/openrisc/openrisc_sim.c
Log Message:
-----------
hw/openrisc/openrisc_sim: Avoid buffer overflow build error
Resolves this build breakage (which is actually a false-positive)
../hw/openrisc/openrisc_sim.c: In function ‘openrisc_sim_init’:
../hw/openrisc/openrisc_sim.c:284:45: error: ‘__builtin___snprintf_chk’ output
may be truncated before the last format character [-Werror=format-truncation=]
snprintf(alias, sizeof(alias), "serial%d", uart_idx);
^
In file included from /usr/include/stdio.h:964:0,
from /data/qemu/include/qemu/osdep.h:114,
from ../hw/openrisc/openrisc_sim.c:21:
/usr/include/bits/stdio2.h:54:10: note: ‘__builtin___snprintf_chk’ output
between 8 and 9 bytes into a destination of size 8
return __builtin___snprintf_chk (__s, __n, __USE_FORTIFY_LEVEL - 1,
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
__glibc_objsize (__s), __fmt,
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
__va_arg_pack ());
~~~~~~~~~~~~~~~~~
by using a modern, more robust allocation pattern.
Suggested-by: Peter Maydell <[email protected]>
Signed-off-by: Jan Kiszka <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: f74ce602264d05f3b17de6d431f887fa0f0d5932
https://github.com/qemu/qemu/commit/f74ce602264d05f3b17de6d431f887fa0f0d5932
Author: Roger Pau Monne <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/xen/xen_pt_msi.c
Log Message:
-----------
hw/xen: pass PCI domain to xc_physdev_map_pirq_msi()
It's currently impossible for passthrough devices on segment different
than 0 to work correctly, as the PCI domain is not provided to
xc_physdev_map_pirq_msi(), and hence it's unconditionally assumed that
all devices are on segment 0.
Adjust the call to xc_physdev_map_pirq_msi() to pass the PCI domain in
the high 16bits of the bus parameter. On versions of Xen where this
is not supported the passed segment will be ignored and assume to be 0,
no worse than the current state.
Signed-off-by: Roger Pau Monné <[email protected]>
Reviewed-by: Frediano Ziglio <[email protected]>
Reviewed-by: Anthony PERARD <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: f66752961a5750298229b86adccd821e7785bfdf
https://github.com/qemu/qemu/commit/f66752961a5750298229b86adccd821e7785bfdf
Author: Luc Michel <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/core/register.c
M hw/net/can/xlnx-versal-canfd.c
M include/hw/register.h
Log Message:
-----------
hw/core/register: remove the REGISTER device type
The REGISTER class (RegisterInfo struct) is currently a QOM type
inheriting from DEVICE. This class has no real purpose:
- the qdev API is not used,
- according to the comment preceding it, the object_initialize call
is here to zero-initialize the struct. However all the effective
struct attributes are then initialized explicitly.
- the object is never parented.
This commits drops the REGISTER QOM type completely, leaving the
RegisterInfo struct as a bare C struct.
The register_register_types function is left empty here because it is
reused in the next commit.
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Luc Michel <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 5c6367bc1c8850f74812eeaaf87cff9911be58de
https://github.com/qemu/qemu/commit/5c6367bc1c8850f74812eeaaf87cff9911be58de
Author: Luc Michel <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/core/register.c
M include/hw/register.h
Log Message:
-----------
hw/core/register: add the REGISTER_ARRAY type
Introduce the REGISTER_ARRAY QOM type. This type reuses the existing
RegisterInfoArray struct. When `register_init_block' is called, it creates
a REGISTER_ARRAY object and parents it to the calling device. This way
it gets finalized when the device is. The memory region is parented to
the REGISTER_ARRAY object to ensure correct finalizing order.
The finalize function of the REGISTER_ARRAY type performs the necessary
cleaning that used to be done by `register_finalize_block'. The latter
is left empty and will be removed when all the register API users have
been refactored.
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Luc Michel <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: f423f7ebac82136515f3e3957a26f2482ff04ed9
https://github.com/qemu/qemu/commit/f423f7ebac82136515f3e3957a26f2482ff04ed9
Author: Luc Michel <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/misc/xlnx-versal-crl.c
M hw/misc/xlnx-versal-trng.c
M hw/misc/xlnx-versal-xramc.c
M hw/misc/xlnx-zynqmp-apu-ctrl.c
M hw/misc/xlnx-zynqmp-crf.c
M hw/nvram/xlnx-bbram.c
M hw/nvram/xlnx-versal-efuse-ctrl.c
M hw/nvram/xlnx-zynqmp-efuse.c
M include/hw/misc/xlnx-versal-crl.h
M include/hw/misc/xlnx-versal-xramc.h
M include/hw/misc/xlnx-zynqmp-apu-ctrl.h
M include/hw/misc/xlnx-zynqmp-crf.h
M include/hw/nvram/xlnx-bbram.h
Log Message:
-----------
hw/core/register: remove the calls to `register_finalize_block'
This function is now a no-op. The register array is parented to the
device and get finalized when the device is.
Drop all the calls to `register_finalize_block'. Drop the
RegisterInfoArray reference when it is not used elsewhere in the device.
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Luc Michel <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 2fcb0f1f28a03bdf61259f4856b980517d1cc9d7
https://github.com/qemu/qemu/commit/2fcb0f1f28a03bdf61259f4856b980517d1cc9d7
Author: Luc Michel <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/core/register.c
M include/hw/register.h
Log Message:
-----------
hw/core/register: remove the `register_finalize_block' function
This function is now unused. Drop it.
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Francisco Iglesias <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Luc Michel <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: b7477d714005e1ed5784f6c066a4c43d55c010e5
https://github.com/qemu/qemu/commit/b7477d714005e1ed5784f6c066a4c43d55c010e5
Author: Luc Michel <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/net/can/xlnx-versal-canfd.c
Log Message:
-----------
hw/net/can/xlnx-versal-canfd: refactor the banked registers logic
The CANFD device has several groups of registers:
- the main control registers from 0x0 to 0xec
- several banks of multiple registers. The number of banks is either
hardcoded, or configurable using QOM properties:
- Tx registers
- Filter registers
- Tx events registers
- Rx0 registers
- Rx1 registers
As of now, all the registers are handled using the register API. The
banked register logic results in a convoluted code to correctly allocate
the register descriptors for the register API. This code bypasses the
standard register API creation function (register_init_block). The
resulting code leaks memory when the device is finalized.
This commit introduces decoding logic for the banked registers. Those
registers are quite simple in practice. Accessing them triggers no
side-effect (only the filter registers need a check to catch guest
invalid behaviour). Starting from the Tx events registers, they are all
read-only.
The main device memory region is changed to an I/O one, calling the
new decoding logic when accessed. The register API memory region still
overlaps all of it so for now the introduced code has no effect. The
next commit will remove the register API usage for banked registers.
Reviewed-by: Francisco Iglesias <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Luc Michel <[email protected]>
Message-ID: <[email protected]>
[PMD: Have canfd_decode_reg_bank() take optional @idx, types fixups]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: c11200c71575cb38f78548743555c2797d14bf96
https://github.com/qemu/qemu/commit/c11200c71575cb38f78548743555c2797d14bf96
Author: Luc Michel <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/net/can/xlnx-versal-canfd.c
M include/hw/net/xlnx-versal-canfd.h
Log Message:
-----------
hw/net/can/xlnx-versal-canfd: remove register API usage for banked regs
Now that we have a simple decoding logic for all the banked registers,
remove the register API usage for them. This restricts the register API
usage to only the base registers (from 0x0 to 0xec).
This also removes all the custom code that was creating register
descriptors for the register API and was leading to memory leaks when
the device was finalized.
Reviewed-by: Francisco Iglesias <[email protected]>
Reviewed-by: Edgar E. Iglesias <[email protected]>
Signed-off-by: Luc Michel <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 5e7ea00c5fdcb05d189fb0a5cb8ab9f520303ee8
https://github.com/qemu/qemu/commit/5e7ea00c5fdcb05d189fb0a5cb8ab9f520303ee8
Author: BALATON Zoltan <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/ppc/prep.c
Log Message:
-----------
hw/ppc/prep: Always create prep-systemio
The prep-systemio device models the system control ports of the 40p
machine which is not an optional pluggable device but part of the
system so it should not be disabled by -nodefaults but always created.
Additionally remove some line breaks to make lines related to one
device appear in one block for logical separation from other devices.
Signed-off-by: BALATON Zoltan <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID:
<b5b0150b6c579b10682f6482e7832cf381ffb759.1760795082.git.bala...@eik.bme.hu>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: be2f66e07aab5998f55d5e6e4de0a69a069759ed
https://github.com/qemu/qemu/commit/be2f66e07aab5998f55d5e6e4de0a69a069759ed
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/timer/i8254.c
M hw/timer/trace-events
Log Message:
-----------
hw/timer/i8254: Add I/O trace events
Allows to see how the guest interacts with the device.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 6b670b1b9616ac113392eb438642cbf6e854e3eb
https://github.com/qemu/qemu/commit/6b670b1b9616ac113392eb438642cbf6e854e3eb
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/audio/pcspk.c
M hw/audio/trace-events
Log Message:
-----------
hw/audio/pcspk: Add I/O trace events
Allows to see how the guest interacts with the device.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 4847c5701a33d519067c06054243434e489e337c
https://github.com/qemu/qemu/commit/4847c5701a33d519067c06054243434e489e337c
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/rtc/mc146818rtc.c
M hw/rtc/trace-events
Log Message:
-----------
hw/rtc/mc146818rtc: Convert CMOS_DPRINTF() into trace events
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 3006fa8d26fe8b8d9b344c9e983513cd59477cb7
https://github.com/qemu/qemu/commit/3006fa8d26fe8b8d9b344c9e983513cd59477cb7
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/rtc/mc146818rtc.c
Log Message:
-----------
hw/rtc/mc146818rtc: Use ARRAY_SIZE macro
Avoids the error-prone repetition of the array size.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: f3c0c9da662b22d62532c25b7c561dd9ce6b8def
https://github.com/qemu/qemu/commit/f3c0c9da662b22d62532c25b7c561dd9ce6b8def
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/rtc/mc146818rtc.c
Log Message:
-----------
hw/rtc/mc146818rtc: Assert correct usage of mc146818rtc_set_cmos_data()
The offset is never controlled by the guest, so any misuse constitutes a
programming error and shouldn't be silently ignored. Fix this by using assert().
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: dd012373a591ea52e3b9105cd5f8ba69d2303103
https://github.com/qemu/qemu/commit/dd012373a591ea52e3b9105cd5f8ba69d2303103
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/ide/ahci.c
M hw/ide/core.c
M hw/ide/ide-internal.h
Log Message:
-----------
hw/ide/ide-internal: Move dma_buf_commit() into ide "namespace"
The identifier suggests that it is a generic DMA function while it is tied
to IDE. Fix this by adding an "ide_" prefix.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 2fd15a24ca3b88531d66efb203d1f7f39d8519f5
https://github.com/qemu/qemu/commit/2fd15a24ca3b88531d66efb203d1f7f39d8519f5
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/i386/kvm/apic.c
M hw/i386/vapic.c
M hw/i386/x86-cpu.c
M hw/intc/apic.c
M hw/intc/apic_common.c
M include/hw/i386/apic.h
M include/hw/i386/apic_internal.h
M target/i386/cpu-apic.c
M target/i386/cpu-dump.c
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/kvm/kvm.c
M target/i386/kvm/kvm_i386.h
M target/i386/whpx/whpx-apic.c
M target/i386/whpx/whpx-internal.h
Log Message:
-----------
hw/i386/apic: Prefer APICCommonState over DeviceState
Makes the APIC API more type-safe by resolving quite a few APIC_COMMON
downcasts.
Like PICCommonState, the APICCommonState is now a public typedef while staying
an abstract datatype.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 337eece9c0a4b84cd2e34ed94b55efbad9f37a6b
https://github.com/qemu/qemu/commit/337eece9c0a4b84cd2e34ed94b55efbad9f37a6b
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/intc/apic.c
M include/hw/i386/apic.h
M target/i386/hvf/hvf.c
M target/i386/tcg/system/misc_helper.c
Log Message:
-----------
hw/i386/apic: Ensure own APIC use in apic_msr_{read,write}
Avoids the `current_cpu` global and seems more robust by not "forgetting" the
own APIC and then re-determining it by cpu_get_current_apic() which uses the
global.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: e2bb6f999f44f7b5835df4a52d83fc2d7b349a14
https://github.com/qemu/qemu/commit/e2bb6f999f44f7b5835df4a52d83fc2d7b349a14
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-21 (Tue, 21 Oct 2025)
Changed paths:
M hw/intc/apic.c
Log Message:
-----------
hw/intc/apic: Pass APICCommonState to apic_register_{read,write}
As per the previous patch, the APIC instance is already available in
apic_msr_{read,write}, so it can be passed along. It turns out that
the call to cpu_get_current_apic() is only required in
apic_mem_{read,write}, so it has been moved there. Longer term,
cpu_get_current_apic() could be removed entirely if
apic_mem_{read,write} is tied to a CPU's local address space.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
[PMD: Move return after apic_send_msi() in apic_mem_write()]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 5a78db7f8099274550bdacdc1fc24943567ac615
https://github.com/qemu/qemu/commit/5a78db7f8099274550bdacdc1fc24943567ac615
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/cpr-legacy.c
M hw/vfio/listener.c
M include/hw/vfio/vfio-cpr.h
Log Message:
-----------
vfio/container: Remap only populated parts in a section
If there are multiple containers and unmap-all fails for some of them, we
need to remap vaddr for the other containers for which unmap-all succeeded.
When ram discard is enabled, we should only remap populated parts in a
section instead of the whole section.
Fixes: eba1f657cbb1 ("vfio/container: recover from unmap-all-vaddr failure")
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Steven Sistare <[email protected]>
Reviewed-by: David Hildenbrand <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 94230948960e56cb47e835266c7cd8df46da03a4
https://github.com/qemu/qemu/commit/94230948960e56cb47e835266c7cd8df46da03a4
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/cpr-legacy.c
Log Message:
-----------
vfio/cpr-legacy: drop an erroneous assert
vfio_legacy_cpr_dma_map() is not only used in post_load on destination
but also error recovery path on source side. Assert it for destination
is wrong.
Fixes: 7e9f21411302 ("vfio/container: restore DMA vaddr")
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Steve Sistare <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: d59db04aed750ba4fc56f79cae99814334ec8285
https://github.com/qemu/qemu/commit/d59db04aed750ba4fc56f79cae99814334ec8285
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/iommufd.c
Log Message:
-----------
vfio/iommufd: Set cpr.ioas_id on source side for CPR transfer
On source side, if there are more than one VFIO devices and they
attach to same container, only the first device sets cpr.ioas_id,
the others are bypassed. We should set it for each device, or
else only first device works.
Fixes: 4296ee07455e ("vfio/iommufd: reconstruct device")
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Steve Sistare <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 8bf49fff0dfbb065ad65daa48d2e1a63ad2fd552
https://github.com/qemu/qemu/commit/8bf49fff0dfbb065ad65daa48d2e1a63ad2fd552
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/iommufd.c
Log Message:
-----------
vfio/iommufd: Restore vbasedev's reference to hwpt after CPR transfer
After CPR transfer, if there are more than one VFIO devices, device is
not added to hwpt->device_list and its reference to hwpt isn't restored
on destination. We still need to call iommufd_cdev_attach_container() to
restore it after a matching container is found, or else SIGSEV triggers.
Fixes: 4296ee07455e ("vfio/iommufd: reconstruct device")
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Steve Sistare <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 725ec898039dfed0a669bf78b556529b51e248e8
https://github.com/qemu/qemu/commit/725ec898039dfed0a669bf78b556529b51e248e8
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M accel/kvm/kvm-all.c
Log Message:
-----------
accel/kvm: Fix an erroneous check on coalesced_mmio_ring
According to KVM uAPI, coalesced mmio page is KVM_COALESCED_MMIO_PAGE_OFFSET
offset from kvm_run pages. For x86 it's 2 pages offset, for arm it's 1 page
offset currently. We shouldn't presume it's hardcoded 1 page or else
coalesced_mmio_ring will not be cleared in do_kvm_destroy_vcpu() in x86.
Fixes: 7ed0919119b0 ("migration: close kvm after cpr")
Cc: Markus Armbruster <[email protected]>
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Steve Sistare <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 962bcf0911e7f3601da0f07ba7da9824cb6a5ba5
https://github.com/qemu/qemu/commit/962bcf0911e7f3601da0f07ba7da9824cb6a5ba5
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/container-legacy.c
M include/hw/vfio/vfio-container-legacy.h
Log Message:
-----------
vfio/container: Support unmap all in one ioctl()
VFIO type1 kernel uAPI supports unmapping whole address space in one call
since commit c19650995374 ("vfio/type1: implement unmap all"). Use the
unmap_all variant whenever it's supported in kernel.
Opportunistically pass VFIOLegacyContainer pointer in low level function
vfio_legacy_dma_unmap_one().
Co-developed-by: John Levon <[email protected]>
Signed-off-by: John Levon <[email protected]>
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: b30823e5619ed5658d33e43abe1308195edb3e8b
https://github.com/qemu/qemu/commit/b30823e5619ed5658d33e43abe1308195edb3e8b
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/iommufd.c
Log Message:
-----------
vfio/iommufd: Support unmap all in one ioctl()
IOMMUFD kernel uAPI supports unmapping whole address space in one call with
[iova, size] set to [0, UINT64_MAX], this can simplify iommufd_cdev_unmap()
a bit. See iommufd_ioas_unmap() in kernel for details.
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 271fec6f18492630df2e1b4599ba2de6eb1d0668
https://github.com/qemu/qemu/commit/271fec6f18492630df2e1b4599ba2de6eb1d0668
Author: Zhenzhong Duan <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/listener.c
Log Message:
-----------
vfio/listener: Add an assertion for unmap_all
Currently the maximum of iommu address space is 64bit. So when a maximum
iommu memory section is deleted, it's in scope [0, 2^64). Add a
assertion for that.
Suggested-by: Cédric Le Goater <[email protected]>
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 1118a4207b0c5287d942a18b1a446c2e29baea3a
https://github.com/qemu/qemu/commit/1118a4207b0c5287d942a18b1a446c2e29baea3a
Author: John Levon <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M docs/system/devices/vfio-user.rst
Log Message:
-----------
docs/system/devices/vfio-user: fix formatting
The example QEMU argument was not rendering properly, as it was not
indented.
Signed-off-by: John Levon <[email protected]>
Fixes: c688cc165b ("docs: add vfio-user documentation")
Reviewed-by: Peter Maydell <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Reviewed-by: Cédric Le Goater <[email protected]>
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 7ea3fd2b6c2543c60fb309265fa445fa8fdcc1ea
https://github.com/qemu/qemu/commit/7ea3fd2b6c2543c60fb309265fa445fa8fdcc1ea
Author: Alex Williamson <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M .mailmap
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Update Alex Williamson's email address
Switch to a personal email account as I'll be leaving Red Hat soon.
Signed-off-by: Alex Williamson <[email protected]>
Signed-off-by: Alex Williamson <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: aaca725884b57c9245528a0afb3f32e078543faf
https://github.com/qemu/qemu/commit/aaca725884b57c9245528a0afb3f32e078543faf
Author: John Levon <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio-user/device.c
M hw/vfio/ccw.c
M hw/vfio/device.c
M hw/vfio/iommufd.c
M hw/vfio/pci.c
M include/hw/vfio/vfio-device.h
Log Message:
-----------
vfio: rename field to "num_initial_regions"
We set VFIODevice::num_regions at initialization time, and do not
otherwise refresh it. As it is valid in theory for a VFIO device to
later increase the number of supported regions, rename the field to
"num_initial_regions" to better reflect its semantics.
Signed-off-by: John Levon <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Reviewed-by: Alex Williamson <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: ecbe424a63c9f860a901d6a4a75724b046abd796
https://github.com/qemu/qemu/commit/ecbe424a63c9f860a901d6a4a75724b046abd796
Author: John Levon <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/vfio/device.c
Log Message:
-----------
vfio: only check region info cache for initial regions
It is semantically valid for a VFIO device to increase the number of
regions after initialization. In this case, we'd attempt to check for
cached region info past the size of the ->reginfo array. Check for the
region index and skip the cache in these cases.
This also works around some VGPU use cases which appear to be a bug,
where VFIO_DEVICE_QUERY_GFX_PLANE returns a region index beyond the
reported ->num_regions.
Fixes: 95cdb024 ("vfio: add region info cache")
Signed-off-by: John Levon <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Reviewed-by: Alex Williamson <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 274e199ba07160d61bb0675070649725aa122f78
https://github.com/qemu/qemu/commit/274e199ba07160d61bb0675070649725aa122f78
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-ssp.c
M include/hw/arm/aspeed_coprocessor.h
Log Message:
-----------
hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB
Previously, the SSP memory was incorrectly modeled as "SRAM" with
a 32 MB size. This change introduces a new sdram field in
AspeedCoprocessorState and updates the realization logic accordingly.
Rename from SRAM to SDRAM and correct size from 32MB to 512MB to match
hardware.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 4e7232f268a583a7b37ffea2cf41471e3b1cf97c
https://github.com/qemu/qemu/commit/4e7232f268a583a7b37ffea2cf41471e3b1cf97c
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-tsp.c
Log Message:
-----------
hw/arm/aspeed_ast27x0-tsp: Add SDRAM region and fix naming and size to 512MB
Previously, the TSP memory was incorrectly modeled as "SRAM" with
a 32 MB size. Rename from SRAM to SDRAM and correct size from 32MB
to 512MB to match hardware.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 00d65b454187089fbcbd64ba0d756b6883039531
https://github.com/qemu/qemu/commit/00d65b454187089fbcbd64ba0d756b6883039531
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
M hw/arm/aspeed_ast27x0-ssp.c
M hw/arm/aspeed_coprocessor_common.c
M include/hw/arm/aspeed_coprocessor.h
Log Message:
-----------
hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The SSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.
To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and SSP subsystems.
Changes include:
- Add a "MemoryRegion *sram" link and "MemoryRegion sram_alias" to
AspeedCoprocessorState.
- Register the new "sram" property in aspeed_coprocessor_common.c.
- In aspeed_ast27x0-fc.c, connect the SSP coprocessor’s "sram" link to
the PSP’s SRAM region.
- In aspeed_ast27x0-ssp.c, create an alias mapping for SRAM at
0x70000000 – 0x7001FFFF in the SSP’s memory map.
This ensures that the SSP can correctly access the shared SRAM contents
through its own address space while maintaining a consistent physical
backing region. It also guarantees that the SRAM is realized before the
SSP device, ensuring successful alias setup.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 2c9078b8d2e31af6c33d530f9edb4ba6387b77bd
https://github.com/qemu/qemu/commit/2c9078b8d2e31af6c33d530f9edb4ba6387b77bd
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
M hw/arm/aspeed_ast27x0-tsp.c
Log Message:
-----------
hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor
AST2700 has a 128KB SRAM, physically mapped at 0x10000000–0x1001FFFF for
the PSP (CA35) processor. The TSP coprocessor shares this same SRAM but
accesses it through a different address window at 0x70000000–0x7001FFFF.
To model this shared-memory behavior in QEMU, this commit introduces a
linked SRAM property and alias mapping between the PSP and TSP subsystems.
Changes include:
- Add the SRAM alias mapping at 0x70000000 in aspeed_ast27x0-tsp.c.
- In aspeed_ast27x0-fc.c, connect the TSP coprocessor’s "sram" link to
the PSP’s SRAM region.
- Ensure the alias region is initialized during TSP SoC realization so
the TSP can correctly access shared SRAM through its own address space.
This ensures that the TSP and PSP share the same physical SRAM backing.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 362e54b10ddd76ac9989900f53b7acede09ca86f
https://github.com/qemu/qemu/commit/362e54b10ddd76ac9989900f53b7acede09ca86f
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
M hw/arm/aspeed_ast27x0-ssp.c
M hw/arm/aspeed_ast27x0-tsp.c
M hw/arm/aspeed_coprocessor_common.c
M include/hw/arm/aspeed_coprocessor.h
Log Message:
-----------
hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP
AST2700 has a single SCU hardware block, memory-mapped at
0x12C02000–0x12C03FFF from the perspective of the main CA35 processor (PSP).
The SSP and TSP coprocessors access this same SCU block at different
addresses: 0x72C02000–0x72C03FFF.
Previously, each subsystem (PSP, SSP, and TSP) instantiated its own SCU
device, resulting in three independent SCU instances in the QEMU model.
In real hardware, however, only a single SCU exists and is shared among
all processors.
This commit reworks the SCU model to correctly reflect the hardware
behavior by allowing SSP and TSP to reference the PSP’s SCU instance.
The following changes are introduced:
- Add a scu property to AspeedCoprocessorState for linking the
coprocessor to the PSP’s SCU instance.
- Replace per-coprocessor SCU instantiation with a shared SCU link.
- Add "MemoryRegion scu_alias" to model address remapping for SSP and TSP.
- Create SCU alias regions in both SSP and TSP coprocessors and map
them at 0x72C02000 to mirror the PSP’s SCU registers.
- Ensure the SCU device in PSP is realized before SSP/TSP alias setup.
With this change, PSP, SSP, and TSP now share a consistent SCU state,
matching the single-SCU hardware design of AST2700.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 10e377246d37bc0bfeaed4d9a700975ae9bc5282
https://github.com/qemu/qemu/commit/10e377246d37bc0bfeaed4d9a700975ae9bc5282
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
M hw/arm/aspeed_ast27x0-ssp.c
M hw/arm/aspeed_ast27x0-tsp.c
M hw/arm/aspeed_coprocessor_common.c
M include/hw/arm/aspeed_coprocessor.h
Log Message:
-----------
hw/arm/ast27x0: Share single UART set across PSP, SSP, and TSP
In the original model, each subsystem (PSP, SSP, and TSP) created its own
set of 13 UART devices, resulting in a total of 39 UART instances. However,
on real AST2700 hardware, there is only one set of 13 UARTs shared among
all processors.
This commit reworks the UART handling to correctly model the shared
hardware design. The PSP now creates the full set of 13 UART instances,
while the SSP and TSP link to the corresponding shared UART device
through object properties.
Changes include:
- Add "DEFINE_PROP_LINK("uart", ...)" and "DEFINE_PROP_INT32("uart-dev", ...)"
to allow each coprocessor to reference a specific shared UART instance.
- Modify SSP to link to PSP’s UART4, and TSP to link to PSP’s UART7.
- Introduce "uart_alias" to remap the UART’s MMIO region into the coprocessor’s
memory space.
- Redirect the UART interrupt to the coprocessor’s NVIC, replacing the
default routing to the PSP’s GIC.
With this change, only one set of 13 UART devices is instantiated by the PSP,
while the SSP and TSP reuse them via aliasing and shared interrupt routing,
matching the real AST2700 hardware behavior.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 71c01f57879129bc62b7cb53cd0a13bd70d79582
https://github.com/qemu/qemu/commit/71c01f57879129bc62b7cb53cd0a13bd70d79582
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
Log Message:
-----------
hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM
This patch introduces a dedicated ca35_boot_rom memory region and
copies the FMC0 flash data into it.
The motivation is to support the upcoming vbootrom. The vbootrom
replaces the existing BOOTMCU (RISC-V 32 SPL) flow, which currently reads
the "image-bmc" from FMC_CS0 and loads the following components
into DRAM:
- Trusted Firmware-A
- OP-TEE OS
- u-boot-nodtb.bin
- u-boot.dtb
After loading, BOOTMCU releases the CA35 reset so that CA35 can start
executing Trusted Firmware-A.
The vbootrom follows the same sequence: CA35 fetches "image-bmc" from FMC0
flash at the SPI boot ROM base address (0x100000000), parses the FIT image,
loads each component into its designated DRAM location, and then jumps to
Trusted Firmware-A.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 02bf7686e87979325f7af6f3ab88766853b881ef
https://github.com/qemu/qemu/commit/02bf7686e87979325f7af6f3ab88766853b881ef
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
Log Message:
-----------
hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support
Introduces support for loading a vbootrom image into the dedicated vbootrom
memory region in the AST2700 Full Core machine.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 37acdd737a2696a9c2d8e165fb67e2e497b4e331
https://github.com/qemu/qemu/commit/37acdd737a2696a9c2d8e165fb67e2e497b4e331
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M tests/functional/aarch64/test_aspeed_ast2700fc.py
Log Message:
-----------
tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: f001f5d95aeed29032029c3ab1dca7a50af922bc
https://github.com/qemu/qemu/commit/f001f5d95aeed29032029c3ab1dca7a50af922bc
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M tests/functional/aarch64/test_aspeed_ast2700fc.py
Log Message:
-----------
tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe
test
Enhance the AST2700 functional PCIe test to verify the network interface
configuration for eth2. This adds an additional command to check the IP
address assignment on eth2 to ensure network functionality is correctly
initialized in the test environment.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 7c77c48e824cd4a1e58b17b747bfb3e2e09a79a2
https://github.com/qemu/qemu/commit/7c77c48e824cd4a1e58b17b747bfb3e2e09a79a2
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M tests/functional/aarch64/test_aspeed_ast2700fc.py
Log Message:
-----------
tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common
function
This removes duplicate code in start_ast2700fc_test() and prepares for reuse in
upcoming VBOOTROM tests.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: d187d120d17c6b6de3b6432243dcc706ec144658
https://github.com/qemu/qemu/commit/d187d120d17c6b6de3b6432243dcc706ec144658
Author: Jamin Lin <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M tests/functional/aarch64/test_aspeed_ast2700fc.py
Log Message:
-----------
tests/functional/aarch64/ast2700fc: Add vbootrom test
Add start_ast2700fc_test_vbootrom() which boots the ast2700fc machine
with -bios ast27x0_bootrom.bin and reuses the coprocessor loader.
Add test_aarch64_ast2700fc_sdk_vbootrom_v09_08() to test the vbootrom
with ast2700fc machine.
Signed-off-by: Jamin Lin <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 42fa4bd01a90baea260833d565922fec5d28f768
https://github.com/qemu/qemu/commit/42fa4bd01a90baea260833d565922fec5d28f768
Author: Felix Wu <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/gpio/aspeed_gpio.c
Log Message:
-----------
hw/gpio: Add property for ASPEED GPIO in 32 bits basis
Added 32 bits property for ASPEED GPIO. Previously it can only be
access in bitwise manner.
The changes to qobject is to index gpios with array indices on top of
accessing with registers. This allows for easier gpio access,
especially in tests with complex behaviors that requires large number
of gpios at a time, like fault injection and networking behaviors.
Indexing multiple gpios at once allows qmp/side band client to no
longer hardcode and populate register names and manipulate them
faster.
Signed-off-by: Felix Wu <[email protected]>
Reviewed-by: Andrew Jeffery <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
[ clg: wrapped commit log lines ]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 1306584925d1e5d8c4a7699a9f3fa125a10e4996
https://github.com/qemu/qemu/commit/1306584925d1e5d8c4a7699a9f3fa125a10e4996
Author: Felix Wu <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M include/qobject/qdict.h
M qobject/qdict.c
M tests/qtest/aspeed_gpio-test.c
Log Message:
-----------
tests/qtest: Add qtest for for ASPEED GPIO gpio-set property
- Added qtests to test gpio-set property for ASPEED.
- Added function to get uint in qdict.
Signed-off-by: Felix Wu <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: fa42484ee1553aa8a8b97aa933315f7e0b9dba2d
https://github.com/qemu/qemu/commit/fa42484ee1553aa8a8b97aa933315f7e0b9dba2d
Author: Cédric Le Goater <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed.c
M tests/qtest/aspeed_smc-test.c
Log Message:
-----------
hw/arm/aspeed: ast2600-evb: Use w25q512jv flash model
The ast2600-evb machine model is using the "mx66u51235f" flash model,
which has issues with recent Linux kernels (6.15+) when reading SFDP
data.
Change the flash model to "w25q512jv", which is the model present on
some ast2600a3 EVB board and is known to work correctly with recent
kernels. Adjust the corresponding qtest to reflect the new JEDEC ID of
the w25q512jv flash.
Reviewed-by: Jamin Lin <[email protected]>
Link: https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: d7bd42a740d0e8887540d7b450d0bdb2d6ba31ea
https://github.com/qemu/qemu/commit/d7bd42a740d0e8887540d7b450d0bdb2d6ba31ea
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed_ast27x0-fc.c
Log Message:
-----------
hw/arm/aspeed: Remove ast2700fc self-aliasing
Remove pointless alias to the very same machine:
$ qemu-system-aarch64 -M help | fgrep ast2700fc
ast2700fc ast2700 full core support (alias of ast2700fc)
ast2700fc ast2700 full core support
Fixes: a74faf35efc ("hw/arm: Introduce ASPEED AST2700 A1 full core machine")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Link:
https://lore.kernel.org/qemu-devel/[email protected]
Signed-off-by: Cédric Le Goater <[email protected]>
Commit: 0305ee82754aba1f312fb1fc6ad613219f697db7
https://github.com/qemu/qemu/commit/0305ee82754aba1f312fb1fc6ad613219f697db7
Author: Bernhard Beschow <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M tests/qtest/ds1338-test.c
Log Message:
-----------
tests/qtest/ds1338: Reuse from_bcd()
from_bcd() is a public API function which can be unit-tested. Reuse it to avoid
code duplication.
Signed-off-by: Bernhard Beschow <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Fabiano Rosas <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 047b721c60f592bdd6abbc69ed2f63316e061fe8
https://github.com/qemu/qemu/commit/047b721c60f592bdd6abbc69ed2f63316e061fe8
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/soundhw.c
Log Message:
-----------
hw/audio: improve error reports
The -audiodev argument is 'model=..', use same terminology.
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
[PMD: Fixed checkpatch.pl issues]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 74d3a119ef642477a548360476c6b566a0fe6744
https://github.com/qemu/qemu/commit/74d3a119ef642477a548360476c6b566a0fe6744
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/soundhw.c
M include/hw/audio/soundhw.h
M system/vl.c
Log Message:
-----------
hw/audio: rename model list function
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 0347f9e0e1caaaf6fb6e7f53b5f90ced6a6ec5e1
https://github.com/qemu/qemu/commit/0347f9e0e1caaaf6fb6e7f53b5f90ced6a6ec5e1
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/pcspk.c
Log Message:
-----------
hw/audio: remove global pcspk
It is no longer used since commit 6033b9ecd4 ("pc: remove -soundhw pcspk")
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 0c35f5bf86813f085e8a5053a90ebac0bc33e3ca
https://github.com/qemu/qemu/commit/0c35f5bf86813f085e8a5053a90ebac0bc33e3ca
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/pcspk.c
M hw/timer/i8254_common.c
M include/hw/timer/i8254.h
Log Message:
-----------
hw/pcspk: use explicitly the required PIT types
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 64a013e18bbd02c26a7ca2b2c4c1a14d77058749
https://github.com/qemu/qemu/commit/64a013e18bbd02c26a7ca2b2c4c1a14d77058749
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/pcspk.c
Log Message:
-----------
hw/pcspk: make 'pit' a class property
This should be functionally equivalent. (for some reason, the device
property was convert to an object instance property in commit 873b4d3f0571)
Signed-off-by: Marc-André Lureau <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 840c2c4ed9645fe729321a53d76c5abd3fecc67b
https://github.com/qemu/qemu/commit/840c2c4ed9645fe729321a53d76c5abd3fecc67b
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/pcspk.c
Log Message:
-----------
hw/pcspk: check the "pit" is set
We don't let the user create a "isa-pcspk" via -device yet (in theory,
we could, and fallback on a lookup PIT), but we can add some safety
checks that the property was correctly set nonetheless.
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 55634cdf115f31ec26b66d622e6ea50354805b16
https://github.com/qemu/qemu/commit/55634cdf115f31ec26b66d622e6ea50354805b16
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/audio/ac97.c
M hw/audio/adlib.c
M hw/audio/cs4231a.c
M hw/audio/es1370.c
M hw/audio/gus.c
M hw/audio/pcspk.c
M hw/audio/sb16.c
Log Message:
-----------
hw/audio: replace AUD_log() usage
AUD_log() is just printf(stderr, "prefix: "..), we can use
error_report() or warn_report() appropriately instead.
Ideally it should be converted to traces, but there are many places to
convert, this is left for another day.
Avoid bit-rot by using conditionals.
The patch could be splitted if necessary.
Signed-off-by: Marc-André Lureau <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
[PMD: Fixed checkpatch.pl issues]
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 344c79b8ff700559dec0f871b30f09b25f0aca45
https://github.com/qemu/qemu/commit/344c79b8ff700559dec0f871b30f09b25f0aca45
Author: Vishal Chourasia <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/ppc/spapr.c
Log Message:
-----------
hw/ppc/spapr: Rename resize_hpt_err to errp
Rename resize_hpt_err to standard errp naming convention.
Signed-off-by: Vishal Chourasia <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 253f902d845b4ce2877b4b446c026be0dd0ea7f1
https://github.com/qemu/qemu/commit/253f902d845b4ce2877b4b446c026be0dd0ea7f1
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M include/qemu/target-info-impl.h
Log Message:
-----------
qemu/target-info: Include missing 'qapi-types-common.h' header
When adding the TargetInfo::@endianness field in commit a37aec2e7d8,
we neglected to include the "qapi-types-common.h" header to get the
EndianMode enum definition. Fix that.
Fixes: a37aec2e7d8 ("qemu/target-info: Add target_endian_mode()")
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Pierrick Bouvier <[email protected]>
Message-Id: <[email protected]>
Commit: 7d82e9b56c6fad65d993a31d990fdc5792926692
https://github.com/qemu/qemu/commit/7d82e9b56c6fad65d993a31d990fdc5792926692
Author: Thomas Huth <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Add missing machine name in the Alpha section
Without a machine name here, get_maintainers.pl uses the "-----..."
separator for describing what the maintainer is taking care of:
$ scripts/get_maintainer.pl -f hw/alpha/dp264.c
Richard Henderson <[email protected]> (maintainer:--------------)
[email protected] (open list:All patches CC here)
Signed-off-by: Thomas Huth <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Message-ID: <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: ba4d0a0184cb364df98fe66d885b79427ebd0e7b
https://github.com/qemu/qemu/commit/ba4d0a0184cb364df98fe66d885b79427ebd0e7b
Author: Marc-André Lureau <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M docs/qdev-device-use.txt
Log Message:
-----------
docs: update -soundhw -> -device list
(note: I wonder if pcspk was really an option when -soundhw was
available, since it was not user-creatable)
Signed-off-by: Marc-André Lureau <[email protected]>
Message-ID: <[email protected]>
Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Commit: 274d9060664b1754a3d349af718d006ed2e70b2a
https://github.com/qemu/qemu/commit/274d9060664b1754a3d349af718d006ed2e70b2a
Author: Philippe Mathieu-Daudé <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M docs/qdev-device-use.txt
M system/qdev-monitor.c
Log Message:
-----------
docs: Update mentions of removed '-soundhw' command line option
The `-soundhw` CLI was removed in commit 039a68373c4 ("introduce
-audio as a replacement for -soundhw"). Remove outdated comments
and update the document mentioning the old usage.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Marc-André Lureau <[email protected]>
Message-Id: <[email protected]>
Commit: 1b2fda59164ea4e487d9eb1e34f6a885f67d6ee9
https://github.com/qemu/qemu/commit/1b2fda59164ea4e487d9eb1e34f6a885f67d6ee9
Author: Gerd Hoffmann <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/uefi/meson.build
A hw/uefi/ovmf-log.c
M qapi/machine.json
M tests/qtest/qmp-cmd-test.c
Log Message:
-----------
hw/uefi: add query-firmware-log monitor command
Starting with the edk2-stable202508 tag OVMF (and ArmVirt too) have
optional support for logging to a memory buffer. There is guest side
support -- for example in linux kernels v6.17+ -- to read that buffer.
But that might not helpful if your guest stops booting early enough that
guest tooling can not be used yet. So host side support to read that
log buffer is a useful thing to have.
This patch implements the query-firmware-log qmp monitor command to
read the firmware log.
Reviewed-by: Markus Armbruster <[email protected]>
Signed-off-by: Gerd Hoffmann <[email protected]>
Message-ID: <[email protected]>
Commit: c8aa8120313fc7770900de13b657dacb7dc77a95
https://github.com/qemu/qemu/commit/c8aa8120313fc7770900de13b657dacb7dc77a95
Author: Gerd Hoffmann <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hmp-commands-info.hx
M hw/uefi/ovmf-log.c
M include/monitor/hmp.h
Log Message:
-----------
hw/uefi: add 'info firmware-log' hmp monitor command.
This adds the hmp variant of the query-firmware-log qmp command.
Reviewed-by: Markus Armbruster <[email protected]>
Signed-off-by: Gerd Hoffmann <[email protected]>
Message-ID: <[email protected]>
Commit: c6c6d854447a7821288e01857d0f7fb28b82cf44
https://github.com/qemu/qemu/commit/c6c6d854447a7821288e01857d0f7fb28b82cf44
Author: Gerd Hoffmann <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hmp-commands-info.hx
M hw/uefi/ovmf-log.c
M qapi/machine.json
Log Message:
-----------
hw/uefi/ovmf-log: add maxsize parameter
Allow limiting the amount of log output sent. Allow up to 1 MiB.
In case the guest log buffer is larger than 1 MiB limit the output
instead of throwing an error.
Acked-by: Markus Armbruster <[email protected]>
Signed-off-by: Gerd Hoffmann <[email protected]>
Message-ID: <[email protected]>
Commit: 6ba4667ffdc1faafe854dd58d3f1040bcaca780c
https://github.com/qemu/qemu/commit/6ba4667ffdc1faafe854dd58d3f1040bcaca780c
Author: Richard Henderson <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M MAINTAINERS
M docs/qdev-device-use.txt
M hw/audio/ac97.c
M hw/audio/adlib.c
M hw/audio/cs4231a.c
M hw/audio/es1370.c
M hw/audio/gus.c
M hw/audio/pcspk.c
M hw/audio/sb16.c
M hw/audio/soundhw.c
M hw/audio/trace-events
M hw/core/machine-qmp-cmds.c
M hw/core/machine.c
M hw/core/register.c
M hw/i2c/smbus_eeprom.c
M hw/i386/kvm/apic.c
M hw/i386/vapic.c
M hw/i386/x86-cpu.c
M hw/ide/ahci.c
M hw/ide/core.c
M hw/ide/ide-internal.h
M hw/intc/apic.c
M hw/intc/apic_common.c
M hw/misc/xlnx-versal-crl.c
M hw/misc/xlnx-versal-trng.c
M hw/misc/xlnx-versal-xramc.c
M hw/misc/xlnx-zynqmp-apu-ctrl.c
M hw/misc/xlnx-zynqmp-crf.c
M hw/net/can/xlnx-versal-canfd.c
M hw/nvram/xlnx-bbram.c
M hw/nvram/xlnx-versal-efuse-ctrl.c
M hw/nvram/xlnx-zynqmp-efuse.c
M hw/openrisc/openrisc_sim.c
M hw/pci-host/raven.c
M hw/ppc/e500.c
M hw/ppc/prep.c
M hw/ppc/spapr.c
M hw/rtc/mc146818rtc.c
M hw/rtc/trace-events
M hw/timer/i8254.c
M hw/timer/i8254_common.c
M hw/timer/trace-events
M hw/virtio/meson.build
M hw/virtio/virtio-mem.c
M hw/xen/xen_pt_msi.c
M include/hw/audio/soundhw.h
M include/hw/boards.h
M include/hw/i386/apic.h
M include/hw/i386/apic_internal.h
M include/hw/misc/xlnx-versal-crl.h
M include/hw/misc/xlnx-versal-xramc.h
M include/hw/misc/xlnx-zynqmp-apu-ctrl.h
M include/hw/misc/xlnx-zynqmp-crf.h
M include/hw/net/xlnx-versal-canfd.h
M include/hw/nvram/xlnx-bbram.h
M include/hw/register.h
M include/hw/timer/i8254.h
M include/qemu/target-info-impl.h
M monitor/qemu-config-qmp.c
M system/qdev-monitor.c
M system/vl.c
M target/i386/cpu-apic.c
M target/i386/cpu-dump.c
M target/i386/cpu.c
M target/i386/cpu.h
M target/i386/hvf/hvf.c
M target/i386/kvm/kvm.c
M target/i386/kvm/kvm_i386.h
M target/i386/tcg/system/misc_helper.c
M target/i386/whpx/whpx-apic.c
M target/i386/whpx/whpx-internal.h
M tests/qtest/ds1338-test.c
Log Message:
-----------
Merge tag 'hw-misc-20251021' of https://github.com/philmd/qemu into staging
Misc HW patches
- Replace compile-time checks by runtime ones to build virtio-mem.c once
- Cleanups in Raven PCI host bridge, audio and PC devices
- Allow machine dynamic registration of valid CPU types
- Introduce DEFINE_MACHINE_WITH_INTERFACE[_ARRAY]() macros
- Set DDR2 minimum write recovery time in EEPROM SPD
- Have PPCe500 machines abort gracefully when using invalid CPU
- Prevent buffer overflow in openrisc_sim_init()
- Pass PCI domain to Xen xc_physdev_map_pirq_msi()
- Fix register API leaks
- Simplify Xilinx CANFD model
- Unconditionally create System I/O on PReP machine
- Update documentation around '-soundhw' command line option
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# gpg: Signature made Wed 22 Oct 2025 03:19:00 AM CDT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <[email protected]>"
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20251021' of https://github.com/philmd/qemu: (45 commits)
docs: Update mentions of removed '-soundhw' command line option
docs: update -soundhw -> -device list
MAINTAINERS: Add missing machine name in the Alpha section
qemu/target-info: Include missing 'qapi-types-common.h' header
hw/ppc/spapr: Rename resize_hpt_err to errp
hw/audio: replace AUD_log() usage
hw/pcspk: check the "pit" is set
hw/pcspk: make 'pit' a class property
hw/pcspk: use explicitly the required PIT types
hw/audio: remove global pcspk
hw/audio: rename model list function
hw/audio: improve error reports
tests/qtest/ds1338: Reuse from_bcd()
hw/intc/apic: Pass APICCommonState to apic_register_{read,write}
hw/i386/apic: Ensure own APIC use in apic_msr_{read,write}
hw/i386/apic: Prefer APICCommonState over DeviceState
hw/ide/ide-internal: Move dma_buf_commit() into ide "namespace"
hw/rtc/mc146818rtc: Assert correct usage of mc146818rtc_set_cmos_data()
hw/rtc/mc146818rtc: Use ARRAY_SIZE macro
hw/rtc/mc146818rtc: Convert CMOS_DPRINTF() into trace events
...
Signed-off-by: Richard Henderson <[email protected]>
Commit: ad9520e1df9971904c78d1ed6c00cf0fa1e0c09a
https://github.com/qemu/qemu/commit/ad9520e1df9971904c78d1ed6c00cf0fa1e0c09a
Author: Richard Henderson <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hmp-commands-info.hx
M hw/uefi/meson.build
A hw/uefi/ovmf-log.c
M include/monitor/hmp.h
M qapi/machine.json
M tests/qtest/qmp-cmd-test.c
Log Message:
-----------
Merge tag 'uefi-20251022-pull-request' of https://gitlab.com/kraxel/qemu into
staging
uefi: add firmware log monitor commands
# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 22 Oct 2025 05:59:49 AM CDT
# gpg: using RSA key A0328CFFB93A17A79901FE7D4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <[email protected]>" [unknown]
# gpg: aka "Gerd Hoffmann <[email protected]>" [unknown]
# gpg: aka "Gerd Hoffmann (private) <[email protected]>"
[unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* tag 'uefi-20251022-pull-request' of https://gitlab.com/kraxel/qemu:
hw/uefi/ovmf-log: add maxsize parameter
hw/uefi: add 'info firmware-log' hmp monitor command.
hw/uefi: add query-firmware-log monitor command
Signed-off-by: Richard Henderson <[email protected]>
Commit: 93bc9832017b9091f0ca150d2c56b3b3cfc0cf12
https://github.com/qemu/qemu/commit/93bc9832017b9091f0ca150d2c56b3b3cfc0cf12
Author: Richard Henderson <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M hw/arm/aspeed.c
M hw/arm/aspeed_ast27x0-fc.c
M hw/arm/aspeed_ast27x0-ssp.c
M hw/arm/aspeed_ast27x0-tsp.c
M hw/arm/aspeed_coprocessor_common.c
M hw/gpio/aspeed_gpio.c
M include/hw/arm/aspeed_coprocessor.h
M include/qobject/qdict.h
M qobject/qdict.c
M tests/functional/aarch64/test_aspeed_ast2700fc.py
M tests/qtest/aspeed_gpio-test.c
M tests/qtest/aspeed_smc-test.c
Log Message:
-----------
Merge tag 'pull-aspeed-20251022' of https://github.com/legoater/qemu into
staging
aspeed queue:
* Improve AST2700 co-processor models
* Add vbootrom support to the ast2700fc multi-soc machine
* Bump SDK version to v09.08 for the ast2700fc machine
* Add 32 bits property for Aspeed GPIOs
* Change ast2600-evb machine flash model to w25q512jv
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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 22 Oct 2025 07:29:23 AM CDT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <[email protected]>" [full]
# gpg: aka "Cédric Le Goater <[email protected]>" [full]
* tag 'pull-aspeed-20251022' of https://github.com/legoater/qemu:
hw/arm/aspeed: Remove ast2700fc self-aliasing
hw/arm/aspeed: ast2600-evb: Use w25q512jv flash model
tests/qtest: Add qtest for for ASPEED GPIO gpio-set property
hw/gpio: Add property for ASPEED GPIO in 32 bits basis
tests/functional/aarch64/ast2700fc: Add vbootrom test
tests/functional/aarch64/ast2700fc: Move coprocessor image loading to common
function
tests/functional/aarch64/ast2700fc: Add eth2 network interface check in PCIe
test
tests/functional/aarch64/ast2700fc: Update test ASPEED SDK v09.08
hw/arm/aspeed_ast27x0-fc: Add VBOOTROM support
hw/arm/aspeed_ast27x0-fc: Map FMC0 flash contents into CA35 boot ROM
hw/arm/ast27x0: Share single UART set across PSP, SSP, and TSP
hw/arm/ast27x0: Share single SCU instance across PSP, SSP, and TSP
hw/arm/ast27x0: Add SRAM link and alias mapping for TSP coprocessor
hw/arm/ast27x0: Add SRAM link and alias mapping for SSP coprocessor
hw/arm/aspeed_ast27x0-tsp: Add SDRAM region and fix naming and size to 512MB
hw/arm/aspeed_ast27x0-ssp: Add SDRAM region and fix naming and size to 512MB
Signed-off-by: Richard Henderson <[email protected]>
Commit: c0e80879c876cbe4cbde43a92403329bcedf2ba0
https://github.com/qemu/qemu/commit/c0e80879c876cbe4cbde43a92403329bcedf2ba0
Author: Richard Henderson <[email protected]>
Date: 2025-10-22 (Wed, 22 Oct 2025)
Changed paths:
M .mailmap
M MAINTAINERS
M accel/kvm/kvm-all.c
M docs/system/devices/vfio-user.rst
M hw/vfio-user/device.c
M hw/vfio/ccw.c
M hw/vfio/container-legacy.c
M hw/vfio/cpr-legacy.c
M hw/vfio/device.c
M hw/vfio/iommufd.c
M hw/vfio/listener.c
M hw/vfio/pci.c
M include/hw/vfio/vfio-container-legacy.h
M include/hw/vfio/vfio-cpr.h
M include/hw/vfio/vfio-device.h
Log Message:
-----------
Merge tag 'pull-vfio-20251022' of https://github.com/legoater/qemu into
staging
vfio queue:
* Fix CPR transfer
* Add support for VFIO_DMA_UNMAP_FLAG_ALL
* Fix vfio-user documentation
* Update Alex Williamson's email address
* Fix for vfio-region cache for the vGPU use case
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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 22 Oct 2025 07:18:12 AM CDT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <[email protected]>" [full]
# gpg: aka "Cédric Le Goater <[email protected]>" [full]
* tag 'pull-vfio-20251022' of https://github.com/legoater/qemu:
vfio: only check region info cache for initial regions
vfio: rename field to "num_initial_regions"
MAINTAINERS: Update Alex Williamson's email address
docs/system/devices/vfio-user: fix formatting
vfio/listener: Add an assertion for unmap_all
vfio/iommufd: Support unmap all in one ioctl()
vfio/container: Support unmap all in one ioctl()
accel/kvm: Fix an erroneous check on coalesced_mmio_ring
vfio/iommufd: Restore vbasedev's reference to hwpt after CPR transfer
vfio/iommufd: Set cpr.ioas_id on source side for CPR transfer
vfio/cpr-legacy: drop an erroneous assert
vfio/container: Remap only populated parts in a section
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/3c0b42c68f98...c0e80879c876
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