Branch: refs/heads/staging
  Home:   https://github.com/qemu/qemu
  Commit: 2e0096a2b6a5a7e3cde1dd13704cc71af6b9bdd7
      
https://github.com/qemu/qemu/commit/2e0096a2b6a5a7e3cde1dd13704cc71af6b9bdd7
  Author: Bibo Mao <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M include/standard-headers/linux/ethtool.h
    M include/standard-headers/linux/fuse.h
    M include/standard-headers/linux/input-event-codes.h
    M include/standard-headers/linux/input.h
    M include/standard-headers/linux/pci_regs.h
    M include/standard-headers/linux/virtio_ids.h
    M linux-headers/asm-loongarch/kvm.h
    M linux-headers/asm-riscv/kvm.h
    M linux-headers/asm-riscv/ptrace.h
    M linux-headers/asm-x86/kvm.h
    M linux-headers/asm-x86/unistd_64.h
    M linux-headers/asm-x86/unistd_x32.h
    M linux-headers/linux/kvm.h
    M linux-headers/linux/psp-sev.h
    M linux-headers/linux/stddef.h
    M linux-headers/linux/vduse.h
    M linux-headers/linux/vhost.h

  Log Message:
  -----------
  linux-headers: Update to Linux v6.18-rc3

Update headers to retrieve the latest KVM caps for LoongArch. It is added
to the tree by running `update-linux-headers.sh` on linux v6.18-rc3.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: c981119dab04ac20f86ae755a669d74fc1373cb7
      
https://github.com/qemu/qemu/commit/c981119dab04ac20f86ae755a669d74fc1373cb7
  Author: Bibo Mao <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/kvm/kvm.c

  Log Message:
  -----------
  target/loongarch: Add PTW feature support in KVM mode

Implement Hardware page table walker(PTW for short) feature in KVM mode.
Use OnOffAuto type variable ptw to check the PTW feature. If the PTW
feature is not supported on KVM host, there is error reported with ptw=on
option.

By default PTW feature is disabled on la464 CPU type, and auto detected
on max CPU type.

Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>


  Commit: 169e8d0c4b014fed1785fd3e31932ce92b15883f
      
https://github.com/qemu/qemu/commit/169e8d0c4b014fed1785fd3e31932ce92b15883f
  Author: Wilfred Mallawa <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M backends/spdm-socket.c
    M include/system/spdm-socket.h

  Log Message:
  -----------
  spdm-socket: add seperate send/recv functions

This is to support uni-directional transports such as SPDM over Storage.
As specified by the DMTF DSP0286.

Also update spdm_socket_rsp() to use the new send()/receive() functions. For
the case of spdm_socket_receive(), this allows us to do error checking
in one place with the addition of spdm_socket_command_valid().

Signed-off-by: Wilfred Mallawa <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: 64a9336a413beb3f6e90a2fa12b761043d10b68d
      
https://github.com/qemu/qemu/commit/64a9336a413beb3f6e90a2fa12b761043d10b68d
  Author: Wilfred Mallawa <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M include/system/spdm-socket.h

  Log Message:
  -----------
  spdm: add spdm storage transport virtual header

This header contains the transport encoding for an SPDM message that
uses the SPDM over Storage transport as defined by the DMTF DSP0286.

Note that in the StorageSpdmTransportHeader structure, security_protocol
field is defined in the SCSI Primary Commands 5 (SPC-5) specification.
The NVMe specification also refers to the SPC-5 for this definition.
The security_protocol_specific field is defined in DSP0286 and is
referred to as SP Specific for NVMe and ATA.

Signed-off-by: Wilfred Mallawa <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: e5534abeb4575db0afc2664e542b26975413fd5a
      
https://github.com/qemu/qemu/commit/e5534abeb4575db0afc2664e542b26975413fd5a
  Author: Wilfred Mallawa <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M hw/nvme/ctrl.c
    M hw/nvme/nvme.h
    M include/block/nvme.h
    M include/system/spdm-socket.h

  Log Message:
  -----------
  hw/nvme: add NVMe Admin Security SPDM support

Adds the NVMe Admin Security Send/Receive command support with support
for DMTFs SPDM. The transport binding for SPDM is defined in the
DMTF DSP0286.

Signed-off-by: Wilfred Mallawa <[email protected]>
Reviewed-by: Stefan Hajnoczi <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Klaus Jensen <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: 3d8412c2fbe9387ece65d6acb8708960bf762693
      
https://github.com/qemu/qemu/commit/3d8412c2fbe9387ece65d6acb8708960bf762693
  Author: Wilfred Mallawa <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M backends/spdm-socket.c
    M include/system/spdm-socket.h

  Log Message:
  -----------
  spdm: define SPDM transport enum types

SPDM maybe used over different transports. This patch specifies the
trasnport types as an enum with a qdev property definition such that
a user input transport type (string) can be mapped directly into the
respective SPDM transportenum for internal use.

Signed-off-by: Wilfred Mallawa <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: 7f2eeccb4b2ea66ff516d94ff57e6b72a4b4d4f9
      
https://github.com/qemu/qemu/commit/7f2eeccb4b2ea66ff516d94ff57e6b72a4b4d4f9
  Author: Wilfred Mallawa <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M docs/specs/spdm.rst
    M hw/nvme/ctrl.c
    M include/hw/pci/pci_device.h

  Log Message:
  -----------
  hw/nvme: connect SPDM over NVMe Security Send/Recv

This patch extends the existing support we have for NVMe with only DoE
to also add support to SPDM over the NVMe Security Send/Recv commands.

With the new definition of the `spdm-trans` argument, users can specify
`spdm_trans=nvme` or `spdm_trans=doe`. This allows us to select the SPDM
transport respectively. SPDM over the NVMe Security Send/Recv commands
are defined in the DMTF DSP0286.

Signed-off-by: Wilfred Mallawa <[email protected]>
Reviewed-by: Jonathan Cameron <[email protected]>
Reviewed-by: Klaus Jensen <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
[k.jensen: fix declaration in case statement; fix quotes in docs]
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: 3b41acc9629990e04812c538bdfceb7cd061861e
      
https://github.com/qemu/qemu/commit/3b41acc9629990e04812c538bdfceb7cd061861e
  Author: Alan Adamson <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M hw/nvme/ctrl.c
    M hw/nvme/ns.c
    M hw/nvme/nvme.h

  Log Message:
  -----------
  hw/nvme: enable ns atomic writes

Add support for the namespace atomic paramters: NAWUN and NAWUN. Namespace
Atomic Compare and Write Unit (NACWU) is not currently supported.

Writes that adhere to the NACWU and NAWUPF parameters are guaranteed to be
atomic.

New NVMe QEMU Paramters (See NVMe Specification for details):
        atomic.nawun=UINT16 (default: 0)
        atomic.nawupf=UINT16 (default: 0)
        atomic.nsfeat (default off) - Set Namespace Supported Atomic Boundary &
                Power (NSABP) bit in Namespace Features (NSFEAT) in the Identify
                Namespace Data Structure

See the NVMe Specification for more information.

Signed-off-by: Alan Adamson <[email protected]>
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: bce51b83709b548fbecbe64acd65225587c5b803
      
https://github.com/qemu/qemu/commit/bce51b83709b548fbecbe64acd65225587c5b803
  Author: Alan Adamson <[email protected]>
  Date:   2025-10-30 (Thu, 30 Oct 2025)

  Changed paths:
    M hw/nvme/ctrl.c
    M hw/nvme/ns.c
    M hw/nvme/nvme.h

  Log Message:
  -----------
  hw/nvme: add atomic boundary support

Add support for the namespace atomic boundary paramters: NABO, NABSN, and 
NABSPF.

Writes that cross an atomic boundary whose size is less than or equal to values
reported by AWUN/AWUPF are guaranteed to be atomic. If AWUN/AWUPF is set to 
zero,
writes that cross an atomic boundary are not guaranteed to be atomic.

The value reported by NABO field indicates the LBA on this namespace where the
first atomic boundary starts.

New NVMe QEMU Paramters (See NVMe Specification for details):
        atomic.nabo=UINT16 (default: 0)
        atomic.nabsn=UINT16 (default: 0)
        atomic.nabspf=UINT16 (default: 0)

See the NVMe Specification for more information.

Signed-off-by: Alan Adamson <[email protected]>
Reviewed-by: Jesper Wendel Devantier <[email protected]>
Signed-off-by: Klaus Jensen <[email protected]>


  Commit: 4dea00368dc75189af1773e3a06cbdb320b1dc7b
      
https://github.com/qemu/qemu/commit/4dea00368dc75189af1773e3a06cbdb320b1dc7b
  Author: Richard Henderson <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/memop.h
    M target/arm/ptw.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h
    M tcg/tcg.c

  Log Message:
  -----------
  accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY

For Arm, we need 3 cases: (1) the alignment required when accessing
Normal memory, (2) the alignment required when accessing Device memory,
and (3) the atomicity of the access.

When we added TLB_CHECK_ALIGNED, we assumed that cases 2 and 3 were
identical, and thus used memop_atomicity_bits for TLB_CHECK_ALIGNED.

This is incorrect for multiple reasons, including that the atomicity
of the access is adjusted depending on whether or not we are executing
within a serial context.

For Arm, what is true is that there is an underlying alignment
requirement of the access, and for that access Normal memory
will support unalignement.

Introduce MO_ALIGN_TLB_ONLY to indicate that the alignment
specified in MO_AMASK only applies when the TLB entry has
TLB_CHECK_ALIGNED set; otherwise no alignment required.

Introduce memop_tlb_alignment_bits with an additional bool
argument that specifies whether TLB_CHECK_ALIGNED is set.
All other usage of memop_alignment_bits assumes it is not.

Remove memop_atomicity_bits as unused; it didn't properly
support MO_ATOM_SUBWORD anyway.

Update target/arm finalize_memop_atom to set MO_ALIGN_TLB_ONLY
when strict alignment isn't otherwise required.

Suggested-by: Peter Maydell <[email protected]>
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3171
Signed-off-by: Richard Henderson <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>


  Commit: 170a39f8fbb50f6b74c82e4731d52da167c6d934
      
https://github.com/qemu/qemu/commit/170a39f8fbb50f6b74c82e4731d52da167c6d934
  Author: Richard Henderson <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M tcg/tcg-op.c

  Log Message:
  -----------
  tcg: Simplify extract2 usage in tcg_gen_shifti_i64

The else after the TCG_TARGET_HAS_extract2 test is exactly
the same as what tcg_gen_extract2_i32 would emit itself.

Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Manos Pitsidianakis <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>


  Commit: 1c11aa180714e8fb1df87923b6ddd0b17aa26204
      
https://github.com/qemu/qemu/commit/1c11aa180714e8fb1df87923b6ddd0b17aa26204
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M tests/functional/mips/test_replay.py
    M tests/functional/mips64el/test_replay.py

  Log Message:
  -----------
  tests/functional: Mark the MIPS replay tests as flaky

MIPS test_replay.py often times out (likely hang) under GitLab CI:

  2/21 qemu:func-thorough+func-mips64el-thorough+thorough / 
func-mips64el-replay   TIMEOUT   180.12s   killed by signal 15 SIGTERM

The console.log file is empty, and recording.logs only shows:

  qemu-system-mips64el: terminating on signal 15 from pid 344

Since this is a long term issue affecting our CI, disable the tests.

Reviewed-by: Thomas Huth <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>


  Commit: 34117f03edb53e37108845060c34af3aad8d0c43
      
https://github.com/qemu/qemu/commit/34117f03edb53e37108845060c34af3aad8d0c43
  Author: Philippe Mathieu-Daudé <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M tests/functional/mips/test_malta.py
    M tests/functional/mips64/test_malta.py
    M tests/functional/mips64el/test_malta.py
    M tests/functional/mipsel/test_malta.py

  Log Message:
  -----------
  tests/functional: Mark the MIPS Debian Wheezy tests as flaky

test_malta.py sometimes times out (likely hang) under GitLab CI:

  1/57 qemu:func-thorough+func-mips-thorough+thorough / func-mips-malta    
TIMEOUT   480.11s   killed by signal 15 SIGTERM

console.log shows a soft lockup failure:

  06:46,426: INIT: version 2.88 booting
  06:46,942: [[36minfo[39;49m] Using makefile-style concurrent boot in runlevel 
S.
  06:47,378: findfs: unable to resolve 
'UUID=042f1883-e9a5-4801-bb9b-667b5c8e87ea'
  06:50,448: [....] Starting the hotplug events dispatcher: 
udevd[?25l[?1c7[1G[[32m ok [39;49m8[?25h[?0c.
  06:52,269: [....] Synthesizing the initial hotplug events...module e1000: 
dangerous R_MIPS_LO16 REL relocation
  07:17,707: BUG: soft lockup - CPU#0 stuck for 22s! [modprobe:208]
  07:17,707: Modules linked in:
  07:17,707: Cpu 0
  07:17,708: $ 0   : 00000000 1000a400 0000003d 87808b00
  07:17,708: $ 4   : 87808b00 87808bf0 00000000 00000000
  07:17,709: $ 8   : 86862100 86862100 86862100 86862100
  07:17,709: $12   : 86862100 00000000 00000001 86862100
  07:17,709: $16   : 87808a00 86862100 1000a401 c008fa60
  07:17,709: $20   : 86862100 8041d230 00000000 ffff0000
  07:17,710: $24   : 00000000 77711470
  07:17,710: $28   : 87bb6000 87bb7df8 8041d230 801f7388
  07:17,710: Hi    : 00000000
  07:17,710: Lo    : 00000000
  07:17,711: epc   : 801f7308 kfree+0x104/0x19c
  07:17,711: Not tainted
  07:17,711: ra    : 801f7388 kfree+0x184/0x19c
  07:17,712: Status: 1000a403    KERNEL EXL IE
  07:17,712: Cause : 50808000
  07:17,712: PrId  : 00019300 (MIPS 24Kc)
  07:45,707: BUG: soft lockup - CPU#0 stuck for 22s! [modprobe:208]
  07:45,707: Modules linked in:

Reported-by: Daniel P. Berrangé <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Richard Henderson <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>


  Commit: 0db2de22fcbf90adafab9d9dd1fc8203c66bfa75
      
https://github.com/qemu/qemu/commit/0db2de22fcbf90adafab9d9dd1fc8203c66bfa75
  Author: Peter Maydell <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M linux-user/syscall.c

  Log Message:
  -----------
  linux-user: permit sendto() with NULL buf and 0 len

If you pass sendto() a NULL buffer, this is usually an error
(causing an EFAULT return); however if you pass a 0 length then
we should not try to validate the buffer provided. Instead we
skip the copying of the user data and possible processing
through fd_trans_target_to_host_data, and call the host syscall
with NULL, 0.

(unlock_user() permits a NULL buffer pointer for "do nothing"
so we don't need to special case the unlock code.)

Cc: [email protected]
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/3102
Signed-off-by: Peter Maydell <[email protected]>
Reviewed-by: Michael Tokarev <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-ID: <[email protected]>


  Commit: 5a572dd2cb4c96e51c7c0d6a549050ed33dea269
      
https://github.com/qemu/qemu/commit/5a572dd2cb4c96e51c7c0d6a549050ed33dea269
  Author: Richard Henderson <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M accel/tcg/cputlb.c
    M include/exec/memop.h
    M linux-user/syscall.c
    M target/arm/ptw.c
    M target/arm/tcg/translate-a64.c
    M target/arm/tcg/translate-neon.c
    M target/arm/tcg/translate.h
    M tcg/tcg-op.c
    M tcg/tcg.c
    M tests/functional/mips/test_malta.py
    M tests/functional/mips/test_replay.py
    M tests/functional/mips64/test_malta.py
    M tests/functional/mips64el/test_malta.py
    M tests/functional/mips64el/test_replay.py
    M tests/functional/mipsel/test_malta.py

  Log Message:
  -----------
  Merge tag 'pull-misc-20251031' of https://gitlab.com/rth7680/qemu into staging

linux-user: permit sendto() with NULL buf and 0 len
tests/functional: Mark the MIPS replay tests as flaky
tests/functional: Mark the MIPS Debian Wheezy tests as flaky
accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY
tcg: Simplify extract2 usage in tcg_gen_shifti_i64

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[ultimate]

* tag 'pull-misc-20251031' of https://gitlab.com/rth7680/qemu:
  linux-user: permit sendto() with NULL buf and 0 len
  tests/functional: Mark the MIPS Debian Wheezy tests as flaky
  tests/functional: Mark the MIPS replay tests as flaky
  tcg: Simplify extract2 usage in tcg_gen_shifti_i64
  accel/tcg: Introduce and use MO_ALIGN_TLB_ONLY

Signed-off-by: Richard Henderson <[email protected]>


  Commit: 050b3d3630051fc4637d6c5078033680ec7c5f5e
      
https://github.com/qemu/qemu/commit/050b3d3630051fc4637d6c5078033680ec7c5f5e
  Author: Richard Henderson <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M include/standard-headers/linux/ethtool.h
    M include/standard-headers/linux/fuse.h
    M include/standard-headers/linux/input-event-codes.h
    M include/standard-headers/linux/input.h
    M include/standard-headers/linux/pci_regs.h
    M include/standard-headers/linux/virtio_ids.h
    M linux-headers/asm-loongarch/kvm.h
    M linux-headers/asm-riscv/kvm.h
    M linux-headers/asm-riscv/ptrace.h
    M linux-headers/asm-x86/kvm.h
    M linux-headers/asm-x86/unistd_64.h
    M linux-headers/asm-x86/unistd_x32.h
    M linux-headers/linux/kvm.h
    M linux-headers/linux/psp-sev.h
    M linux-headers/linux/stddef.h
    M linux-headers/linux/vduse.h
    M linux-headers/linux/vhost.h
    M target/loongarch/cpu.c
    M target/loongarch/cpu.h
    M target/loongarch/kvm/kvm.c

  Log Message:
  -----------
  Merge tag 'pull-loongarch-20251030' of https://github.com/bibo-mao/qemu into 
staging

loongarch queue

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* tag 'pull-loongarch-20251030' of https://github.com/bibo-mao/qemu:
  target/loongarch: Add PTW feature support in KVM mode
  linux-headers: Update to Linux v6.18-rc3

Signed-off-by: Richard Henderson <[email protected]>


  Commit: c494afbb7d552604ad26036127655c534a2645e5
      
https://github.com/qemu/qemu/commit/c494afbb7d552604ad26036127655c534a2645e5
  Author: Richard Henderson <[email protected]>
  Date:   2025-10-31 (Fri, 31 Oct 2025)

  Changed paths:
    M backends/spdm-socket.c
    M docs/specs/spdm.rst
    M hw/nvme/ctrl.c
    M hw/nvme/ns.c
    M hw/nvme/nvme.h
    M include/block/nvme.h
    M include/hw/pci/pci_device.h
    M include/system/spdm-socket.h

  Log Message:
  -----------
  Merge tag 'pull-nvme-20251030' of https://gitlab.com/birkelund/qemu into 
staging

nvme queue

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# gpg: Signature made Thu 30 Oct 2025 08:28:56 AM CET
# gpg:                using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9
# gpg: Good signature from "Klaus Jensen <[email protected]>" [unknown]
# gpg:                 aka "Klaus Jensen <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
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#      Subkey fingerprint: 5228 33AA 75E2 DCE6 A247  66C0 4DE1 AF31 6D4F 0DE9

* tag 'pull-nvme-20251030' of https://gitlab.com/birkelund/qemu:
  hw/nvme: add atomic boundary support
  hw/nvme: enable ns atomic writes
  hw/nvme: connect SPDM over NVMe Security Send/Recv
  spdm: define SPDM transport enum types
  hw/nvme: add NVMe Admin Security SPDM support
  spdm: add spdm storage transport virtual header
  spdm-socket: add seperate send/recv functions

Signed-off-by: Richard Henderson <[email protected]>


Compare: https://github.com/qemu/qemu/compare/3728de31925a...c494afbb7d55

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