Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: 0f1f73bb37bb9e93d108e044224ecad9e4ecb3a5
https://github.com/qemu/qemu/commit/0f1f73bb37bb9e93d108e044224ecad9e4ecb3a5
Author: Alejandro Jimenez <[email protected]>
Date: 2025-11-07 (Fri, 07 Nov 2025)
Changed paths:
M MAINTAINERS
Log Message:
-----------
MAINTAINERS: Update entry for AMD-Vi Emulation
Add myself as maintainer and Sairaj Kodilkar as reviewer.
Reviewed-by: Cédric Le Goater <[email protected]>
Acked-by: Sairaj Kodilkar <[email protected]>
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 27d6a0ec0beec45c35a70cd5f12c4530725dda2a
https://github.com/qemu/qemu/commit/27d6a0ec0beec45c35a70cd5f12c4530725dda2a
Author: Sairaj Kodilkar <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Fix handling of devices on buses != 0
The AMD IOMMU is set up at boot time and uses PCI bus numbers + devfn for
indexing into the DTE. The problem is that before the guest starts, all PCI
bus numbers are 0 as no PCI discovery has happened yet (BIOS and/or kernel
will do that later), so relying on the bus number is wrong.
The immediate effect is that emulated devices cannot do DMA when placed on a
bus other than 0.
Replace the static address_space array with a hash table keyed by devfn and
PCIBus*, since these values do not change after the guest boots.
Co-developed-by: Alexey Kardashevskiy <[email protected]>
Signed-off-by: Alexey Kardashevskiy <[email protected]>
Signed-off-by: Sairaj Kodilkar <[email protected]>
Reviewed-by: Vasant Hegde <[email protected]>
Reviewed-by: Alejandro Jimenez <[email protected]>
Tested-by: Alejandro Jimenez <[email protected]>
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 637dc49a3ae6b72cdb6415dcdcdb22ff770f2c8d
https://github.com/qemu/qemu/commit/637dc49a3ae6b72cdb6415dcdcdb22ff770f2c8d
Author: Sairaj Kodilkar <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
Log Message:
-----------
amd_iommu: Support 64-bit address for IOTLB lookup
The physical AMD IOMMU supports up to 64 bits of IOVA. When a device tries
to read or write from a given DMA address, the IOMMU translates the address
using the I/O page tables assigned to that device. Since the emulated IOMMU
uses per-device page tables, an ideal cache tag would need to be 68 bits
(64-bit address - 12-bit page alignment + 16-bit device ID).
The current software IOTLB implementation uses a GLib hash table with a
64-bit key to hash both the IOVA and device ID, which limits the IOVA to 60
bits. This causes a failure while setting up the device when a guest is
booted with "iommu.forcedac=1", which forces the use of DMA addresses at the
top of the 64-bit address space.
To address this issue, construct the 64-bit hash key using the upper 52 bits
of IOVA (GFN) and lower 12 bits of the device ID to avoid truncation as much
as possible (reducing hash collisions).
Fixes: d29a09ca6842 ("hw/i386: Introduce AMD IOMMU")
Signed-off-by: Sairaj Kodilkar <[email protected]>
Reviewed-by: Vasant Hegde <[email protected]>
Reviewed-by: Alejandro Jimenez <[email protected]>
Tested-by: Alejandro Jimenez <[email protected]>
Signed-off-by: Alejandro Jimenez <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: fde5930cc37175cfcd0f03a089e26f4458a52311
https://github.com/qemu/qemu/commit/fde5930cc37175cfcd0f03a089e26f4458a52311
Author: Albert Esteve <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: fix shared object lookup handler logic
Refactor backend_read() function and add a reply_ack variable
to have the option for handlers to force tweak whether they should
send a reply or not without depending on VHOST_USER_NEED_REPLY_MASK
flag.
This fixes an issue with
vhost_user_backend_handle_shared_object_lookup() logic, as the
error path was not closing the backend channel correctly. So,
we can remove the reply call from within the handler, make
sure it returns early on errors as other handlers do and
set the reply_ack variable on backend_read() to true to ensure
that it will send a response, thus keeping the original intent.
Fixes: 1609476662 ("vhost-user: add shared_object msg")
Cc: [email protected]
Signed-off-by: Albert Esteve <[email protected]>
Reviewed-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 43b8c4339709efef153cb2cf21d23d1791890d60
https://github.com/qemu/qemu/commit/43b8c4339709efef153cb2cf21d23d1791890d60
Author: Zhenzhong Duan <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
M hw/i386/trace-events
M include/hw/i386/intel_iommu.h
Log Message:
-----------
intel_iommu: Handle PASID cache invalidation
Adds a new entry VTDPASIDCacheEntry in VTDAddressSpace to cache the pasid
entry and track PASID usage and future PASID tagged DMA address translation
support in vIOMMU.
When guest triggers pasid cache invalidation, QEMU will capture it and
update or invalidate pasid cache.
vIOMMU emulator could figure out the reason by fetching latest guest pasid
entry in memory and compare it with cached PASID entry if it's valid.
Signed-off-by: Yi Liu <[email protected]>
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Yi Liu <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: baff72ca2a67974cb19499e7f8b7d87675adc746
https://github.com/qemu/qemu/commit/baff72ca2a67974cb19499e7f8b7d87675adc746
Author: Zhenzhong Duan <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/i386/intel_iommu.c
M hw/i386/trace-events
Log Message:
-----------
intel_iommu: Reset pasid cache when system level reset
Reset pasid cache when system level reset. Currently we don't have any
device supporting PASID yet. So all are PASID_0, its vtd_as is allocated
by PCI system and never removed, just mark pasid cache invalid.
Signed-off-by: Yi Liu <[email protected]>
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Yi Liu <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: c9cf33075a4c8eb299e0ac3bb67ad96490499ced
https://github.com/qemu/qemu/commit/c9cf33075a4c8eb299e0ac3bb67ad96490499ced
Author: Zhenzhong Duan <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/i386/intel_iommu.c
Log Message:
-----------
intel_iommu: Fix DMA failure when guest switches IOMMU domain
Kernel allows user to switch IOMMU domain, e.g., switch between DMA
and identity domain. When this happen in IOMMU scalable mode, a pasid
cache invalidation request is sent, this request is ignored by vIOMMU
which leads to device binding to wrong address space, then DMA fails.
This issue exists in scalable mode with both first stage and second
stage translations, both emulated and passthrough devices.
Take network device for example, below sequence trigger issue:
1. start a guest with iommu=pt
2. echo 0000:01:00.0 > /sys/bus/pci/drivers/virtio-pci/unbind
3. echo DMA > /sys/kernel/iommu_groups/6/type
4. echo 0000:01:00.0 > /sys/bus/pci/drivers/virtio-pci/bind
5. Ping test
Fix it by switching address space in invalidation handler.
Fixes: 4a4f219e8a10 ("intel_iommu: add scalable-mode option to make scalable
mode work")
Signed-off-by: Zhenzhong Duan <[email protected]>
Reviewed-by: Yi Liu <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 1ba9a5220325dd5260a0c37b6299ce38364a5120
https://github.com/qemu/qemu/commit/1ba9a5220325dd5260a0c37b6299ce38364a5120
Author: German Maglione <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/virtio/vhost-user.c
Log Message:
-----------
vhost-user: make vhost_set_vring_file() synchronous
QEMU sends all of VHOST_USER_SET_VRING_KICK, _CALL, and _ERR without
setting the NEED_REPLY flag, i.e. by the time the respective
vhost_user_set_vring_*() function returns, it is completely up to chance
whether the back-end has already processed the request and switched over
to the new FD for interrupts.
At least for vhost_user_set_vring_call(), that is a problem: It is
called through vhost_virtqueue_mask(), which is generally used in the
VirtioDeviceClass.guest_notifier_mask() implementation, which is in turn
called by virtio_pci_one_vector_unmask(). The fact that we do not wait
for the back-end to install the FD leads to a race there:
Masking interrupts is implemented by redirecting interrupts to an
internal event FD that is not connected to the guest. Unmasking then
re-installs the guest-connected IRQ FD, then checks if there are pending
interrupts left on the masked event FD, and if so, issues an interrupt
to the guest.
Because guest_notifier_mask() (through vhost_user_set_vring_call())
doesn't wait for the back-end to switch over to the actual IRQ FD, it's
possible we check for pending interrupts while the back-end is still
using the masked event FD, and then we will lose interrupts that occur
before the back-end finally does switch over.
Fix this by setting NEED_REPLY on those VHOST_USER_SET_VRING_* messages,
so when we get that reply, we know that the back-end is now using the
new FD.
We have a few reports of a virtiofs mount hanging:
- https://gitlab.com/virtio-fs/virtiofsd/-/issues/101
- https://gitlab.com/virtio-fs/virtiofsd/-/issues/133
- https://gitlab.com/virtio-fs/virtiofsd/-/issues/213
This is quite difficult bug to reproduce, even for the reporters.
It only happens on production, every few weeks, and/or on 1 in 300 VMs.
So, we are not 100% sure this fixes that issue. However, we think this
is still a bug, and at least we have one report that claims this fixed
the issue:
https://gitlab.com/virtio-fs/virtiofsd/-/issues/133#note_2743209419
Fixes: 5f6f6664bf24 ("Add vhost-user as a vhost backend.")
Signed-off-by: German Maglione <[email protected]>
Signed-off-by: Hanna Czenczek <[email protected]>
Reviewed-by: Eugenio Pérez <[email protected]>
Reviewed-by: Stefano Garzarella <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 3e6ad83f209ea8cf497e5d160e44c1bc5e518f1a
https://github.com/qemu/qemu/commit/3e6ad83f209ea8cf497e5d160e44c1bc5e518f1a
Author: Shameer Kolothum <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/qtest/bios-tables-test: Prepare for _DSM change in the DSDT table
Subsequent patch will fix the GPEX _DSM method. Add the affected DSDT blobs
to allowed-diff list for bios-table tests.
Signed-off-by: Shameer Kolothum <[email protected]>
Reviewed-by: Eric Auger <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 325aa2d86a20786c308b0874d15a60d1b924bd0e
https://github.com/qemu/qemu/commit/325aa2d86a20786c308b0874d15a60d1b924bd0e
Author: Eric Auger <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/pci-host/gpex-acpi.c
Log Message:
-----------
hw/pci-host/gpex-acpi: Fix _DSM function 0 support return value
Currently, only function 0 is supported. According to the ACPI
Specification, Revision 6.6, Section 9.1.1 “_DSM (Device Specific
Method)”, bit 0 should be 0 to indicate that no other functions
are supported beyond function 0.
The resulting AML change looks like this:
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d")
{
If ((Arg2 == Zero))
{
Return (Buffer (One)
{
- 0x01 // .
+ 0x00 // .
})
}
}
}
Fixes: 5b85eabe68f9 ("acpi: add acpi_dsdt_add_gpex")
Signed-off-by: Eric Auger <[email protected]>
Signed-off-by: Shameer Kolothum <[email protected]>
Tested-by: Zhangfei Gao <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: ccf166d89dcf57c9d333f05173851f90e416097a
https://github.com/qemu/qemu/commit/ccf166d89dcf57c9d333f05173851f90e416097a
Author: Shameer Kolothum <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M tests/data/acpi/aarch64/virt/DSDT
M tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
M tests/data/acpi/aarch64/virt/DSDT.acpipcihp
M tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex
M tests/data/acpi/aarch64/virt/DSDT.memhp
M tests/data/acpi/aarch64/virt/DSDT.pxb
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy
M tests/data/acpi/aarch64/virt/DSDT.topology
M tests/data/acpi/aarch64/virt/DSDT.viot
M tests/data/acpi/loongarch64/virt/DSDT
M tests/data/acpi/loongarch64/virt/DSDT.memhp
M tests/data/acpi/loongarch64/virt/DSDT.numamem
M tests/data/acpi/loongarch64/virt/DSDT.topology
M tests/data/acpi/riscv64/virt/DSDT
M tests/data/acpi/x86/microvm/DSDT.pcie
M tests/qtest/bios-tables-test-allowed-diff.h
Log Message:
-----------
tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _DSM change
Update the reference DSDT blobs after GPEX _DSM change. This affects the
aarch64 'virt', riscv64 "virt", loongarch64 "virt" and the x86 'microvm'
machines.
DSDT diff is the same for all the machines/tests:
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20230628 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
* Disassembling to symbolic ASL+ operators
*
- * Disassembly of tests/data/acpi/aarch64/virt/DSDT, Fri Oct 10 11:18:21 2025
+ * Disassembly of /tmp/aml-E6V9D3, Fri Oct 10 11:18:21 2025
*
* Original Table Header:
* Signature "DSDT"
* Length 0x000014D9 (5337)
* Revision 0x02
- * Checksum 0xA4
+ * Checksum 0xA5
* OEM ID "BOCHS "
* OEM Table ID "BXPC "
* OEM Revision 0x00000001 (1)
* Compiler ID "BXPC"
* Compiler Version 0x00000001 (1)
*/
DefinitionBlock ("", "DSDT", 2, "BOCHS ", "BXPC ", 0x00000001)
{
Scope (\_SB)
{
Device (C000)
{
Name (_HID, "ACPI0007" /* Processor Device */) // _HID: Hardware
ID
Name (_UID, Zero) // _UID: Unique ID
}
@@ -1822,33 +1822,33 @@
Else
{
CDW1 |= 0x04
}
Return (Arg3)
}
Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method
{
If ((Arg0 == ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d")
/* Device Labeling Interface */))
{
If ((Arg2 == Zero))
{
Return (Buffer (One)
{
- 0x01
// .
+ 0x00
// .
})
}
}
Return (Buffer (One)
{
0x00 // .
})
}
Device (RES0)
{
Name (_HID, "PNP0C02" /* PNP Motherboard Resources */) //
_HID: Hardware ID
Name (_CRS, ResourceTemplate () // _CRS: Current Resource
Settings
{
QWordMemory (ResourceProducer, PosDecode, MinFixed,
MaxFixed, NonCacheable, ReadWrite,
Signed-off-by: Shameer Kolothum <[email protected]>
Reviewed-by: Eric Auger <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 1c79ab6937ae938d3dfd4da1c01afc7eb599857e
https://github.com/qemu/qemu/commit/1c79ab6937ae938d3dfd4da1c01afc7eb599857e
Author: Paolo Abeni <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/core/machine.c
M hw/net/virtio-net.c
Log Message:
-----------
virtio-net: Advertise UDP tunnel GSO support by default
Allow bidirectional aggregated traffic for UDP encapsulated flows.
Add the needed compatibility entries to avoid migration issues
vs older QEMU instances.
Signed-off-by: Paolo Abeni <[email protected]>
Acked-by: Jason Wang <[email protected]>
Tested-by: Lei Yang <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id:
<9c500fbcd2cf29afd1826b1ac906f9d5beac3601.1760104079.git.pab...@redhat.com>
Commit: fa4136387928749d5a1b4fa3606ae0ce6dce75aa
https://github.com/qemu/qemu/commit/fa4136387928749d5a1b4fa3606ae0ce6dce75aa
Author: Gerd Hoffmann <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M hw/i386/pc.c
M hw/pci-host/q35.c
Log Message:
-----------
q35: increase default tseg size
With virtual machines becoming larger (more CPUs, more memory) the
memory needed by the SMM code in OVMF to manage page tables and vcpu
state grows too.
Default SMM memory (aka TSEG) size is 16 MB, and this often is not
enough. Bump it to 64 MB for new machine types.
Signed-off-by: Gerd Hoffmann <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 97f24a0496be9e0a7216fea1fa0d54c1db9066e2
https://github.com/qemu/qemu/commit/97f24a0496be9e0a7216fea1fa0d54c1db9066e2
Author: Alyssa Ross <[email protected]>
Date: 2025-11-09 (Sun, 09 Nov 2025)
Changed paths:
M docs/interop/vhost-user.rst
Log Message:
-----------
vhost-user.rst: clarify when FDs can be sent
Previously the spec did not say where in a message the FDs should be
sent. As I understand it, FDs transferred in ancillary data will
always be received along with the first byte of the data they were
sent with, so we should define which byte that is. Going by both
libvhost-user in QEMU and the rust-vmm crate, that byte is the first
byte of the message header. This is important to specify because it
would make back-end implementation significantly more complicated if
receiving file descriptors in the middle of a message had to be
handled.
Signed-off-by: Alyssa Ross <[email protected]>
Reviewed-by: Michael S. Tsirkin <[email protected]>
Signed-off-by: Michael S. Tsirkin <[email protected]>
Message-Id: <[email protected]>
Commit: 593aee5df98b4a862ff8841a57ea3dbf22131a5f
https://github.com/qemu/qemu/commit/593aee5df98b4a862ff8841a57ea3dbf22131a5f
Author: Richard Henderson <[email protected]>
Date: 2025-11-10 (Mon, 10 Nov 2025)
Changed paths:
M MAINTAINERS
M docs/interop/vhost-user.rst
M hw/core/machine.c
M hw/i386/amd_iommu.c
M hw/i386/amd_iommu.h
M hw/i386/intel_iommu.c
M hw/i386/intel_iommu_internal.h
M hw/i386/pc.c
M hw/i386/trace-events
M hw/net/virtio-net.c
M hw/pci-host/gpex-acpi.c
M hw/pci-host/q35.c
M hw/virtio/vhost-user.c
M include/hw/i386/intel_iommu.h
M tests/data/acpi/aarch64/virt/DSDT
M tests/data/acpi/aarch64/virt/DSDT.acpihmatvirt
M tests/data/acpi/aarch64/virt/DSDT.acpipcihp
M tests/data/acpi/aarch64/virt/DSDT.hpoffacpiindex
M tests/data/acpi/aarch64/virt/DSDT.memhp
M tests/data/acpi/aarch64/virt/DSDT.pxb
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-dev
M tests/data/acpi/aarch64/virt/DSDT.smmuv3-legacy
M tests/data/acpi/aarch64/virt/DSDT.topology
M tests/data/acpi/aarch64/virt/DSDT.viot
M tests/data/acpi/loongarch64/virt/DSDT
M tests/data/acpi/loongarch64/virt/DSDT.memhp
M tests/data/acpi/loongarch64/virt/DSDT.numamem
M tests/data/acpi/loongarch64/virt/DSDT.topology
M tests/data/acpi/riscv64/virt/DSDT
M tests/data/acpi/x86/microvm/DSDT.pcie
Log Message:
-----------
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu
into staging
virtio,pci,pc: fixes for 10.2
small fixes all over the place.
UDP tunnel and TSEG tweaks are kind of borderline,
but I feel not making the change now will just add
to compatibility headaches down the road.
Signed-off-by: Michael S. Tsirkin <[email protected]>
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# gpg: issuer "[email protected]"
# gpg: Good signature from "Michael S. Tsirkin <[email protected]>" [unknown]
# gpg: aka "Michael S. Tsirkin <[email protected]>" [unknown]
# gpg: WARNING: The key's User ID is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67
# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu:
vhost-user.rst: clarify when FDs can be sent
q35: increase default tseg size
virtio-net: Advertise UDP tunnel GSO support by default
tests/qtest/bios-tables-test: Update DSDT blobs after GPEX _DSM change
hw/pci-host/gpex-acpi: Fix _DSM function 0 support return value
tests/qtest/bios-tables-test: Prepare for _DSM change in the DSDT table
vhost-user: make vhost_set_vring_file() synchronous
intel_iommu: Fix DMA failure when guest switches IOMMU domain
intel_iommu: Reset pasid cache when system level reset
intel_iommu: Handle PASID cache invalidation
vhost-user: fix shared object lookup handler logic
amd_iommu: Support 64-bit address for IOTLB lookup
amd_iommu: Fix handling of devices on buses != 0
MAINTAINERS: Update entry for AMD-Vi Emulation
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/ad9ce9f6f236...593aee5df98b
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