Branch: refs/heads/staging
Home: https://github.com/qemu/qemu
Commit: c072bfd536c406b1bd4f121f5696535f5101dd0a
https://github.com/qemu/qemu/commit/c072bfd536c406b1bd4f121f5696535f5101dd0a
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/README
R target/hexagon/gen_tcg_func_table.py
M target/hexagon/genptr.c
M target/hexagon/meson.build
Log Message:
-----------
Hexagon (target/hexagon) Remove gen_tcg_func_table.py
This can easily be done in C with opcodes_def_generated.h.inc
Note that gen_tcg_func_table.py has some logic to skip instructions.
However, there aren't any instructions currently in the code that would
be skipped by this logic. So, it is safe to base the table on the
complete opcodes table.
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Tested-by: Brian Cain <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: c2f724cfb7f7f36ce4c5f001a965a3260b4db9ed
https://github.com/qemu/qemu/commit/c2f724cfb7f7f36ce4c5f001a965a3260b4db9ed
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/arch.c
M target/hexagon/arch.h
M target/hexagon/gen_helper_funcs.py
M target/hexagon/gen_tcg.h
M target/hexagon/gen_tcg_funcs.py
M target/hexagon/helper.h
M target/hexagon/op_helper.c
Log Message:
-----------
Hexagon (target/hexagon) Add pkt_need_commit argument to arch_fpop_end
The arch_fpop_end function converts the softfloat fp_status flags to
bits set in Hexagon USR. It is hard-coded that the packet must need
a commit. We add an argument to the function and update all the helper
call sites.
In a subsequent commit, we will change the code that forces a commit
when the packet contains an floating point instruction.
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Taylor Simpson <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: 3e98496691edc73a2d79e43c6ac348bb8e72298f
https://github.com/qemu/qemu/commit/3e98496691edc73a2d79e43c6ac348bb8e72298f
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/translate.c
M target/hexagon/translate.h
Log Message:
-----------
Hexagon (target/hexagon) Implicit writes to USR don't force packet commit
Implicit writes to USR are only to specific fields of USR to indicate
side effects (e.g., saturation overflow, floating point status).
In these cases, we don't force a packet commit. This will allow more
packets to be short-circuited (avoid writing the results to temporaries).
When there is a packet commit with an implicit write to USR, we initialize
new_value_usr during gen_start_packet and write to USR in gen_reg_writes.
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Taylor Simpson <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: fb7aceaf1399fb15ef67246e23a5e023abaa0fd5
https://github.com/qemu/qemu/commit/fb7aceaf1399fb15ef67246e23a5e023abaa0fd5
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M tests/tcg/hexagon/usr.c
Log Message:
-----------
Hexagon (tests/tcg/hexagon) Add test for USR changes in packet
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: e70fcf1c3e8e674f400d86c4321726181d476f3a
https://github.com/qemu/qemu/commit/e70fcf1c3e8e674f400d86c4321726181d476f3a
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/gen_analyze_funcs.py
M target/hexagon/translate.c
Log Message:
-----------
Hexagon (target/hexagon) analyze all reads before writes
I noticed that analyze_packet is marking the implicit pred reads after
marking all the writes. However, the semantics of the instrucion and
packet are to do all the reads, then do the operation, then do all the
writes.
Here is the old code
static void analyze_packet(DisasContext *ctx)
{
Packet *pkt = ctx->pkt;
ctx->read_after_write = false;
ctx->has_hvx_overlap = false;
for (int i = 0; i < pkt->num_insns; i++) {
Insn *insn = &pkt->insn[i];
ctx->insn = insn;
if (opcode_analyze[insn->opcode]) {
opcode_analyze[insn->opcode](ctx);
}
mark_implicit_reg_writes(ctx);
mark_implicit_pred_writes(ctx);
mark_implicit_pred_reads(ctx);
}
ctx->need_commit = need_commit(ctx);
}
Recall that opcode_analyze[insn->opcode](ctx) will mark all the
explicit reads then all the explicit writes.
To properly handle the semantics, we'll create two new functions
mark_implicit_reads
mark_implicit_writes
Then we change gen_analyze_funcs.py to add a call to the former
after all the explicit reads and a call to the latter after all
the explicit_writes.
The reason this is an RFC patch is I can't find any instructions
where this distinction makes a difference in ctx->need_commit which
determines if the packet commit can be short-circuited. However, this
could change in the future if the architecture introduces an
instruction with an implicit read of a register that is also written
(either implicit or explicit). Then, anlayze_packet would detect
a read-after-write, and the packet would not short-circuit. The
execution would be correct, but the performance would not be optimal.
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Tested-by: Brian Cain <[email protected]>
Message-Id: <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: c3d9f1b84b7c5363d7a76752616685c9992bc5eb
https://github.com/qemu/qemu/commit/c3d9f1b84b7c5363d7a76752616685c9992bc5eb
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/README
M target/hexagon/gen_tcg.h
M target/hexagon/gen_tcg_funcs.py
M target/hexagon/genptr.c
M target/hexagon/genptr.h
M target/hexagon/hex_common.py
M target/hexagon/idef-parser/parser-helpers.c
Log Message:
-----------
Hexagon (target/hexagon) Remove gen_log_reg_write
The gen_log_reg_write function is a memnant of the original Hexagon
target design. With the addition of gen_analyze_funcs.py and the
ability to short-circuit a packet commit, this function can be
removed.
Note that the implementation of gen_log_reg_write contains a check
of the register mutability mask. This is only needed for control
registers, so we move it to gen_write_ctrl_reg.
We do need the gen_log_reg_write_pair function, but the name is
now misleading, so we change the name go gen_write_reg_pair.
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: b68bcbf6ea44ccb3729f34b39feaeffa31996c50
https://github.com/qemu/qemu/commit/b68bcbf6ea44ccb3729f34b39feaeffa31996c50
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/gen_tcg.h
M target/hexagon/genptr.c
M target/hexagon/genptr.h
M target/hexagon/hex_common.py
M target/hexagon/idef-parser/parser-helpers.c
Log Message:
-----------
Hexagon (target/hexagon) s/gen_log_pred_write/gen_pred_write
The function doesn't "log" anything, it just generates the write
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: 19366c95f040d356c37d714c4a73fd44fca00b85
https://github.com/qemu/qemu/commit/19366c95f040d356c37d714c4a73fd44fca00b85
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/genptr.c
M target/hexagon/hex_common.py
Log Message:
-----------
Hexagon (target/hexagon) s/gen_log_vreg_write/gen_vreg_write
Note there are two functions impacted
gen_log_vreg_write -> gen_vreg_write
gen_log_vreg_write_pair -> gen_vreg_write_pair
These functions don't "log" anything, they just generate the write
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: 15722c774ab2fa6904464cd531bc1120d9553896
https://github.com/qemu/qemu/commit/15722c774ab2fa6904464cd531bc1120d9553896
Author: Taylor Simpson <[email protected]>
Date: 2025-12-31 (Wed, 31 Dec 2025)
Changed paths:
M target/hexagon/gen_tcg_funcs.py
M target/hexagon/hex_common.py
Log Message:
-----------
Hexagon (target/hexagon) s/log_write/gen_write
These functions don't "log" anything, they just generate the write
Signed-off-by: Taylor Simpson <[email protected]>
Reviewed-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Commit: 159107e390609f71b78268a4888563dcdce6ac65
https://github.com/qemu/qemu/commit/159107e390609f71b78268a4888563dcdce6ac65
Author: Richard Henderson <[email protected]>
Date: 2026-01-05 (Mon, 05 Jan 2026)
Changed paths:
M target/hexagon/README
M target/hexagon/arch.c
M target/hexagon/arch.h
M target/hexagon/gen_analyze_funcs.py
M target/hexagon/gen_helper_funcs.py
M target/hexagon/gen_tcg.h
R target/hexagon/gen_tcg_func_table.py
M target/hexagon/gen_tcg_funcs.py
M target/hexagon/genptr.c
M target/hexagon/genptr.h
M target/hexagon/helper.h
M target/hexagon/hex_common.py
M target/hexagon/idef-parser/parser-helpers.c
M target/hexagon/meson.build
M target/hexagon/op_helper.c
M target/hexagon/translate.c
M target/hexagon/translate.h
M tests/tcg/hexagon/usr.c
Log Message:
-----------
Merge tag 'pull-hex-20260102' of https://github.com/quic/qemu into staging
Bypass packet commit for implicit usr write; cleanup
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# gpg: Signature made Sat 03 Jan 2026 07:01:12 AM AEDT
# gpg: using RSA key 3D66AAE474594824C88CE0F81A54AFB8E5646C32
# gpg: Good signature from "Brian Cain (QUIC) <[email protected]>"
[unknown]
# gpg: aka "Brian Cain <[email protected]>" [unknown]
# gpg: aka "Brian Cain (QuIC) <[email protected]>" [unknown]
# gpg: aka "Brian Cain (CAF) <[email protected]>" [unknown]
# gpg: aka "bcain" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6350 20F9 67A7 7164 79EF 49E0 175C 464E 541B 6D47
# Subkey fingerprint: 3D66 AAE4 7459 4824 C88C E0F8 1A54 AFB8 E564 6C32
* tag 'pull-hex-20260102' of https://github.com/quic/qemu:
Hexagon (target/hexagon) s/log_write/gen_write
Hexagon (target/hexagon) s/gen_log_vreg_write/gen_vreg_write
Hexagon (target/hexagon) s/gen_log_pred_write/gen_pred_write
Hexagon (target/hexagon) Remove gen_log_reg_write
Hexagon (target/hexagon) analyze all reads before writes
Hexagon (tests/tcg/hexagon) Add test for USR changes in packet
Hexagon (target/hexagon) Implicit writes to USR don't force packet commit
Hexagon (target/hexagon) Add pkt_need_commit argument to arch_fpop_end
Hexagon (target/hexagon) Remove gen_tcg_func_table.py
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/667e1fff8783...159107e39060
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