Branch: refs/heads/master
Home: https://github.com/qemu/qemu
Commit: 7f93bcf696079a6f53749658f3a923562358fe27
https://github.com/qemu/qemu/commit/7f93bcf696079a6f53749658f3a923562358fe27
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M target/loongarch/cpu-csr.h
M target/loongarch/cpu.h
M target/loongarch/kvm/kvm.c
M target/loongarch/machine.c
Log Message:
-----------
target/loongarch: Add PMU migration support in KVM mode
PMU is supported in KVM mode. When VM is migrated, PMU register should
be migrated also, otherwise PMU will be disabled after migration.
Here add PMU register save and restore interface and PMU register
state migration is added also.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: 411b9496ca327f333b50a6608bef75fc3f6896aa
https://github.com/qemu/qemu/commit/411b9496ca327f333b50a6608bef75fc3f6896aa
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M target/loongarch/cpu.c
Log Message:
-----------
target/loongarch: Call function loongarch_la464_init_csr() after realized
When CPU is realized, it will check capability of host and set guest
features, such as PMU CSR register number used by VM etc. Here move
function call with loongarch_la464_init_csr() after CPU is realized.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: f9870fe1ec40dba64baeafa7a8b7c4763afd1673
https://github.com/qemu/qemu/commit/f9870fe1ec40dba64baeafa7a8b7c4763afd1673
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M target/loongarch/cpu.c
M target/loongarch/csr.c
Log Message:
-----------
target/loongarch: Add PMU register dump support in KVM
PMU is supported in KVM mode. With info registers command, PMU CSR
registers should be dumped also. And it is not necessary in TCG mode.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: 4150801bfd46a5b797dd1b7e5ec8fb5ac55f2cb7
https://github.com/qemu/qemu/commit/4150801bfd46a5b797dd1b7e5ec8fb5ac55f2cb7
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt.c
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch/virt: Add field ram_end in LoongArchVirtMachineState
DRAM region is dynamically set and the last valid physical address region
with LoongArch Virt Machine. To record the last valid physical address,
field ram_end is added in structure LoongArchVirtMachineState. In future
end address of DRAM cannot exceed base addres of PCIE 64-bit MMIO region.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: efee88883a7e26e158ee498b7f5f1674505618ba
https://github.com/qemu/qemu/commit/efee88883a7e26e158ee498b7f5f1674505618ba
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt-acpi-build.c
M hw/loongarch/virt.c
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch/virt: Add field gpex in LoongArchVirtMachineState
Add field gpex in structure LoongArchVirtMachineState, type of field gpex
is structure GPEXConfig and it is to record configuration information
about GPEX host bridge. And remove field pci_bus in structure
LoongArchVirtMachineState since the information is in field gpex already.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: ecdd3751adb8a7f859cb0a6539fe5b88be8a7c05
https://github.com/qemu/qemu/commit/ecdd3751adb8a7f859cb0a6539fe5b88be8a7c05
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt.c
Log Message:
-----------
hw/loongarch/virt: Get irq number from gpex config info
The base irq number of GPEX PCIE host bridge can comes from gpex::irq.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: ecfd5c0bfc32f13e015994a34e7fa372ca9b7361
https://github.com/qemu/qemu/commit/ecfd5c0bfc32f13e015994a34e7fa372ca9b7361
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt-acpi-build.c
M hw/loongarch/virt-fdt-build.c
M hw/loongarch/virt.c
Log Message:
-----------
hw/loongarch/virt: Get PCI info from gpex config info
PCIE host bridge configuration information such as MMIO/Conf/IO base
and size can come from gpex config info.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: 2cb067f50fbe3b616983e7e1fc8828557f7c39eb
https://github.com/qemu/qemu/commit/2cb067f50fbe3b616983e7e1fc8828557f7c39eb
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt.c
M include/hw/loongarch/virt.h
Log Message:
-----------
hw/loongarch/virt: Add property highmem_mmio with virt machine
On LoongArch Virt Machine, MMIO region with GPEX host bridge is
0x40000000 -- 0x7FFFFFFF. The total size is 1G bytes and it is enough
for emulated virtio devices basically.
However on some conditions such as hostmem is added with virtio-gpu
device, the command line is -device virtio-gpu-gl,hostmem=4G. The
PCIE MMIO region is not enough, 64-bit high MMIO region is required.
Here add property highmem_mmio with virt machine, however it brings
out incompatible issue. Here the default value is false.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: d2ebf3570a3ec3bc8f61b02547f0f78e1dda4e0d
https://github.com/qemu/qemu/commit/d2ebf3570a3ec3bc8f61b02547f0f78e1dda4e0d
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt-fdt-build.c
M hw/loongarch/virt.c
Log Message:
-----------
hw/loongarch/virt: Add high MMIO support with GPEX host
With high MMIO supported, its base address comes from high end of
physical address space. Also add high MMIO support with GPEX host bridge.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: 1a8d5e95d70ab1bdbc2a39065e9864f4201e519f
https://github.com/qemu/qemu/commit/1a8d5e95d70ab1bdbc2a39065e9864f4201e519f
Author: Bibo Mao <[email protected]>
Date: 2026-01-12 (Mon, 12 Jan 2026)
Changed paths:
M hw/loongarch/virt.c
Log Message:
-----------
hw/loongarch/virt: Add property highmem-mmio-size with virt machine
The default high mmio size of GPEX PCIE host controller is 64G bytes on
virt machine. If it does not meet requirements with some pass-throught HW
devices in future, it can be adjust dynamically, here adds property
highmem-mmio-size to set high mmio size.
Signed-off-by: Bibo Mao <[email protected]>
Reviewed-by: Song Gao <[email protected]>
Commit: 81f1fc471c053c9d3915c3e1f8b37503bd9a9cb7
https://github.com/qemu/qemu/commit/81f1fc471c053c9d3915c3e1f8b37503bd9a9cb7
Author: Richard Henderson <[email protected]>
Date: 2026-01-13 (Tue, 13 Jan 2026)
Changed paths:
M hw/loongarch/virt-acpi-build.c
M hw/loongarch/virt-fdt-build.c
M hw/loongarch/virt.c
M include/hw/loongarch/virt.h
M target/loongarch/cpu-csr.h
M target/loongarch/cpu.c
M target/loongarch/cpu.h
M target/loongarch/csr.c
M target/loongarch/kvm/kvm.c
M target/loongarch/machine.c
Log Message:
-----------
Merge tag 'pull-loongarch-20260112' of https://github.com/bibo-mao/qemu into
staging
loongarch queue
# -----BEGIN PGP SIGNATURE-----
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# -----END PGP SIGNATURE-----
# gpg: Signature made Mon 12 Jan 2026 06:07:46 PM AEDT
# gpg: using EDDSA key 0D8642A3A2659F80B0B3D1A41F7B0C1251ACE7D1
# gpg: Good signature from "bibo mao <[email protected]>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7044 3A00 19C0 E97A 31C7 13C4 8E86 8FB7 A176 9D4C
# Subkey fingerprint: 0D86 42A3 A265 9F80 B0B3 D1A4 1F7B 0C12 51AC E7D1
* tag 'pull-loongarch-20260112' of https://github.com/bibo-mao/qemu:
hw/loongarch/virt: Add property highmem-mmio-size with virt machine
hw/loongarch/virt: Add high MMIO support with GPEX host
hw/loongarch/virt: Add property highmem_mmio with virt machine
hw/loongarch/virt: Get PCI info from gpex config info
hw/loongarch/virt: Get irq number from gpex config info
hw/loongarch/virt: Add field gpex in LoongArchVirtMachineState
hw/loongarch/virt: Add field ram_end in LoongArchVirtMachineState
target/loongarch: Add PMU register dump support in KVM
target/loongarch: Call function loongarch_la464_init_csr() after realized
target/loongarch: Add PMU migration support in KVM mode
Signed-off-by: Richard Henderson <[email protected]>
Compare: https://github.com/qemu/qemu/compare/18c38476def1...81f1fc471c05
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