----- Am 18. Sep 2024 um 11:13 schrieb Sebastian Huber sebastian.hu...@embedded-brains.de:
> Hello, > > I recently added the support for CPU1 to the xilinx-zynq-a9 machine > (hw/arm/xilinx_zynq.c). However, the reset behaviour doesn't match exactly > with > the hardware. After a system reset (SRST), the CPU1 should execute a wfe > instruction and then load the start address from 0xfffffff0: > > https://docs.amd.com/r/en-US/ug585-zynq-7000-SoC-TRM/Starting-Code-on-CPU-1 > > It would be great if someone has a hint for me how I can add this startup code > for CPU1 at address region 0xFFFFFE00 to 0xFFFFFFF0. I got it working with some hacks in arm_load_kernel() and do_cpu_reset(). In arm_load_kernel() had to remove the: /* * No secondary boot stub; don't use the reset hook that would * have set the CPU up to call it */ info->write_secondary_boot = NULL; info->secondary_cpu_reset_hook = NULL; This change probably breaks a lot of things. I am not sure how to address this issue. -- embedded brains GmbH & Co. KG Herr Sebastian HUBER Dornierstr. 4 82178 Puchheim Germany email: sebastian.hu...@embedded-brains.de phone: +49-89-18 94 741 - 16 fax: +49-89-18 94 741 - 08 Registergericht: Amtsgericht München Registernummer: HRB 157899 Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler Unsere Datenschutzerklärung finden Sie hier: https://embedded-brains.de/datenschutzerklaerung/
0001-hw-arm-xilinx_zynq-Add-CPU1-reset.patch
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