On Sunday 01 May 2005 21:29, Jonas Maebe wrote: > On 01 May 2005, at 19:04, Paul Brook wrote: > > This is not correct. > > If the blr is not at the end of the function, things will break. > > dyngen assumes the last instruction is the only return instruction in > > the > > function. This allows it to remove the blr insn and concatenate > > multiple > > functions together. > > Can't we on PPC just replace all blr's with plain branches to the > instruction after end of the function? (since all instructions are 32 > bit long)
Yes, that should be work for ppc. Obviously this doesn't help on x86/amd64 where a jump is longer than a ret. you would have to copy the preceeding instruction[s] to make room for the branch. You'd then need to redirect any jumps directly to the ret instruction, and make them point at the copy. Sparc may have similar problems because of jump delay slots (a jump is effectively two instructions long. Arm needs a bit of logic to follow jumps and figure out where the end of the function is (ie. where the constant pool starts), but other that than the same trick should work. Overall it sounds like a tractable problem. It shouldn't matter if this analysis takes a while because it's don'e while building qemu, not at runtime. Paul _______________________________________________ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel