On Wednesday 16 November 2005 13:10, Lars Roland wrote: > On 11/16/05, Dave Feustel <[EMAIL PROTECTED]> wrote: > > Is there any chance that simulation of the > > IBM Cell processor will be added to Qemu? > > Although this would be great, I am not sure how easy it is to get a > accurate simulation of this chip. The cell architecture consists of > both a power processor element (PPE) and 8 synergistic processor > elements (SPEs) while the PPE is a conventional microprocessor the > SPEs are far from so > > The point of the cell is to get the PPE to prepare tasks that can be > executed in a parallel distributed manner across all the SPEs and I am > afraid that this scheduling is going to be very hard to implement > correctly - I may however be proven wrong.
It depends how accurate you want the simulation to be. A cycle accurate simulator is probably going to be trickier. If you don't need cycle accuracy it shouldn't be worse than any other multiprocessor system. The only real fundamental missing feature in QEMU is SMP guest support. The main PPE is a virtual 2-way 64-bit PowerPC core. Qemu ppc64 is currently incomplete, but that's fixable. I'd expect the SPE to be very easy to emulate. These are simple RISC vector cores with their own local memory, no MMU, and a DMA/mailbox engine to communicate with the rest of the system. It's a significant amount of work, but other than the SMP issue (which needs fixing for other targets anyway) it's not excessively hard. Paul _______________________________________________ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
