With this patch, I can boot and install Solaris Express from a local DVD drive.
Previously, the DVD would boot, but halfway through the questions,
it would come up and tell me it wasn't Solaris DVD.
Ben
diff -ruN qemu/hw/ide.c qemu-solaris/hw/ide.c
--- qemu/hw/ide.c 2006-04-25 17:24:22.000000000 -0400
+++ qemu-solaris/hw/ide.c 2006-04-28 13:30:05.601548000 -0400
@@ -391,6 +391,10 @@
} PCIIDEState;
static void ide_dma_start(IDEState *s, IDEDMAFunc *dma_cb);
+static int ide_atapi_cmd_read_dma_cb(IDEState *s,
+ target_phys_addr_t phys_addr,
+ int transfer_size1);
+
static void padstr(char *str, const char *src, int len)
{
@@ -513,10 +517,10 @@
padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
- put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
- put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
- put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
- put_le16(p + 64, 1); /* PIO modes */
+ put_le16(p + 49, 1 << 8 | 1 << 9); /* DMA and LBA supported */
+ put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
+ put_le16(p + 63, 0x07 | 0x4 << 8); /* Multiword DMA supported/selected */
+ put_le16(p + 64, 0x03); /* PIO modes 3,4 supported */
put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
@@ -994,8 +998,14 @@
s->elementary_transfer_size = 0;
s->io_buffer_index = 0;
- s->status = READY_STAT;
- ide_atapi_cmd_reply_end(s);
+ if (s->atapi_dma) {
+ s->status = READY_STAT | DRQ_STAT;
+ ide_dma_start(s, ide_atapi_cmd_read_dma_cb);
+ } else {
+ s->status = READY_STAT;
+ ide_atapi_cmd_reply_end(s);
+ }
+
}
/* start a CD-CDROM read command */
@@ -1026,14 +1036,19 @@
#endif
if (s->packet_transfer_size <= 0)
break;
- len = s->cd_sector_size - s->io_buffer_index;
- if (len <= 0) {
- /* transfert next data */
- cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
- s->lba++;
- s->io_buffer_index = 0;
- len = s->cd_sector_size;
+ if (s->lba == -1)
+ len = s->packet_transfer_size;
+ else {
+ len = s->cd_sector_size - s->io_buffer_index;
+ if (len <= 0) {
+ /* transfert next data */
+ cd_read_sector(s->bs, s->lba, s->io_buffer, s->cd_sector_size);
+ s->lba++;
+ s->io_buffer_index = 0;
+ len = s->cd_sector_size;
+ }
}
+
if (len > transfer_size)
len = transfer_size;
cpu_physical_memory_write(phys_addr,
@@ -2488,6 +2503,11 @@
cmd646_set_irq, d, 1);
}
+// PCI 0x04: command(word), 0x06(word): status
+#define PCI_COMMAND_IOACCESS 0x0001
+#define PCI_COMMAND_MEMACCESS 0x0002
+#define PCI_COMMAND_BUSMASTER 0x0004
+
/* hd_table must contain 4 block drivers */
/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
@@ -2507,7 +2527,9 @@
pci_conf[0x01] = 0x80;
pci_conf[0x02] = 0x10;
pci_conf[0x03] = 0x70;
- pci_conf[0x09] = 0x80; // legacy ATA mode
+ pci_conf[0x04] = PCI_COMMAND_IOACCESS | PCI_COMMAND_MEMACCESS \
+ | PCI_COMMAND_BUSMASTER;
+ pci_conf[0x09] = 0x8a; // programming interface = PCI_IDE bus master is supported
pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
pci_conf[0x0e] = 0x00; // header_type
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