[Qemu-devel] MIPS interrupt handling

[Fabrice Bellard]

I just looked at the MIPS file target-mips/op_helper.c and I don't 
understand why IRQs need to be handled in op_helper.c:do_mtc0() with reg 
= 12. IMHO, the corresponding code should be deleted because the TB is 
forced to terminate after mtc0 so that the IRQs can be handled in the 
main loop in cpu-exec.c.

Moreover, clearing CPU_INTERRUPT_HARD in do_mtc0() is almost surely a bug !
Fabrice.


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