> > Problem is, at the moment I've no idea, how we could achieve this memory > > monitoring in a safe and simple way in user space. > > I'm trying to read up on monitor and mwait. Apparently mwait puts the > processor in low-power wait mode, waiting for a memory write in some > select area defined by monitor; and as I am new to this I'm not sure if > I have understood all sources from where such a memory write can come > from while the processor is asleep. One source, I suppose, is from other > processors in an SMP setup? Another source may be DMA? Does this mean > that it is safe to emulate wmait as hlt if neiter SMP or DMA is used? > (Qemu hardware doesn't support DMA, right?)
qemu hardware does support DMA, but I don't think this matters. By my reading DMA writes don't need to wake mwait. The exact wording is "store operation", which I'd expect to mean execution of a store instruction (by a different CPU). So for UP systems mwait can be implemented the same as HLT, except that it raises an exception if state hasn't been initialized by monitor. Paul _______________________________________________ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
