Marius Groeger wrote: > On Wed, 16 Aug 2006, Thiemo Seufer wrote: > > >Dirk Behme wrote: > >>Hi, > >> > >>I'm not sure, but while playing with MIPS interrupts, it > >>seems to me that something with reset of interrupt flag > >>MIPS_HFLAG_EXL (0x04) at exception exit (eret) is wrong. It > >>seems to me that only one interrupt is executed because > >>after eret, MIPS_HFLAG_EXL stays set in env->hflags. Then, > >>at next interrupt, system correctly checks for > >>MIPS_HFLAG_EXL, but this is still set and no further > >>interrupt happens. > > Dirk and I have been following up on this privately and could verify that it > was indeed an issue with the testcase. QEMU is not causing any problem > here. > > >This explains some weirdness I saw on my hacked up qemu > >when running a mips32r2-compiled Linux kernel. > > What exactly included that hack? Some new mips32r2 insns like rdhw?
All new r2 instructions. rdhwr wasn't used by the userland. A recent r2 compiled Kernel will use the di/ei instructions, a recursive exception will IIRC see a EXL flag set when there shouldn't be one. The r1 kernel code happens to mask the EXL flag. Thiemo _______________________________________________ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
