Hi This is the patch which appends optional "stfiwx" PowerPC instruction into QEMU. For demonstration purpose you can use attached stfiwx_cast.c code. But i'm still having problems with "gen_op_load_fpr_FT1(rS(ctx->opcode));" macro which loads fpr[rS(ctx->opcode] into internal FT1 register. When the value of parameter is in the correct range (0 - 31), data from the selected fpr register is not transfered into FT1, but when we manually change the value to the wrong range (for example 32, gen_op_load_fpr_FT1(32) ) the FT1 gets the correct value, strange. I guess, because the qemu micro instruction couldn't be found (gen_op_load_fpr_FT1_fpr32) something flushed the fpr registers to the correct values.
Tom Marn
Patch which appends optional "stfiwx" PowerPC instruction into QEMU. Tom Marn --- qemu/target-ppc/translate.c.orig 2006-10-10 08:59:30.000000000 +0200 +++ qemu/target-ppc/translate.c 2006-10-10 09:42:26.000000000 +0200 @@ -1716,14 +1716,29 @@ GEN_STFS(fs, 0x14); /* Optional: */ /* stfiwx */ -GEN_HANDLER(stfiwx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT) -{ - if (!ctx->fpu_enabled) { - RET_EXCP(ctx, EXCP_NO_FP, 0); - return; - } - RET_INVAL(ctx); -} +#define GEN_STWXF(width) \ +GEN_HANDLER(st##width##wx, 0x1F, 0x17, 0x1E, 0x00000001, PPC_FLOAT) \ +{ \ + if (!ctx->fpu_enabled) { \ + RET_EXCP(ctx, EXCP_NO_FP, 0); \ + return; \ + } \ + if (rA(ctx->opcode) == 0) { \ + gen_op_load_gpr_T0(rB(ctx->opcode)); \ + } else { \ + gen_op_load_gpr_T0(rA(ctx->opcode)); \ + gen_op_load_gpr_T1(rB(ctx->opcode)); \ + gen_op_add(); \ + } \ + gen_op_load_fpr_FT1(rS(ctx->opcode)); \ + op_ldst(st##width); \ +} + +#define GEN_STFI(width) \ +OP_ST_TABLE(width); \ +GEN_STWXF(width); + +GEN_STFI(fi); /*** Branch ***/ --- qemu/target-ppc/op_mem.h.orig 2006-10-10 08:59:45.000000000 +0200 +++ qemu/target-ppc/op_mem.h 2006-10-10 09:18:39.000000000 +0200 @@ -187,6 +187,23 @@ PPC_OP(glue(glue(st, name), MEMSUFFIX)) PPC_STF_OP(fd, stfq); PPC_STF_OP(fs, stfl); +static inline void glue(stfi, MEMSUFFIX) (target_ulong EA, double d) +{ + + union { + double d; + uint32_t u; + } u; + + u.d = d; + u.u = u.u && 0x00000000FFFFFFFFULL; + glue(stl, MEMSUFFIX)(T0, u.d); + RETURN(); + +} + +PPC_STF_OP(fi, stfi); + static inline void glue(stfqr, MEMSUFFIX) (target_ulong EA, double d) { union { @@ -224,6 +241,23 @@ static inline void glue(stflr, MEMSUFFIX PPC_STF_OP(fd_le, stfqr); PPC_STF_OP(fs_le, stflr); +static inline void glue(stfir, MEMSUFFIX) (target_ulong EA, float f) +{ + union { + float f; + uint32_t u; + } u; + + u.f = f; + u.u = ((u.u & 0xFF000000UL) >> 24) | + ((u.u & 0x00FF0000ULL) >> 8) | + ((u.u & 0x0000FF00UL) << 8) | + ((u.u & 0x000000FFULL) << 24); + glue(stfi, MEMSUFFIX)(EA, u.f); +} + +PPC_STF_OP(fi_le, stfir); + /*** Floating-point load ***/ #define PPC_LDF_OP(name, op) \ PPC_OP(glue(glue(l, name), MEMSUFFIX)) \
/* PowerPC testing code for my implementation of optional stfiwx * instruction implemented for QEMU. Casting from float to integer * will produce "stfiwx" call. * Tested on PPC 603e * Tom Marn */ #include <stdio.h> int stfiwx_cast(float f) { int i; i = (int)f; printf("float: %f [0x%08x] -> integer: %i [0x%08x]\n", f, *((unsigned int *)&f), i, i); return i; } int main() { stfiwx_cast(22.316447); }
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