> The emulated CPU still identifies itself as a MIPS32(R1) 4Kc. > Currently it doesn't throw a RI exception for R2 instructions, this > is useful for Linux userland emulation, and also follows the current > policy which doesn't distinguish between MIPS32R1 instructions and > those of earlier ISAs.
I thought this was an accident/omission rather than a policy. I recommend making the ISA features optional, even it it's controlled by a compile-time directive that's always on. It's much easier to do this when adding the insns then to retro-fit it afterwards. Paul _______________________________________________ Qemu-devel mailing list Qemu-devel@nongnu.org http://lists.nongnu.org/mailman/listinfo/qemu-devel
